GD75232DBR原理图各脚功能电路原理芯片引脚定义引脚图及功能-中国IC网-芯三七

当前位置：IC37首页_>G字母起始型号索引_>G字母起始型号索引第311页更新时间：2024-10-25 17:21:16

产品型号GD75232DBR的概述

GD75232DBR芯片概述 GD75232DBR是一款高性能的双向数据总线驱动器。它被广泛应用于需要高速数据传输的电子设备中，为系统的信号稳定性和抗干扰能力提供保障。该芯片具备良好的电气特性和工作条件，能有效支持各种数据总线和信号传输需求。 GD75232DBR的详细参数 GD75232DBR芯片集成了多个功能单元，具有如下核心参数： - 运行电压（VCC）：芯片的工作电压在4.5V到5.5V之间，能够适应多种不同的供电电源。 - 工作温度范围：正规工作温度为-40°C至+85°C，适合于多种工业和商业环境。 - 输入电压范围：芯片的输入电压可以在0V到VCC之间进行动态调节。 - 输出电流：该芯片能够提供最大150mA的输出电流，适合于大多数数据传输应用。 - 传输速率：GD75232DBR支持高达60MHz的传输速率，能够满足高速数据总线的需求。 - 引脚数量：封装形式为14引脚...

产品型号GD75232DBR的Datasheet PDF文件预览

ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢄꢆ ꢀ ꢁꢇ ꢃꢄ ꢅꢄ

ꢈ ꢉꢊꢋ ꢌꢍ ꢊꢎ ꢏꢐꢑ ꢄꢅ ꢄ ꢁꢏꢌ ꢒꢎ ꢏꢐ ꢓꢔꢁ ꢏꢎꢕ ꢎꢌ ꢒ ꢎ ꢏꢐ

ꢖ

SLLS206J − MAY 1995 − REVISED NOVEMBER 2004

GD65232, GD75232 . . . DB, DW, N, OR PW PACKAGE

(TOP VIEW)

Single Chip With Easy Interface Between

UART and Serial-Port Connector of IBM

PC/AT and Compatibles

Meet or Exceed the Requirements of

TIA/EIA-232-F and ITU v.28 Standards

RA1

RA2

RA3

DY1

DY2

RA4

DY3

RA5

19 RY1

18 RY2

17 RY3

Designed to Support Data Rates up to

120 kbit/s

DA1

DA2

RY4

DA3

RY5

GND

Pinout Compatible With SN75C185 and

SN75185

description/ordering information

The GD65232 and GD75232 combine three

drivers

and

five

receivers

from

the

Texas Instruments trade-standard SN75188 and

SN75189 bipolar quadruple drivers and receivers, respectively. The pinout matches the flow-through design

of the SN75C185 to decrease the part count, reduce the board space required, and allow easy interconnection

of the UART and serial-port connector of an IBM PC/AT and compatibles. The bipolar circuits and processing

of the GD65232 and GD75232 provide a rugged, low-cost solution for this function at the expense of quiescent

power and external passive components relative to the SN75C185.

The GD65232 and GD75232 comply with the requirements of the TIA/EIA-232-F and ITU (formerly CCITT) V.28

standards. These standards are for data interchange between a host computer and a peripheral at signaling

rates up to 20 kbit/s. The switching speeds of these devices are fast enough to support rates up to 120 kbit/s

with lower capacitive loads (shorter cables). Interoperability at the higher signaling rates cannot be expected

unless the designer has design control of the cable and the interface circuits at both ends. For interoperability

at signaling rates up to 120 kbit/s, use of TIA/EIA-423-B (ITU V.10) and TIA/EIA-422-B (ITU V.11) standards

is recommended.

ORDERING INFORMATION

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

†

PACKAGE

PDIP (N)

Tube of 20

Tube of 25

Reel of 2000

Tube of 70

Reel of 2000

Tube of 20

Tube of 25

Reel of 2000

Tube of 70

Reel of 2000

GD65232N

GD65232DW

GD65232DWR

GD65232DBR

GD65232PW

GD65232PWR

GD75232N

SOIC (DW)

SSOP (DB)

GD65232

−40°C to 85°C

TSSOP (PW)

PDIP (N)

GD65232

GD75232N

GD75232DW

GD75232DWR

GD75232DBR

GD75232PW

GD75232PWR

SOIC (DW)

SSOP (DB)

GD75232

0°C to 70°C

TSSOP (PW)

GD75232

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

IBM is a trademark of International Business Machines Corporation.

ꢍ

ꢏ

ꢗ

ꢧ

ꢁ

ꢢ

ꢉ

ꢕ

ꢠ

ꢋ

ꢡ

ꢌ

ꢛ

ꢗ

ꢙ

ꢔ

ꢚ

ꢁ

ꢓ

ꢋ

ꢓ

ꢘ

ꢙ

ꢣ

ꢚ

ꢛ

ꢡ

ꢜ

ꢝ

ꢞ

ꢟ

ꢘ

ꢛ

ꢙ

ꢘ

ꢠ

ꢤ

ꢡ

ꢢ

ꢜ

ꢣ

ꢙ

ꢟ

ꢞ

ꢝ

ꢠ

ꢛ

ꢚ

ꢤ

ꢋꢣ

ꢢ

ꢥ

ꢠ

ꢦ

ꢘ

ꢡ

ꢞ

ꢠ

ꢟ

ꢘ

ꢟ

ꢛ

ꢜ

ꢙ

ꢢ

ꢧ

ꢞ

ꢙ

ꢟ

ꢣ

ꢠ

ꢨ

ꢜ

ꢛ

ꢡ

ꢟ

ꢛ

ꢜ

ꢝ

ꢟ

ꢛ

ꢠ

ꢤ

ꢘ

ꢚ

ꢘ

ꢡ

ꢣ

ꢜ

ꢟ

ꢩ

ꢟ

ꢣ

ꢜ

ꢛ

ꢚ

ꢪ

ꢞ

ꢌ

ꢙ

ꢝ

ꢣ

ꢠ

ꢟ

ꢞ

ꢙ

ꢧ

ꢞ

ꢜ

ꢧ

ꢫ

ꢞ

ꢟ ꢣ ꢠ ꢟꢘ ꢙꢭ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ

ꢜ

ꢞ

ꢙ

ꢟ

ꢬ

ꢨ

ꢍ

ꢜ

ꢛ

ꢧ

ꢢ

ꢡ

ꢟ

ꢘ

ꢛ

ꢙ

ꢤ

ꢜ

ꢛ

ꢡ

ꢣ

ꢠ

ꢘ

ꢙ

ꢭ

ꢧ

ꢛ

ꢣ

ꢠ

ꢙ

ꢛ

ꢟ

ꢙ

ꢣ

ꢡ

ꢣ

ꢠ

ꢞ

ꢜ

ꢘ

ꢦ

ꢬ

ꢘ

ꢙ

ꢡ

ꢦ

ꢢ

ꢧ

ꢣ

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂꢃ ꢄ ꢅ ꢄꢆ ꢀꢁ ꢇꢃ ꢄꢅ ꢄ

ꢈ ꢉ ꢊꢋ ꢌ ꢍꢊ ꢎ ꢏ ꢐꢑꢄꢅ ꢄ ꢁꢏ ꢌ ꢒꢎ ꢏꢐ ꢓꢔ ꢁ ꢏꢎ ꢕꢎ ꢌꢒ ꢎꢏꢐ

ꢖ

SLLS206J − MAY 1995 − REVISED NOVEMBER 2004

logic diagram (positive logic)

RA1

RA2

RY1

RY2

RA3

DY1

RY3

DA1

DY2

RA4

DY3

DA2

RY4

DA3

RA5

RY5

schematic (each driver)

To Other Drivers

11.6 kΩ

9.4 kΩ

Input

DAx

75.8 Ω

320 Ω

Output

DYx

4.2 kΩ

GND

To Other

Drivers

10.4 kΩ

3.3 kΩ

68.5 Ω

To Other Drivers

Resistor values shown are nominal.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢄꢆ ꢀ ꢁꢇ ꢃꢄ ꢅꢄ

ꢈ ꢉꢊꢋ ꢌꢍ ꢊꢎ ꢏꢐꢑ ꢄꢅ ꢄ ꢁꢏꢌ ꢒꢎ ꢏꢐ ꢓꢔꢁ ꢏꢎꢕ ꢎꢌ ꢒ ꢎ ꢏꢐ

ꢖ

SLLS206J − MAY 1995 − REVISED NOVEMBER 2004

schematic (each receiver)

To Other Receivers

9 kΩ

5 kΩ

1.66 kΩ

Output

RYx

2 kΩ

3.8 kΩ

Input

RAx

10 kΩ

GND

To Other Receivers

Resistor values shown are nominal.

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage (see Note 1): V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −15 V

Input voltage range, V : Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −15 V to 7 V

Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −30 V to 30 V

Driver output voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −15 V to 15 V

Receiver low-level output current, I

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA

Package thermal impedance, θ (see Notes 2 and 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W

DW package . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W

N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W

PW package . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W

Operating virtual junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

Storage temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

stg

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltages are with respect to the network ground terminal.

2. Maximum power dissipation is a function of T (max), q , and T . The maximum allowable power dissipation at any allowable

ambient temperature is P = (T (max) − T )/q . Operating at the absolute maximum T of 150°C can affect reliability.

3. The package thermal impedance is calculated in accordance with JESD 51-7.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂꢃ ꢄ ꢅ ꢄꢆ ꢀꢁ ꢇꢃ ꢄꢅ ꢄ

ꢈ ꢉ ꢊꢋ ꢌ ꢍꢊ ꢎ ꢏ ꢐꢑꢄꢅ ꢄ ꢁꢏ ꢌ ꢒꢎ ꢏꢐ ꢓꢔ ꢁ ꢏꢎ ꢕꢎ ꢌꢒ ꢎꢏꢐ

ꢖ

SLLS206J − MAY 1995 − REVISED NOVEMBER 2004

recommended operating conditions

MIN NOM

MAX

UNIT

Supply voltage (see Note 4)

7.5

−7.5

4.5

−9

Supply voltage (see Note 4)

−15

5.5

Supply voltage (see Note 4)

High-level input voltage (driver only)

Low-level input voltage (driver only)

1.9

0.8

−6

Driver

High-level output current

Low-level output current

Operating free-air temperature

°C

Receiver

Driver

−0.5

Receiver

GD65232

GD75232

−40

NOTE 4: When powering up the GD65232 and GD75232, the following sequence should be used:

1. V

2. V

3. V

4. I/Os

Applying V

before V may allow large currents to flow, causing damage to the device. When powering down the GD65232 and

GD75232, the reverse sequence should be used.

supply currents over recommended operating free-air temperature range

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

= 9 V,

= −9 V

= 12 V,

= 15 V,

= 9 V,

= −12 V

= −15 V

= −9 V

All inputs at 1.9 V,

All inputs at 0.8 V,

All inputs at 1.9 V,

No load

Supply current from V

4.5

5.5

= 12 V,

= 15 V,

= 9 V,

= −12 V

= −15 V

= −9 V

−15

−19

−25

−3.2

= 12 V,

= 15 V,

= 9 V,

= −12 V

= −15 V

= −9 V

Supply current from V

= 12 V,

= 15 V,

= −12 V

= −15 V

All inputs at 0.8 V,

All inputs at 5 V,

No load

No load,

GD65232

GD75232

= 5 V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢄꢆ ꢀ ꢁꢇ ꢃꢄ ꢅꢄ

ꢈ ꢉꢊꢋ ꢌꢍ ꢊꢎ ꢏꢐꢑ ꢄꢅ ꢄ ꢁꢏꢌ ꢒꢎ ꢏꢐ ꢓꢔꢁ ꢏꢎꢕ ꢎꢌ ꢒ ꢎ ꢏꢐ

ꢖ

SLLS206J − MAY 1995 − REVISED NOVEMBER 2004

DRIVER SECTION

electrical characteristics over recommended operating free-air temperature range, V

= 9 V,

= −9 V, V

= 5 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

TYP

7.5

High-level output voltage

Low-level output voltage (see Note 5)

High-level input current

= 0.8 V,

= 1.9 V,

= 3 kΩ,

See Figure 1

−7.5

−6

V = 5 V,

See Figure 2

µA

Low-level input current

V = 0,

−1.6

High-level short-circuit output current

(see Note 6)

= 0.8 V,

= 2 V,

= 0,

See Figure 1

−4.5

−12 −19.5

12 19.5

OS(H)

OS(L)

Low-level short-circuit output current

Output resistance (see Note 7)

4.5

= V

= 0,

V = −2 V to 2 V

300

Ω

NOTES: 5. The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic

levels only (e.g., if −10 V is maximum, the typical value is a more negative voltage).

6. Output short-circuit conditions must maintain the total power dissipation below absolute maximum ratings.

7. Test conditions are those specified by TIA/EIA-232-F and as listed above.

switching characteristics, V

= 5 V, V

= 12 V, V = −12 V, T = 25°C

DD SS A

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

TYP

Propagation delay time,

low- to high-level output

= 3 kΩ to 7 kΩ,

= 15 pF,

See Figure 3

315

500

PLH

Propagation delay time,

high- to low-level output

See Figure 3

175

PHL

= 15 pF,

See Figure 3

1.7

100

2.5

µs

Transition time,

low- to high-level output

= 3 kΩ to 7 kΩ

TLH

= 2500 pF,

= 15 pF,

See Figure 3 and Note 8

See Figure 3

Transition time,

high- to low-level output

THL

= 2500 pF,

See Figure 3 and Note 8

1.5

2.5

NOTE 8: Measured between 3-V and 3-V points of the output waveform (TIA/EIA-232-F conditions); all unused inputs are tied either high

or low.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂꢃ ꢄ ꢅ ꢄꢆ ꢀꢁ ꢇꢃ ꢄꢅ ꢄ

ꢈ ꢉ ꢊꢋ ꢌ ꢍꢊ ꢎ ꢏ ꢐꢑꢄꢅ ꢄ ꢁꢏ ꢌ ꢒꢎ ꢏꢐ ꢓꢔ ꢁ ꢏꢎ ꢕꢎ ꢌꢒ ꢎꢏꢐ

ꢖ

SLLS206J − MAY 1995 − REVISED NOVEMBER 2004

RECEIVER SECTION

electrical characteristics over recommended operating conditions (unless otherwise noted)

†

PARAMETER

TEST CONDITIONS

MIN

1.75

1.55

0.75

0.5

MAX

2.3

UNIT

TYP

= 25°C,

See Figure 5

1.9

0.97

IT+

Positive-going input threshold voltage

Negative-going input threshold voltage

= 0°C to 70°C,

See Figure 5

2.3

1.25

IT−

Input hysteresis voltage (V

− V )

IT−

hys

IT+

= 0.75 V

2.6

Inputs open

High-level output voltage

Low-level output voltage

= −0.5 mA

= 10 mA,

2.6

V = 3 V

0.2

0.45

GD65232

GD75232

3.6

V = 25 V,

See Figure 5

8.3

High-level input current

V = 3 V,

0.43

−3.6

−0.43

GD65232

GD75232

−11

V = −25 V,

See Figure 5

−8.3

Low-level input current

V = −3 V,

Short-circuit output current

See Figure 4

−3.4

−12

†

All typical values are at T = 25°C, V

= 5 V, V

= 9 V, and V = −9 V.

switching characteristics, V

= 5 V, V

= 12 V, V = −12 V, T = 25°C

DD SS A

PARAMETER

TEST CONDITIONS

MIN

TYP

107

MAX

250

150

350

UNIT

Propagation delay time, low- to high-level output

Propagation delay time, high- to low-level output

Transition time, low- to high-level output

PLH

PHL

TLH

THL

PLH

PHL

TLH

THL

= 50 pF,

= 15 pF,

= 5 kΩ,

See Figure 6

175

Transition time, high- to low-level output

Propagation delay time, low- to high-level output

Propagation delay time, high- to low-level output

Transition time, low- to high-level output

100

160

100

175

= 1.5 kΩ, See Figure 6

Transition time, high- to low-level output

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢄꢆ ꢀ ꢁꢇ ꢃꢄ ꢅꢄ

ꢈ ꢉꢊꢋ ꢌꢍ ꢊꢎ ꢏꢐꢑ ꢄꢅ ꢄ ꢁꢏꢌ ꢒꢎ ꢏꢐ ꢓꢔꢁ ꢏꢎꢕ ꢎꢌ ꢒ ꢎ ꢏꢐ

ꢖ

SLLS206J − MAY 1995 − REVISED NOVEMBER 2004

PARAMETER MEASUREMENT INFORMATION

OS(L)

or GND

−I

OS(H)

= 3 kΩ

Figure 1. Driver Test Circuit for V , V , I

, and I

OS(L)

OH OL OS(H)

−I

Figure 2. Driver Test Circuit for I and I

3 V

0 V

1.5 V

Input

1.5 V

Input

PHL

PLH

90%

Pulse

Generator

90%

See Note A

50%

10%

(see Note B)

50%

10%

Output

TLH

THL

TEST CIRCUIT

VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: t = 25 µs, PRR = 20 kHz, Z = 50 Ω, t = t < 50 ns.

C includes probe and jig capacitance.

Figure 3. Driver Test Circuit and Voltage Waveforms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂꢃ ꢄ ꢅ ꢄꢆ ꢀꢁ ꢇꢃ ꢄꢅ ꢄ

ꢈ ꢉ ꢊꢋ ꢌ ꢍꢊ ꢎ ꢏ ꢐꢑꢄꢅ ꢄ ꢁꢏ ꢌ ꢒꢎ ꢏꢐ ꢓꢔ ꢁ ꢏꢎ ꢕꢎ ꢌꢒ ꢎꢏꢐ

ꢖ

SLLS206J − MAY 1995 − REVISED NOVEMBER 2004

PARAMETER MEASUREMENT INFORMATION

Figure 4. Receiver Test Circuit for I

−I

V ,

Figure 5. Receiver Test Circuit for V , V , and V

IT OH

4 V

50%

Input

0 V

PHL

PLH

90%

Pulse

Generator

90%

See Note A

50%

10%

(see Note B)

50%

10%

Output

TLH

THL

TEST CIRCUIT

VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: t = 25 µs, PRR = 20 kHz, Z = 50 Ω, t = t < 50 ns.

C includes probe and jig capacitance.

Figure 6. Receiver Propagation and Transition Times

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢄꢆ ꢀ ꢁꢇ ꢃꢄ ꢅꢄ

ꢈ ꢉꢊꢋ ꢌꢍ ꢊꢎ ꢏꢐꢑ ꢄꢅ ꢄ ꢁꢏꢌ ꢒꢎ ꢏꢐ ꢓꢔꢁ ꢏꢎꢕ ꢎꢌ ꢒ ꢎ ꢏꢐ

ꢖ

SLLS206J − MAY 1995 − REVISED NOVEMBER 2004

TYPICAL CHARACTERISTICS

DRIVER SECTION

OUTPUT CURRENT

OUTPUT VOLTAGE

VOLTAGE TRANSFER CHARACTERISTICS

= 12 V, V

= −12 V

= −9 V

= −6 V

= 9 V

= −9 V

= 25°C

= 9 V, V

(V = 1.9 V)

= 6 V, V

−4

−3

−6

−9

3-kΩ

Load Line

−8

−12

−16

−20

(V = 0.8 V)

= 3 kΩ

= 25°C

−12

0.2 0.4 0.6 0.8

1.2 1.4 1.6 1.8

−16 −12

−8

−4

V − Input Voltage − V

− Output Voltage − V

Figure 7

Figure 8

SHORT-CIRCUIT OUTPUT CURRENT

SLEW RATE

LOAD CAPACITANCE

FREE-AIR TEMPERATURE

1000

= 9 V

= −9 V

= 3 kΩ

= 25°C

(V = 1.9 V)

OS(L)

100

= 9 V

= −9 V

= 0

−3

−6

−9

(V = 0.8 V)

OS(H)

−12

100

C − Load Capacitance − pF

1000

10000

− Free-Air Temperature − °C

Figure 9

Figure 10

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂꢃ ꢄ ꢅ ꢄꢆ ꢀꢁ ꢇꢃ ꢄꢅ ꢄ

ꢈ ꢉ ꢊꢋ ꢌ ꢍꢊ ꢎ ꢏ ꢐꢑꢄꢅ ꢄ ꢁꢏ ꢌ ꢒꢎ ꢏꢐ ꢓꢔ ꢁ ꢏꢎ ꢕꢎ ꢌꢒ ꢎꢏꢐ

ꢖ

SLLS206J − MAY 1995 − REVISED NOVEMBER 2004

TYPICAL CHARACTERISTICS

INPUT THRESHOLD VOLTAGE

FREE-AIR TEMPERATURE

INPUT THRESHOLD VOLTAGE

SUPPLY VOLTAGE

2.4

2.2

1.8

1.6

1.4

1.2

IT+

1.8

1.6

1.4

1.2

IT+

IT−

0.8

0.6

0.4

0.2

IT−

0.8

0.6

0.4

− Free-Air Temperature − °C

− Supply Voltage − V

Figure 11

Figure 12

NOISE REJECTION

MAXIMUM SUPPLY VOLTAGE

FREE-AIR TEMPERATURE

= 5 V

= 25°C

See Note A

= 300 pF

= 500 pF

= 12 pF

= 100 pF

100

400 1000

4000 10000

− Pulse Duration − ns

≥ 3 kΩ (from each output to GND)

NOTE A: This figure shows the maximum amplitude of

positive-going pulse that, starting from 0 V, does not cause

a change of the output level.

− Free-Air Temperature − °C

Figure 13

Figure 14

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢄꢆ ꢀ ꢁꢇ ꢃꢄ ꢅꢄ

ꢈ ꢉꢊꢋ ꢌꢍ ꢊꢎ ꢏꢐꢑ ꢄꢅ ꢄ ꢁꢏꢌ ꢒꢎ ꢏꢐ ꢓꢔꢁ ꢏꢎꢕ ꢎꢌ ꢒ ꢎ ꢏꢐ

ꢖ

SLLS206J − MAY 1995 − REVISED NOVEMBER 2004

APPLICATION INFORMATION

Diodes placed in series with the V and V leads protect the GD65232 and GD75232 in the fault condition in which

the device outputs are shorted to 15 V and the power supplies are at low and provide low-impedance paths to ground

(see Figure 15).

Output

15 V

GD65232,

GD75232

GD65232,

GD75232

Figure 15. Power-Supply Protection to Meet Power-Off Fault Conditions of TIA/EIA-232-F

TL16C450

−12 V

ACE

GND

RY5

RA5

DY3

DTR

DA3

RY4

DA2

CTS

RA4

DY2

DY1

TIA/EIA-232-F

DB9S

Connector

GD65232,

GD75232

RTS

DA1

RY3

RY2

RY1

RA3

DSR

DCD

DSR

DCD

RA2

RA1

12 V

5 V

Figure 16. Typical Connection

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

4-Mar-2005

PACKAGING INFORMATION

Orderable Device

GD65232DBR

GD65232DW

GD65232DWR

GD65232N

Status ⁽¹⁾

ACTIVE

OBSOLETE

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

SSOP

2000

Pb-Free

(RoHS)

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

SOIC

Pb-Free

(RoHS)

CU NIPDAU Level-2-250C-1 YEAR/

Level-1-235C-UNLIM

2000

Pb-Free

(RoHS)

CU NIPDAU Level-2-250C-1 YEAR/

Level-1-235C-UNLIM

PDIP

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

CU NIPDAU Level-1-250C-UNLIM

GD65232PW

GD65232PWR

GD75232DB

GD75232DBR

GD75232DW

GD75232DWR

GD75232N

TSSOP

SSOP

SOIC

Pb-Free

(RoHS)

2000

Pb-Free

(RoHS)

Pb-Free

(RoHS)

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

2000

Pb-Free

(RoHS)

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

Pb-Free

(RoHS)

CU NIPDAU Level-2-250C-1 YEAR/

Level-1-235C-UNLIM

SOIC

2000

Pb-Free

(RoHS)

CU NIPDAU Level-2-250C-1 YEAR/

Level-1-235C-UNLIM

PDIP

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

CU NIPDAU Level-1-250C-UNLIM

GD75232PW

GD75232PWR

TSSOP

Pb-Free

(RoHS)

2000

Pb-Free

(RoHS)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional

product content details.

None: Not yet available Lead (Pb-Free).

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,

including bromine (Br) or antimony (Sb) above 0.1% of total product weight.

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

4-Mar-2005

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 2

MECHANICAL DATA

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001

DB (R-PDSO-G**)

PLASTIC SMALL-OUTLINE

28 PINS SHOWN

0,38

0,22

0,65

0,15

0,25

0,09

5,60

5,00

8,20

7,40

Gage Plane

0,25

0°–ā8°

0,95

0,55

Seating Plane

0,10

2,00 MAX

0,05 MIN

PINS **

DIM

6,50

5,90

6,50

5,90

7,50

8,50

7,90

10,50

9,90

10,50 12,90

A MAX

A MIN

6,90

9,90

12,30

4040065 /E 12/01

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.

D. Falls within JEDEC MO-150

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999

PW (R-PDSO-G**)

PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,30

0,19

0,10

0,65

0,15 NOM

4,50

4,30

6,60

6,20

Gage Plane

0,25

0°–8°

0,75

0,50

Seating Plane

0,10

0,15

0,05

1,20 MAX

PINS **

DIM

3,10

2,90

5,10

4,90

5,10

4,90

6,60

6,40

7,90

9,80

9,60

A MAX

A MIN

7,70

4040064/F 01/97

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.

D. Falls within JEDEC MO-153

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,

enhancements, improvements, and other changes to its products and services at any time and to discontinue

any product or service without notice. Customers should obtain the latest relevant information before placing

orders and should verify that such information is current and complete. All products are sold subject to TI’s terms

and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI

deems necessary to support this warranty. Except where mandated by government requirements, testing of all

parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for

their products and applications using TI components. To minimize the risks associated with customer products

and applications, customers should provide adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,

in which TI products or services are used. Information published by TI regarding third-party products or services

does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.

Use of such information may require a license from a third party under the patents or other intellectual property

of the third party, or a license from TI under the patents or other intellectual property of TI.

Reproduction of information in TI data books or data sheets is permissible only if reproduction is without

alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction

of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for

such altered documentation.

Resale of TI products or services with statements different from or beyond the parameters stated by TI for that

product or service voids all express and any implied warranties for the associated TI product or service and

is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.

Following are URLs where you can obtain information on other Texas Instruments products and application

solutions:

Products

Applications

Audio

Amplifiers

amplifier.ti.com

www.ti.com/audio

Data Converters

dataconverter.ti.com

Automotive

www.ti.com/automotive

DSP

dsp.ti.com

Broadband

Digital Control

Military

www.ti.com/broadband

www.ti.com/digitalcontrol

www.ti.com/military

Interface

Logic

interface.ti.com

logic.ti.com

Power Mgmt

Microcontrollers

power.ti.com

Optical Networking

Security

www.ti.com/opticalnetwork

www.ti.com/security

www.ti.com/telephony

www.ti.com/video

microcontroller.ti.com

Telephony

Video & Imaging

Wireless

www.ti.com/wireless

Mailing Address:

Texas Instruments

Post Office Box 655303 Dallas, Texas 75265

GD75232DBR相关文章

配单直通车

首天国际（深圳）科技有限公司服务专线: 0755-82807802/82807803 在线联系:

QQ：528164397 复制

QQ：1318502189 复制

深圳市中利达电子科技有限公司服务专线: 0755-83200645/13686833545 在线联系:

QQ：1902134819 复制

QQ：2881689472 复制

北京元坤伟业科技有限公司服务专线: 010-62104931621064316210489162104791 在线联系:

QQ：857273081 复制

QQ：1594462451 复制

柒号芯城电子商务（深圳）有限公司服务专线: 0755-83209937 在线联系:

QQ：2881677436 复制

QQ：2881620402 复制

深圳市芯福林电子有限公司服务专线: 13418564337 在线联系:

QQ：2881495808 复制

QQ：308365177 复制

GD75232DBR产品参数

型号:	GD75232DBR
Brand Name：	Texas Instruments
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
IHS 制造商：	TEXAS INSTRUMENTS INC
零件包装代码：	SSOP
包装说明：	SSOP-20
针数：	20
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
Factory Lead Time：	1 week
风险等级：	1.14
Is Samacsys：	N
其他特性：	EASY INTERFACE BETWEEN UART, SERIAL-PORT CONNECTOR OF IBM PC/AT
差分输出：	NO
驱动器位数：	3
高电平输入电流最大值：	0.00001 A
输入特性：	SCHMITT TRIGGER
接口集成电路类型：	LINE TRANSCEIVER
接口标准：	EIA-232-F; TIA-232-F; V.28
JESD-30 代码：	R-PDSO-G20
JESD-609代码：	e4
长度：	7.2 mm
湿度敏感等级：	1
标称负供电电压：	-9 V
功能数量：	3
端子数量：	20
最高工作温度：	70 °C
最低工作温度：
最小输出摆幅：	12 V
输出特性：	OPEN-COLLECTOR
最大输出低电流：	0.01 A
输出极性：	TRUE
封装主体材料：	PLASTIC/EPOXY
封装代码：	SSOP
封装等效代码：	SSOP20,.3
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）：	260
电源：	5,+-9/+-12 V
认证状态：	Not Qualified
最大接收延迟：	150 ns
接收器位数：	5
座面最大高度：	2 mm
子类别：	Line Driver or Receivers
最大压摆率：	25 mA
最大供电电压：	5.5 V
最小供电电压：	4.5 V
标称供电电压：	5 V
电源电压1-最大：	15 V
电源电压1-分钟：	7.5 V
电源电压1-Nom：	9 V
表面贴装：	YES
技术：	BIPOLAR
温度等级：	COMMERCIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING
端子节距：	0.65 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
最大传输延迟：	175 ns
宽度：	5.3 mm
Base Number Matches：	1

电子百科

产品导航

产品型号GD75232DBR的概述

产品型号GD75232DBR的Datasheet PDF文件预览

GD75232DBR相关产品

GD75232DBR相关文章

IC37:专业IC行业平台