GL6962芯片引脚定义引脚图及功能IC贸易商引脚图技术参数-中国IC网-芯三七

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产品型号GL6962的概述

GL6962芯片概述 GL6962是一款专为移动设备及其他电子产品设计的高性能集成电路（IC）。该芯片主要应用于显示驱动和控制领域，能够有效地为液晶显示器（LCD）及其他显示组件提供高质量的信号处理功能。凭借其高效的电源管理和精密的信号调节能力，GL6962被广泛应用于智能手机、平板电脑、智能手表等消费电子产品中。 GL6962的设计理念在于兼顾性能与能效，使其在现代电子产品中能够满足高分辨率显示的需求。为此，芯片集成了多种先进的技术，包括低功耗设计、快速响应时间以及卓越的色彩再现能力等。 GL6962详细参数 GL6962芯片的主要技术参数如下： - 芯片类型: 液晶显示驱动器 - 输入电压范围: 2.8V - 4.5V - 工作温度范围: -40°C 到 +85°C - 输出电流: 最大可达 30mA - 分辨率支持: 支持320x240、640x480等多种分辨率 - 接口类型...

产品型号GL6962的Datasheet PDF文件预览

GL6962/GL6962A

Low Voltage Universal Speech Network

Description

PIN Configuration

The GL6962 and GL6962A are bipolar integrated

circuits that perform all speech and line interface

functions required in fully electronic telephone sets.

They perform electronic switching between dialing

and speech. The ICs operate at line voltage down

to 1.6V DC (with reduced performance) to

facilitate the use of more telephone sets connected

in parallel.

(TOP View)

SLPE

TGA1

TGA2

AGC

REG

V_CC

Features

Low DC line voltage: operates down to 1.6V

(excluding polarity guard)

Voltage regulator with adjustable static

resistance

Provides a supply for external circuits

Symmetrical high-impedance inputs (64k¥ )Øfor

dynamic, magnetic or piezo-electric microphones

Asymmetrical high-impedance inputs(32k¥ )Ø

for electric microphones

GL6962

MUTE

DTMF

RGA

MIC-

MIC+

I_ref

V_EE

DTMF signal input with confidence tone

MUTE input for pulse or DTMF dialing

(GL6962)

* Pin 12 is active LOW(MUTE) for GL6962A

input for pulse or DTMF dialing

MUTE

(GL6962A)

Receiving amplifier for dynamic, magnetic or

piezo-electric earpieces.

Large gain setting ranges on microphone and

earpiece amplifiers.

Line loss compensation (line current dependent)

for microphone and earpiece amplifiers

Gain control curve adaptable to exchange supply

DC line voltage adjustment facility

Packaged in 16 DIP/SOP.

GL6962/GL6962A

Block Diagram

V_CC

RGC

RGA

TGC

MIC

TGA1

TGA2

MIC-

DTMF 11

(1)

MUTE

CONTROL

MUTE

SUPPLY

REFERENCE

LOW

VOLTAGE

CIRCUIT

RGC TGC

CURRENT

REFERENCE

CURRENT

CONTROL

V_EE

I_ref

AGC REG

SLPE

Pin 12 is active LOW (

) for GL6962A.

MUTE

GL6962/GL6962A

Pin Description

PIN NUMBER

SYMBOL

DESCRIPTION

Positive line terminal

TGA1

TGA2

Gain adjustment: transmitting amplifier

Non-inverting output: receiving amplifier

Gain adjustment: receiving amplifier

Inverting microphone input

Non-Inverting microphone input

Current stabilizer

RGA

MIC-

MIC+

I_ref

V_EE

Negative line terminal

Receiving amplifier input

DTMF

MUTE

V_CC

Dual-tone multi-frequency input

Mute input ⁽¹⁾

Positive decoupling

REG

AGC

SLPE

Voltage regulator decoupling

Automatic gain control input

Slope (DC resistance) adjustment.

(1) Pin 12 is active LOW (MUTE ) for GL6962A.

GL6962/GL6962A

Absolute Maximum Ratings

SYMBOL

V_LN

PARAMETER

Positive continuous line voltage

Line Current

MIN

MAX

UNIT

I_line

R9 = 20 ; Note1

GL6962 ; GL6962A

140

V_i

Input voltage on all other pins

Positive input voltage

Negative input voltage

Total power dissipation

R9 = 20 ; Note2

V_CC+0.7

-0.7

P_tot

GL6962 ; GL6962A

Operating ambient temperature

Storage temperature

-25

-40

666

+75

+125

¡ É

T_amb

T_stg

Maximum Ratings are those values beyond which damage to the device may occur.

Functional Operation should be restricted to the limits in the Electrical Characteristics tables or

pin Descriptions section

Notes to the Absolute Maximum Ratings

1. Mostly dependent on the maximum required T_amband on the voltage between LN and SLPE.

2. Calculated for the maximum ambient temperature specified T_amb= 75¡ Éand maximum

junction temperature of 125¡ .É

GL6962/GL6962A

Electrical Characteristics

I_line= 11 to 140 mA, V_EE= 0V, f = 800Hz; T_amb= 25¡ É; unless otherwise specified

SYMBOL

PARAMETER

CONDITION

MIN

TYP

MAX

UNIT

Supplies LN and VCC (Pin 1 and 13)

V_LN

Voltage drop over circuit

Between LN and V_EE

MIC inputs open circuit

I_line= 1mA

1.6

1.9

4.0

5.7

I_line= 4mA

I_line= 15mA

I_line= 100mA

I_line= 140mA

I_line= 15mA

3.55

4.9

4.25

6.5

7.5

V_LN

Voltage drop over circuit

between LN and V_EEwith R_VA(LN to REG)=68 k§ Ù

3.5

4.5

0.9

external resistor R_VA

Supply current

R_VA(REG to SLPE)=39k§ Ù

V_CC= 2.8V

I_CC

1.35

V_CC

Supply voltage available for I_line= 15mA

peripheral circuitry

GL6962

MUTE = HIGH

IP = 1.2mA

IP = 0mA

2.2

2.7

3.4

GL6962A

= LOW

MUTE

IP = 1.2mA

IP = 0mA

2.2

2.7

3.4

Microphone inputs MIC- and MIC+ (pin 6 and 7)

| Z_i|

Input inpedance

Differential

Between MIC- and MIC+

MIC- or MIC+ to V_EE

k§ Ù

Single-ended

Common mode rejection

ratio

CMRR

G_V

Voltage gain MIC+ or MIC- I_line= 15mA

50.5

52.0

53.5

to LN

R7 = 68k§ Ù

¥ ÄG_vf

Gain

frequency

800Hz

variation

referred

with f = 300 and 3400 Hz

¡ 0¾.2

GL6962/GL6962A

SYMBOL

PARAMETER

CONDITION

MIN TYP MAX UNIT

DTMF input (pin 11)

| Z_i|

G_V

Input impedance

Voltage gain from DTMF to LN

k§ Ù

I_line= 15mA

24.0 25.5 27.0

R7 = 68k§ Ù

¥ ÄG_vf

Gain variation with frequency referred to 80 f = 300 and 3400

¡ ¾

0.2

Gain adjustment input TGA1 and TGA2 (pin 2 and 3)

¥ ÄG_v

Transmitting amplifier gain variation by

adjustment of R7 between TGA1 and TGA2

-8

Sending adjustment output LN (pin 1)

V_LN(RMS)Output voltage (RMS value)

THD = 10%

I_line= 4mA

I_line= 15mA

R7 = 68 k§ Ù

200 § Ù between

MIC-

1.7

0.8

2.3

-69

dBmp

V_no(RMS)

Noise output voltage

(RMS value)

and MIC+;

psophometrically

weighted

Receiving amplifier input IR (pin 10)

| Z_i| Input impedance

Receiving amplifier output QR (pin 4)

k§ Ù

| Z_o|

G_V

Output impedance

Voltage gain from IR to QR

¥ Ø

I_line= 15mA

29.5 31.0 32.5

R_L=300 ¥ Ø

(from pin

pin4)

9 to

¥ ÄG_vf

Gain variation with frequency referred to f = 300 and 3400

800Hz Hz

¡ ¾

0.2

GL6962/GL6962A

SYMBOL

V_o(RMS)

PARAMETER

Output voltage(RMS value)

CONDITION

THD = 2 %

MIN TYP MAX UNIT

sinewave drive ;

R4 = 100k¥ Ø

I_line= 15mA ; I_p= 0mA ;

R_L= 150 ¥ Ø

THD = 10% ;

0.22

0.3

0.33

0.48

V_o(RMS)

Output voltage(RMS value)

R4 = 100 k¥ Ø;

R_L= 150 ¥ Ø

I_line= 4mA

V_no(RMS)

Noise output voltage

(RMS value)

I_line= 15mA ;

• V

R4 =100 k¥ Ø;

IR open-circuit

psophometrically weighted

R_L=300 ¥ Ø

Gain adjustment input RGA (pin 5)

¥ ÄG_vReceiving amplifier gain Variation by

adjustment of R4 between RGA and QR

MUTE input (pin 12)

-11

V_IH

V_IL

HIGH level input voltage

1.5

V_CC

0.3

LOW level input voltage

Input current

I_MUTE

µA

Reduction of gain

G_vVoltage gain from DTMF to QR

R4 =100 k¥ Ø;

R_L= 300 ¥ Ø

MUTE = HIGH

GL6962

GL6962A

-19

= LOW

MUTE

Automatic gain control input AGC (pin 15)

¥ ÄG_vControlling the gain from IR to QR and the

R6 =100 K¥ ø

gain from MIC+, MIC- to LN

Gain control range

(between AGC and V_EE)

I_line= 70mA

-5.8

GL6962/GL6962A

Test Circuit

I_line

620¥ Ø

V_CC

V_O

100• F

100k¥ Ø

100pF

DTMF

MUTE

R_L

600¥

RGA

GL6962A

1 nF

100•F

MIC+

MIC-

V_i

10 to

140mA

10• F

SLPE

TGA1

TGA2

REG

AGC

I_ref

V_EE

68k¥ Ø

4.7• F

100pF

1 nF

3. 6k

¥ Ø

20¥

For measuring gain from MIC+ and MIC-, the MUTE input should be LOW or open-circuit.

For measuring the DTMF input, the MUTE input should be HIGH.

Inputs not being tested should be open-circuit.

Fig. 1 Test circuit for defining GL6962 voltage gain of MIC+, MIC- and DTMF inputs.

(Voltage gain is defined as G_V= 20log |V_o/V_i|

GL6962/GL6962A

I_line

620¥ Ø

V_CC

V_O

100• F

100k¥ Ø

100pF

DTMF

R_L

600¥

RGA

GL6962A

1 nF

100•F

MUTE

MIC+

MIC-

V_i

10 to

140mA

10• F

SLPE

TGA1

TGA2

REG

AGC

I_ref

V_EE

68k¥ Ø

4.7• F

100pF

1 nF

3. 6k

20¥

¥ Ø

For measuring gain from MIC+ and MIC-, the

input should be HIGH.

MUTE

For measuring the DTMF input, the

input should be LOW or open-circuit.

MUTE

Inputs not being tested should be open-circuit.

Fig. 2 Test circuit for defining GL6962A voltage gain of MIC+, MIC- and DTMF inputs.

(Voltage gain is defined as G_V= 20log |V_o/V_i|

GL6962/GL6962A

line

620¥ Ø

100• F

¥ Ø

10µ

Z_L

DTMF

100k¥ Ø

100pF

GL6962

1 nF

MIC+

MIC-

140mA

V_i

SLPE

TGA1

REG

AGC

ref

100•

¥ Ø

4.7• F

100pF

1 nF

3. 6k

¥ Ø

Fig. 3 Test circuit for defining GL696

(Voltage gain is defined as G = 20log | _o/V |

GL6962/GL6962A

I_line

620¥ Ø

V_CC

100• F

10µF

V_O

Z_L

600¥ Ø

DTMF

100pF

GL6962A

100k

MUTE

RGA

MIC+

MIC-

10 to

140mA

V_i

SLPE

TGA1

TGA2

REG

AGC

I_ref

V_EE

100•F

68k¥ Ø

100pF

4.7• F

20¥

1 nF

¥ Ø

Fig. 4 Test circuit for defining GL6962A voltage gain of receiving amplifier.

(Voltage gain is defined as G_V= 20log |V_o/V_i|

GL6962/GL6962A

Application Circuit

620¥ Ø

100µF

130K

V_CC

R 10

13µ

12V

100nF

DTMF

from dial

and

control circuit

Telephone

Line

100pF

GL6962

⁽¹⁾MUTE

RGA

3.92k

1 nF

MIC+

MIC-

SLPE

TGA1

TGA2

REG

AGC

I_ref

V_EE

390

R_VA(R_16-14

)

3. 6k

¥ Ø

Z_bal

4.7• F

1 nF

20¥ Ø

(1)

Pin 12 is active LOW (

) for GL6962A.

MUTE

Fig. 5 Typical application of GL6962, shown there with piezo-electric earpiece and DTMF dialing.

(The diode bridge, the zener diode and R10 limit current into, and the voltage across, the circuit

during line transients. A different protection requirement is required for pulse dialing or register

recall.)

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GL6962产品参数

型号:	GL6962
生命周期：	Obsolete
IHS 制造商：	SK HYNIX INC
零件包装代码：	DIP
包装说明：	DIP, SOP16,.25
针数：	16
Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01
风险等级：	5.84
JESD-30 代码：	R-PDIP-T16
功能数量：	1
端子数量：	16
最高工作温度：	75 °C
最低工作温度：	-25 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP
封装等效代码：	SOP16,.25
封装形状：	RECTANGULAR
封装形式：	IN-LINE
电源：	2.8 V
认证状态：	Not Qualified
子类别：	Other Telecom ICs
最大压摆率：	0.00135 mA
标称供电电压：	2.8 V
表面贴装：	NO
技术：	BIPOLAR
电信集成电路类型：	TELEPHONE SPEECH CIRCUIT
温度等级：	COMMERCIAL EXTENDED
端子形式：	THROUGH-HOLE
端子节距：	1.27 mm
端子位置：	DUAL
Base Number Matches：	1

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产品型号GL6962的概述

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