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HAF70009

Data Sheet

August 1999

File Number 4770

56A, 100V, 0.025 Ohm, N-Channel

UltraFET Power MOSFET

Features

• 56A, 100V

This N-Channel power MOSFET is

manufactured using the innovative

UltraFET™ process. This advanced

• Simulation Models

©

- Temperature Compensated PSPICE® and SABER

Electrical Models

process technology achieves the

- Spice and Saber Thermal Impedance Models

- www.intersil.com

lowest possible on-resistance per silicon area, resulting in

outstanding performance. This device is capable of

withstanding high energy in the avalanche mode and the

diode exhibits very low reverse recovery time and stored

charge. It was designed for use in applications where power

efﬁciency is important, such as switching regulators,

switching converters, motor drivers, relay drivers, low-

voltage bus switches, and power management in portable

and battery-operated products.

• Peak Current vs Pulse Width Curve

• UIS Rating Curve

• Related Literature

- TB334, “Guidelines for Soldering Surface Mount

Components to PC Boards”

Symbol

Formerly developmental type TA75639.

D

Ordering Information

G

o

PART NUMBER

PACKAGE

TEMP. RANGE ( C)

HAF70009

TO-220AB

-55 to 175

S

Packaging

JEDEC TO-220AB

SOURCE

DRAIN

GATE

DRAIN

(FLANGE)

o

Absolute Maximum Ratings

T

= 25 C, Unless Otherwise Speciﬁed

C

HAF70009

100

UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

V

DSS

DGR

Drain to Gate Voltage (R

GS

= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

100

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain Current

±20

GS

Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

56

A

D

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Figure 4

DM

Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

AS

Figures 6, 14, 15

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

Derate Above 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

200

1.35

W

D

o

W/ C

o

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T , T

J

-55 to 175

C

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Tech Brief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

o

300

260

C

L

o

pkg

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTE:

o

1. T = 25 C to 150 C.

J

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

UltraFET™ is a trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation.

4-1

HAF70009

o

Electrical Speciﬁcations

PARAMETER

T = 25 C, Unless Otherwise Speciﬁed

C

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

OFF STATE SPECIFICATIONS

Drain to Source Breakdown Voltage

Zero Gate Voltage Drain Current

BV

I

= 250µA, V

= 0V (Figure 11)

100

-

V

DSS

D

GS

I

V

= 90V, V

= 80V, V

= ±20V

= 0V

= 0V, T = 150 C

-

1

µA

nA

DSS

DS

GS

o

250

±100

C

Gate to Source Leakage Current

ON STATE SPECIFICATIONS

Gate to Source Threshold Voltage

Drain to Source On Resistance

THERMAL SPECIFICATIONS

I

GSS

V

= V , I = 250µA (Figure 10)

2

-

4

V

GS(TH)

GS

DS

D

r

I

= 56A, V

= 10V (Figure 9)

0.021

0.025

Ω

DS(ON)

D

GS

o

Thermal Resistance Junction to Case

Thermal Resistance Junction to Ambient

R

(Figure 3)

TO-220

-

0.74

62

C/W

θJC

o

C/W

θJA

SWITCHING SPECIFICATIONS (V

Turn-On Time

= 10V)

GS

t

V

R

= 50V, I

D

56A,

= 10V,

-

110

ns

ON

DD

= 0.89Ω, V

L

GS

Turn-On Delay Time

Rise Time

t

15

60

20

25

-

d(ON)

= 5.1Ω

GS

(Figures 18,19)

t

r

Turn-Off Delay Time

Fall Time

t

-

d(OFF)

t

-

f

Turn-Off Time

t

70

OFF

GATE CHARGE SPECIFICATIONS

Total Gate Charge

Q

V

= 0V to 20V

= 0V to 10V

= 0V to 2V

V

DD

= 50V,

56A,

-

110

57

130

75

4.5

-

nC

g(TOT)

GS

I

D

Gate Charge at 10V

Q

g(10)

g(TH)

R

= 0.89Ω

L

I

= 1.0mA

Threshold Gate Charge

Q

g(REF)

(Figures 13, 16, 17)

3.7

9.8

24

Gate to Source Gate Charge

Reverse Transfer Capacitance

CAPACITANCE SPECIFICATIONS

Input Capacitance

Q

gs

gd

Q

-

C

V

= 25V, V

GS

= 0V,

-

2000

500

65

-

pF

ISS

DS

f = 1MHz

(Figure 12)

Output Capacitance

C

OSS

RSS

Reverse Transfer Capacitance

C

Source to Drain Diode Speciﬁcations

PARAMETER

Source to Drain Diode Voltage

Reverse Recovery Time

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

1.25

110

UNITS

V

I

= 56A

-

SD

t

= 56A, dI /dt = 100A/µs

SD

ns

rr

Reverse Recovered Charge

Q

= 56A, dI /dt = 100A/µs

SD

320

nC

RR

4-2

HAF70009

Typical Performance Curves

1.2

1.0

0.8

60

50

40

30

20

10

0

0.6

0.4

0.2

0

25

50

75

100

125

150

175

0

25

50

75

100

125

o

150

175

o

T

, CASE TEMPERATURE ( C)

T , CASE TEMPERATURE ( C)

C

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

2

DUTY CYCLE - DESCENDING ORDER

0.5

0.2

1

0.1

0.05

0.02

0.01

P

DM

0.1

t

1

t

2

NOTES:

DUTY FACTOR: D = t /t

SINGLE PULSE

1

2

PEAK T = P

x Z

x R + T

θJC C

J

DM

θJC

0.01

-4

-3

-2

10

-1

10

0

1

-5

10

t, RECTANGULAR PULSE DURATION (s)

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

1000

100

10

o

T

= 25 C

FOR TEMPERATURES

o

C

ABOVE 25 C DERATE PEAK

CURRENT AS FOLLOWS:

175 - T

150

C

I = I

25

V

= 10V

GS

TRANSCONDUCTANCE

MAY LIMIT CURRENT

IN THIS REGION

-5

10

-4

10

-3

10

-2

10

-1

0

1

10

t, PULSE WIDTH (s)

FIGURE 4. PEAK CURRENT CAPABILITY

4-3

HAF70009

Typical Performance Curves (Continued)

300

100

If R = 0

= (L)(I )/(1.3*RATED BV

1000

t

- V )

DD

AV

If R ≠ 0

AS

DSS

T

= MAX RATED

J

o

t

AV

= (L/R)ln[(I *R)/(1.3*RATED BV

AS

- V ) +1]

DSS DD

T

= 25 C

C

100

o

STARTING T = 25 C

J

100µs

o

STARTING T = 150 C

J

10

1

1ms

OPERATION IN THIS

AREA MAY BE

10ms

V

= 100V

LIMITED BY r

DS(ON)

DSS(MAX)

10

0.001

0.01

0.1

1

10

, DRAIN TO SOURCE VOLTAGE (V)

100

200

t

, TIME IN AVALANCHE (ms)

AV

V

DS

NOTE: Refer to Intersil Application Notes AN9321 and AN9322.

FIGURE 5. FORWARD BIAS SAFE OPERATING AREA

FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY

100

80

60

40

20

0

100

V

= 6V

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

o

GS

175 C

V

= 15V

80

60

40

20

0

DD

V

= 20V

GS

V

GS

= 10V

V

= 10V

GS

V

= 7V

GS

V

= 5V

GS

PULSE DURATION = 80µs

o

25 C

DUTY CYCLE = 0.5% MAX

-55 C

o

T

= 25 C

C

0

1

2

3

4

5

6

7

0

1.5

3.0

4.5

6.0

7.5

V

, DRAIN TO SOURCE VOLTAGE (V)

DS

V

GS

, GATE TO SOURCE VOLTAGE (V)

FIGURE 7. SATURATION CHARACTERISTICS

FIGURE 8. TRANSFER CHARACTERISTICS

3.0

1.2

PULSE DURATION = 80µs

V

= V , I = 250µA

DS

GS

D

DUTY CYCLE = 0.5% MAX

2.5

2.0

1.5

1.0

0.5

0

V

= 10V, I = 56A

D

GS

1.0

0.8

0.6

-80

-40

0

40

80

120

160

200

-80

-40

0

40

80

120

160

200

o

T , JUNCTION TEMPERATURE ( C)

J

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs

JUNCTION TEMPERATURE

RESISTANCE vs JUNCTION TEMPERATURE

4-4

HAF70009

Typical Performance Curves (Continued)

1.2

3000

2500

2000

1500

1000

500

V

= 0V, f = 1MHz

GS

ISS

I

= 250µA

D

C

= C + C

GS GD

= C

GD

RSS

OSS

≈ C + C

DS

GD

1.1

1.0

0.9

C

ISS

C

OSS

C

RSS

0

10

20

30

40

50

60

-80

-40

0

40

80

120

160

200

o

T , JUNCTION TEMPERATURE ( C)

V

, DRAIN TO SOURCE VOLTAGE (V)

DS

J

FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

10

8

6

4

WAVEFORMS IN

DESCENDING ORDER:

I

= 56A

= 37A

= 18A

D

2

V

= 50V

DD

0

10

20

30

40

50

60

Qg, GATE CHARGE (nC)

NOTE: Refer to Intersil Application Notes AN7254 and AN7260.

FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT

4-5

HAF70009

Test Circuits and Waveforms

V

DS

BV

DSS

L

t

P

V

DS

I

VARY t TO OBTAIN

P

AS

+

-

V

DD

R

REQUIRED PEAK I

G

AS

V

DD

V

GS

DUT

t

P

I

AS

0V

0

0.01Ω

t

AV

FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT

FIGURE 15. UNCLAMPED ENERGY WAVEFORMS

V

DS

V

Q

DD

R

g(TOT)

L

V

DS

V

= 20V

GS

V

Q

GS

g(10)

+

-

V

DD

V

= 10V

V

GS

DUT

V

= 2V

GS

I

0

G(REF)

Q

g(TH)

Q

gd

gs

I

g(REF)

0

FIGURE 16. GATE CHARGE TEST CIRCUIT

FIGURE 17. GATE CHARGE WAVEFORM

V

t

DS

ON

OFF

t

d(OFF)

t

d(ON)

t

f

R

L

r

V

DS

90%

+

V

GS

V

DD

10%

0

-

DUT

90%

50%

R

GS

V

GS

50%

PULSE WIDTH

10%

V

GS

0

FIGURE 18. SWITCHING TIME TEST CIRCUIT

FIGURE 19. RESISTIVE SWITCHING WAVEFORMS

4-6

HAF70009

PSPICE Electrical Model

SUBCKT HUF75639 2 1 3 ;

rev Oct. 98

CA 12 8 2.8e-9

CB 15 14 2.65e-9

CIN 6 8 1.9e-9

LDRAIN

DPLCAP

10

DRAIN

2

5

DBODY 7 5 DBODYMOD

DBREAK 5 11 DBREAKMOD

DPLCAP 10 5 DPLCAPMOD

RLDRAIN

RSLC1

51

DBREAK

EBREAK 11 7 17 18 110

EDS 14 8 5 8 1

EGS 13 8 6 8 1

ESG 6 10 6 8 1

EVTHRES 6 21 19 8 1

EVTEMP 20 6 18 22 1

+

RSLC2

5

51

ESLC

11

-

50

+

-

17

18

-

DBODY

RDRAIN

6

8

EBREAK

ESG

IT 8 17 1

EVTHRES

+

16

21

+

-

19

8

MWEAK

LDRAIN 2 5 2e-9

LGATE 1 9 1e-9

LSOURCE 3 7 0.47e-9

LGATE

EVTEMP

+

RGATE

GATE

1

6

-

18

22

MMED

9

20

MSTRO

8

RLGATE 1 9 10

RLDRAIN 2 5 20

RLSOURCE 3 7 4.69

RLGATE

LSOURCE

CIN

SOURCE

3

7

RSOURCE

MMED 16 6 8 8 MMEDMOD

MSTRO 16 6 8 8 MSTROMOD

RLSOURCE

MWEAK 16 21 8 8 MWEAKMOD

S1A

S2A

RBREAK

12

15

13

14

13

17

18

RBREAK 17 18 RBREAKMOD 1

RDRAIN 50 16 RDRAINMOD 1.3e-2

RGATE 9 20 0.7

RSLC1 5 51 RSLCMOD 1e-6

RSLC2 5 50 1e3

RSOURCE 8 7 RSOURCEMOD 4.5e-3

RVTHRES 22 8 RVTHRESMOD 1

RVTEMP 18 19 RVTEMPMOD 1

8

RVTEMP

19

-

S1B

S2B

13

CB

CA

IT

14

+

VBAT

6

8

5

8

EGS

EDS

+

-

8

22

S1A 6 12 13 8 S1AMOD

S1B 13 12 13 8 S1BMOD

S2A 6 15 14 13 S2AMOD

S2B 13 15 14 13 S2BMOD

RVTHRES

VBAT 22 19 DC 1

ESLC 51 50 VALUE = {(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*115),4))}

.MODEL DBODYMOD D (IS = 1.4e-12 RS = 3.3e-3 XTI = 4.7 TRS1 = 2e-3 TRS2 = 0.1e-5 CJO = 3.3e-9 TT = 6.1e-8 M = 0.7)

.MODEL DBREAKMOD D (RS = 3.5e-1 TRS1 = 1e-3 TRS2 = 1e-6)

.MODEL DPLCAPMOD D (CJO = 2.2e-9 IS = 1e-30 N = 10 M = 0.95 vj = 1.0)

.MODEL MMEDMOD NMOS (VTO = 3.5 KP = 4.8 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u Rg = 0.7)

.MODEL MSTROMOD NMOS (VTO = 3.97 KP = 56.5 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)

.MODEL MWEAKMOD NMOS (VTO =3.11 KP = 0.085 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 7 RS = 0.1)

.MODEL RBREAKMOD RES (TC1 = 0.8e-3 TC2 = 1e-6)

.MODEL RDRAINMOD RES (TC1 = 1e-2 TC2 = 1.75e-5)

.MODEL RSLCMOD RES (TC1 = 2.8e-3 TC2 = 14e-6)

.MODEL RSOURCEMOD RES (TC1 = 0 TC2 = 0)

.MODEL RVTHRESMOD RES (TC = -2.0e-3 TC2 = -1.75e-5)

.MODEL RVTEMPMOD RES (TC1 = -2.75e-3 TC2 = 0.05e-9)

.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -6.0 VOFF = -3.5)

.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3.5 VOFF = -6.0)

.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.5 VOFF = 4.95)

.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 4.95 VOFF = -2.5)

.ENDS

NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global

Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.

4-7

HAF70009

SABER Electrical Model

nom temp=25 deg c 100v Ultrafet

REV Oct. 98

template huf75639 n2,n1,n3

electrical n2,n1,n3

{

LDRAIN

RLDRAIN

RDBODY

var i iscl

DPLCAP

DRAIN

2

5

d..model dbodymod = (is=1.4e-12, xti=4.7, cjo=33e-10,tt=6.1e-8, m=0.7)

d..model dbreakmod = ()

10

d..model dplcapmod = (cjo=22e-10,is=1e-30,n=10,m=0.95, vj=1.0)

m..model mmedmod = (type=_n,vto=3.5,kp=4.8,is=1e-30, tox=1)

m..model mstrongmod = (type=_n,vto=3.97,kp=56.5,is=1e-30, tox=1)

m..model mweakmod = (type=_n,vto=3.11,kp=0.085,is=1e-30, tox=1)

sw_vcsp..model s1amod = (ron=1e-5,roff=0.1,von=-6.0,voff=-3.5)

sw_vcsp..model s1bmod = (ron=1e-5,roff=0.1,von=-3.5,voff=-6.0)

sw_vcsp..model s2amod = (ron=1e-5,roff=0.1,von=-2.5,voff=4.95)

sw_vcsp..model s2bmod = (ron=1e-5,roff=0.1,von=4.95,voff=-2.5)

RSLC1

51

RDBREAK

72

DBREAK

11

RSLC2

ISCL

50

-

71

RDRAIN

6

8

ESG

c.ca n12 n8 = 28.5e-10

c.cb n15 n14 = 26.5e-10

c.cin n6 n8 = 19e-10

EVTHRES

+

16

21

-

19

8

MWEAK

LGATE

EVTEMP

+

DBODY

RGATE

GATE

1

6

-

18

22

EBREAK

+

MMED

d.dbody n7 n71 = model=dbodymod

d.dbreak n72 n11 = model=dbreakmod

d.dplcap n10 n5 = model=dplcapmod

9

20

MSTRO

8

17

18

-

RLGATE

LSOURCE

CIN

SOURCE

3

i.it n8 n17 = 1

7

RSOURCE

l.ldrain n2 n5 = 2.0e-9

l.lgate n1 n9 = 1e-9

l.lsource n3 n7 = 4.69e-10

RLSOURCE

S1A

S2A

RBREAK

12

15

13

8

14

13

17

18

m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u

m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u

m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u

RVTEMP

19

-

S1B

S2B

13

CB

CA

IT

14

res.rbreak n17 n18 = 1, tc1=0.8e-3,tc2=-1e-6

res.rdbody n71 n5 = 3.3e-3, tc1=2.0e-3, tc2=0.1e-5

res.rdbreak n72 n5 = 3.5e-1, tc1=1e-3, tc2=1e-6

res.rdrain n50 n16 = 13e-3, tc1=1e-2,tc2=1.75e-5

res.rgate n9 n20 = 0.7

+

VBAT

6

8

5

8

EGS

EDS

+

-

8

22

res.rldrain n2 n5 = 20

res.rlgate n1 n9 = 10

RVTHRES

res.rlsource n3 n7 = 4.69

res.rslc1 n5 n51 = 1e-6, tc1=2.8e-3,tc2=14e-6

res.rslc2 n5 n50 = 1e3

res.rsource n8 n7 = 4.5e-3, tc1=0,tc2=0

res.rvtemp n18 n19 = 1, tc1=-2.75e-3,tc2=0.05e-9

res.rvthres n22 n8 = 1, tc1=-2e-3,tc2=-1.75e-5

spe.ebreak n11 n7 n17 n18 = 110

spe.eds n14 n8 n5 n8 = 1

spe.egs n13 n8 n6 n8 = 1

spe.esg n6 n10 n6 n8 = 1

spe.evtemp n20 n6 n18 n22 = 1

spe.evthres n6 n21 n19 n8 = 1

sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod

sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod

sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod

sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod

v.vbat n22 n19 = dc=1

equations {

i (n51->n50) +=iscl

iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/115))** 4))

}

4-8

HAF70009

Spice Thermal Model

JUNCTION

TH

REV APRIL 1998

HUF75639

CTHERM1 TH 6 5.0e-3

CTHERM2 6 5 1.9e-2

CTHERM3 5 4 7.95e-3

CTHERM4 4 3 9.0e-3

CTHERM5 3 2 2.95e-2

CTHERM6 2 TL 12.55

RTHERM1

RTHERM2

RTHERM3

RTHERM4

RTHERM5

RTHERM6

CTHERM1

6

RTHERM1 TH 6 5.04e-3

RTHERM2 6 5 1.25e-2

RTHERM3 5 4 3.54e-2

RTHERM4 4 3 1.98e-1

RTHERM5 3 2 2.99e-1

RTHERM6 2 TL 3.97e-2

CTHERM2

CTHERM3

CTHERM4

CTHERM5

CTHERM6

5

Saber Thermal Model

Saber thermal model HUF75639

template thermal_model th tl

thermal_c th, tl

{

ctherm.ctherm1 th 6 = 5.0e-3

ctherm.ctherm2 6 5 = 1.9e-2

ctherm.ctherm3 5 4 = 7.95e-3

ctherm.ctherm4 4 3 = 9.0e-3

ctherm.ctherm5 3 2 = 2.95e-2

ctherm.ctherm6 2 tl = 12.55

4

3

2

rtherm.rtherm1 th 6 = 5.04e-3

rtherm.rtherm2 6 5 = 1.25e-2

rtherm.rtherm3 5 4 = 3.54e-2

rtherm.rtherm4 4 3 = 1.98e-1

rtherm.rtherm5 3 2 = 2.99e-1

rtherm.rtherm6 2 tl = 3.97e-2

}

TL

CASE

4-9

HAF70009

TO-220AB

3 LEAD JEDEC TO-220AB PLASTIC PACKAGE

A

INCHES

MIN

MILLIMETERS

E

ØP

SYMBOL

MAX

0.180

0.052

0.034

0.055

0.019

0.610

0.160

0.410

0.030

MIN

4.32

1.22

0.77

1.15

0.36

14.99

-

MAX

4.57

NOTES

A

1

A

0.170

0.048

0.030

0.045

0.014

0.590

-

Q

H

1

A

1.32

-

1

b

0.86

3, 4

TERM. 4

D

b

1.39

2, 3

1

o

45

E

1

c

0.48

2, 3, 4

D

1

D

15.49

4.06

-

L

1

D

1

b₁

b

E

0.395

-

10.04

-

10.41

0.76

-

L

E

-

c

1

e

0.100 TYP

0.200 BSC

0.235

2.54 TYP

5.08 BSC

5

-

o

60

e

1

2

e

3

1

J

1

H

0.255

0.110

0.550

0.150

0.153

0.112

5.97

6.47

2.79

13.97

3.81

3.88

2.84

1

e₁

J

0.100

0.530

0.130

0.149

0.102

2.54

13.47

3.31

6

-

L

2

-

1

ØP

Q

3.79

2.60

-

NOTES:

1. These dimensions are within allowable dimensions of Rev. J of

JEDEC TO-220AB outline dated 3-24-87.

2. Lead dimension and finish uncontrolled in L .

1

3. Lead dimension (without solder).

4. Add typically 0.002 inches (0.05mm) for solder coating.

5. Position of lead to be measured 0.250 inches (6.35mm) from bot-

tom of dimension D.

6. Position of lead to be measured 0.100 inches (2.54mm) from bot-

tom of dimension D.

7. Controlling dimension: Inch.

8. Revision 2 dated 7-97.

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certiﬁcation.

Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-

out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

Sales Ofﬁce Headquarters

NORTH AMERICA

EUROPE

ASIA

Intersil Corporation

Intersil SA

Mercure Center

100, Rue de la Fusee

1130 Brussels, Belgium

TEL: (32) 2.724.2111

FAX: (32) 2.724.22.05

Intersil (Taiwan) Ltd.

7F-6, No. 101 Fu Hsing North Road

Taipei, Taiwan

Republic of China

TEL: (886) 2 2716 9310

FAX: (886) 2 2715 3029

P. O. Box 883, Mail Stop 53-204

Melbourne, FL 32902

TEL: (407) 724-7000

FAX: (407) 724-7240

4-10

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