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产品型号HCMS-2905的概述

HCMS-2905 芯片概述 HCMS-2905 是一种高亮度、低功耗的七段显示器驱动芯片,广泛应用于电子设备中,用于数字数据显示。1990年代以来,其凭借亮度高、读数清晰的特点,在家用电器、仪表设备、计算器以及各种消费电子中找到了应用。 该芯片采用了高效的LED矩阵,能够显示数字0-9和一些字母字符。HCMS-2905 是一种共阴极的显示器,这意味着所有的阴极节点都连接在一起,用户只需将阳极与适当的驱动电压连接即可实现显示。 HCMS-2905 的详细参数 HCMS-2905 的主要技术参数包括: - 工作电压: 通常在 5V 到 10V 之间运行,具体值可根据应用环境进行调整。 - 工作电流: 通常为 20 mA,使得显示效果更加明亮。 - 显示类型: 七段 LED 显示,通过不同的组合可呈现各种数字和部分字母。 - 封装类型: HCMS-2905 通常使用 DIP-14 封装,便...

产品型号HCMS-2905的Datasheet PDF文件预览

High Performance CMOS 5 x 7  
Alphanumeric Displays  
Technical Data  
HCMS-29xx Series  
Features  
• Easy to Use  
• Interfaces Directly with  
Microprocessors  
• 0.15" Character Height in 4,  
8, and 16 (2x8) Character  
Packages  
Description  
The HCMS-29xx series are high  
performance, easy to use dot  
matrix displays driven by on-board  
CMOS ICs. Each display can be  
directly interfaced with a  
microprocessor, thus eliminating  
the need for cumbersome interface  
components. The serial IC  
• 0.20" Character Height in 4  
and 8 Character Packages  
interface allows higher character  
count information displays with a  
minimum of data lines. A variety of  
colors, font heights, and character  
counts gives designers a wide  
range of product choices for their  
specific applications and the easy  
to read 5 x 7 pixel format allows  
the display of uppercase, lower  
case, Katakana, and custom user-  
defined characters. These displays  
are stackable in the x- and y-  
• Rugged X- and Y-Stackable  
Package  
• Serial Input  
• Convenient Brightness  
Controls  
• Wave Solderable  
• Offered in Five Colors  
• Low Power CMOS  
Technology  
Applications  
Telecommunications  
Equipment  
Portable Data Entry Devices  
Computer Peripherals  
Medical Equipment  
Test Equipment  
Business Machines  
Avionics  
• TTL Compatible  
directions, making them ideal for  
high character count displays.  
Industrial Controls  
Device Selection Guide  
AlGaAs  
HER  
HCMS-  
Orange  
HCMS-  
Yellow  
HCMS-  
Green  
HCMS-  
Package  
Drawing  
Description  
HCMS-  
2905  
2915  
2925  
2965  
2975  
1 x 4 0.15" Character  
1 x 8 0.15" Character  
2 x 8 0.15" Character  
1 x 4 0.20" Character  
1 x 8 0.20" Character  
2902  
2912  
2922  
2962  
2972  
2904  
2914  
2924  
2964  
2974  
2901  
2911  
2921  
2961  
2971  
2903  
2913  
2923  
2963  
2973  
A
B
C
D
E
ESD WARNING: STANDARD CMOS HANDLING PRECAUTIONS SHOULD BE OBSERVED TO  
AVOID STATIC DISCHARGE.  
2
17.78 (0.700) MAX.  
PIN FUNCTION  
ASSIGNMENT TABLE  
PIN # FUNCTION  
4.45 (0.175) TYP.  
2.22 (0.087) SYM.  
1
2
3
4
5
6
7
8
9
DATA OUT  
OSC  
V LED  
DATA IN  
RS  
CLK  
CE  
12  
1
1
2
3
4
BLANK  
GND  
3.71 (0.146) TYP.  
10.16 (0.400) MAX.  
10 SEL  
11 V LOGIC  
12 RESET  
2.11 (0.083) TYP.  
DATE CODE  
PIN # 1 IDENTIFIER  
LIGHT INTENSITY CATEGORY  
COLOR BIN  
COUNTRY OF ORIGIN  
0.25  
(0.010)  
PART NUMBER  
5.08  
(0.200)  
HCMS-290X X Z  
YYWW  
COO  
4.32  
(0.170)  
TYP.  
0.51 (0.020)  
PIN # 1  
2.54  
SYM.  
1.27  
(0.050)  
SYM.  
(0.100)  
2.54 ± 0.13  
(0.100 ± 0.005)  
(NON ACCUM.)  
TYP.  
7.62  
(0.300)  
0.51 ± 0.13  
(0.020 ± 0.005)  
TYP.  
NOTES:  
1. DIMENSIONS ARE IN mm (INCHES).  
2. UNLESS OTHERWISE SPECIFIED, TOLERANCE ON DIMENSIONS IS ± 0.38 mm (0.015 INCH).  
3. LEAD MATERIAL: SOLDER PLATED COPPER ALLOY.  
HCMS-290x  
35.56 (1.400) MAX.  
2.22 (0.087) SYM.  
4.45  
(0.175)  
TYP.  
PIN FUNCTION  
ASSIGNMENT TABLE  
26  
PIN # FUNCTION  
3.71  
(0.146)  
10.16 (0.400) MAX.  
TYP.  
0
1
2
3
4
5
6
7
1
2
3
NO PIN  
NO PIN  
V LED  
3
4
5
6
7
8
9
NO PIN  
NO PIN  
NO PIN  
GND LED  
NO PIN  
NO PIN  
V LED  
NO PIN  
NO PIN  
NO PIN  
DATA IN  
RS  
NO PIN  
CLOCK  
CE  
BLANK  
GND LOGIC  
SEL  
2.11 (0.083) TYP.  
DATE CODE (YEAR, WEEK)  
PIN # 1 IDENTIFIER  
INTENSITY CATEGORY  
COLOR BIN  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
PART NUMBER  
COUNTRY OF ORIGIN  
0.25  
(0.010)  
HCMS-291X  
YYWW  
X
Z
COO  
5.08 (0.200)  
0.51  
(0.020)  
4.32  
(0.170)  
TYP.  
V LOGIC  
NO PIN  
RESET  
OSC  
2.54  
SYM.  
(0.100)  
0.51 ± 0.13  
(0.020 ± 0.005)  
1.27  
(0.050)  
DATA OUT  
TYP.  
SYM.  
2.54 ± 0.13  
(0.100 ± 0.005)  
(NON ACCUM.)  
7.62  
(0.300)  
TYP.  
NOTES:  
1. DIMENSIONS ARE IN mm (INCHES).  
2. UNLESS OTHERWISE SPECIFIED, TOLERANCE ON DIMENSIONS IS ± 0.38 mm (0.015 INCH).  
3. LEAD MATERIAL: SOLDER PLATED COPPER ALLOY.  
HCMS-291x  
3
PIN FUNCTION ASSIGNMENT TABLE  
PIN # FUNCTION PIN # FUNCTION  
35.56 (1.400) MAX.  
1B  
2B  
3B  
4B  
5B  
6B  
7B  
8B  
9B  
NO PIN  
NO PIN  
V LED  
NO PIN  
NO PIN  
NO PIN  
GND LED  
NO PIN  
NO PIN  
1A  
2A  
3A  
4A  
5A  
6A  
7A  
8A  
9A  
NO PIN  
NO PIN  
V LED  
NO PIN  
NO PIN  
NO PIN  
GND LED  
NO PIN  
NO PIN  
2.22 (0.088) SYM.  
4.45 (0.175) MAX.  
26B  
26A  
10B V LED  
11B NO PIN  
12B NO PIN  
13B NO PIN  
14B DATA IN  
15B RS  
16B NO PIN  
17B CLOCK  
18B CE  
19B BLANK  
20B GND LOGIC  
21B SEL  
22B V LOGIC  
23B NO PIN  
24B RESET  
25B OSC  
ROW B  
10A V LED  
11A NO PIN  
12A NO PIN  
13A NO PIN  
14A DATA IN  
15A RS  
16A NO PIN  
17A CLOCK  
18A CE  
19A BLANK  
20A GND LOGIC  
21A SEL  
22A V LOGIC  
23A NO PIN  
24A RESET  
25A OSC  
0
8
1
9
2
3
4
5
6
7
4.83  
(0.190)  
3B  
3A  
19.81 (0.780) MAX.  
9.65 (0.380)  
10  
11  
12  
13  
14  
15  
3.71 (0.146) TYP.  
ROW A  
2.11 (0.083) TYP.  
DATE CODE (YEAR, WEEK)  
INTENSITY CATEGORY  
PIN # 1 IDENTIFIER  
26B DATA OUT  
26A DATA OUT  
COLOR BIN  
PART NUMBER  
COUNTRY OF ORIGIN  
0.25  
(0.010)  
HCMS-292X  
YYWW  
X
Z
COO  
5.08 (0.200)  
0.51  
(0.020)  
2.54  
SYM.  
1.27  
(0.050)  
(0.100)  
0.51 ± 0.13  
(0.020 ± 0.005)  
TYP.  
2.03  
(0.080)  
2.54 ± 0.13  
(0.100 ± 0.005)  
(NON ACCUM.)  
TYP.  
7.62  
(0.300)  
NOTES:  
1. DIMENSIONS ARE IN mm (INCHES).  
2. UNLESS OTHERWISE SPECIFIED, TOLERANCE ON DIMENSIONS IS ± 0.38 mm (0.015 INCH).  
3. LEAD MATERIAL: SOLDER PLATED COPPER ALLOY.  
HCMS-292x  
PIN FUNCTION  
ASSIGNMENT TABLE  
PIN # FUNCTION  
21.46 (0.845) MAX.  
1
2
DATA OUT  
OSC  
3
4
5
V LED  
DATA IN  
RS  
2.67 (0.105) SYM.  
2.54 (0.100) TYP.  
6
7
CLK  
CE  
8
9
BLANK  
GND  
4.57  
(0.180)  
0
1
2
3
TYP.  
10  
11  
12  
SEL  
V LOGIC  
RESET  
11.43 (0.450) MAX.  
5.36 (0.211) TYP.  
PIN # 1 IDENTIFIER  
DATE CODE (YEAR, WEEK)  
INTENSITY CATEGORY  
COLOR BIN  
PART NUMBER  
0.25  
(0.010)  
COUNTRY OF ORIGIN  
HCMS-296X  
YYWW  
X Z  
COO  
5.31  
(0.209)  
3.71  
TYP.  
(0.146)  
0.50  
(0.020)  
0.169  
SYM.  
(4.28)  
0.51 ± 0.13  
(0.020 ± 0.005)  
TYP.  
0.072  
(1.83)  
SYM.  
2.54 ± 0.13  
TYP.  
(0.100 ± 0.005)  
7.62  
(0.300)  
NOTES:  
1. DIMENSIONS ARE IN mm (INCHES).  
2. UNLESS OTHERWISE SPECIFIED, THE TOLERANCE ON DIMENSIONS IS ± 0.38 mm (0.015 INCH).  
3. LEAD MATERIAL: SOLDER PLATED COPPER ALLOY.  
HCMS-296x  
4
42.93 (1.690) MAX.  
2.67 (0.105) SYM.  
5.36 (0.211) TYP.  
PIN FUNCTION  
ASSIGNMENT TABLE  
26  
4.57  
(0.180)  
PIN # FUNCTION  
1
2
3
4
5
6
7
8
TYP.  
11.43 (0.450) MAX.  
1
NO PIN  
NO PIN  
V LED  
2
3
3
4
5
6
7
8
9
NO PIN  
NO PIN  
NO PIN  
GND LED  
NO PIN  
NO PIN  
V LED  
NO PIN  
NO PIN  
NO PIN  
DATA IN  
RS  
NO PIN  
CLOCK  
CE  
BLANK  
GND LOGIC  
SEL  
2.54 (0.100) TYP.  
PIN # 1 IDENTIFIER  
DATE CODE (YEAR, WEEK)  
INTENSITY CATEGORY  
COLOR BIN  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
0.25  
(0.010)  
PART NUMBER  
COUNTRY OF ORIGIN  
HCMS-297X  
YYWW  
5.31  
(0.209)  
X Z  
COO  
0.51  
(0.020)  
3.71  
TYP.  
(0.146)  
V LOGIC  
NO PIN  
RESET  
OSC  
6.22  
(0.245)  
SYM.  
0.51 ± 0.13  
(0.020 ± 0.005)  
TYP.  
DATA OUT  
1.90  
(0.075)  
SYM.  
2.54 ± 0.13  
(0.100 ± 0.005)  
(NON ACCUM.)  
TYP.  
7.62  
(0.300)  
NOTES:  
1. DIMENSIONS ARE IN mm (INCHES).  
2. UNLESS OTHERWISE SPECIFIED, TOLERANCE ON DIMENSIONS IS ± 0.38 mm (0.015 INCH).  
3. LEAD MATERIAL: SOLDER PLATED COPPER ALLOY.  
HCMS-297x  
Absolute Maximum Ratings  
Logic Supply Voltage, VLOGIC to GNDLOGIC ....................... -0.3 V to 7.0 V  
LED Supply Voltage, VLED to GNDLED .............................. -0.3 V to 5.5 V  
Input Voltage, Any Pin to GND.......................... -0.3 V to VLOGIC +0.3 V  
Free Air Operating Temperature Range T [1] .................. -40°C to +85°C  
A
Relative Humidity (non-condensing) ............................................... 85%  
Storage Temperature, TS ................................................. -55°C to 100°C  
Wave Solder Temperature  
1.59 mm (0.063 in.) below Body ...............................250°C for 3 secs  
ESD Protection @ 1.5 k, 100 pF (each pin) .............Class 1, 0-1999 V  
TOTAL Package Power Dissipation at T = 25°C[2]  
A
4 character ....................................................................... 1.2 W  
8 character ....................................................................... 2.4 W  
16 character ....................................................................... 4.8 W  
Notes:  
1. For operation in high ambient temperatures, see Appendix A, Thermal Considerations.  
Recommended Operating Conditions Over Temperature Range  
(-40°C to +85°C)  
Parameter  
Symbol  
Min.  
3.0  
Typ.  
5.0  
5.0  
0
Max.  
Units  
Logic Supply Voltage  
LED Supply Voltage  
GNDLED to GNDLOGIC  
V
5.5  
5.5  
V
V
V
LOGIC  
V
4.0  
LED  
-0.3  
+0.3  
5
Electrical Characteristics Over Operating Temperature Range (-40°C to +85°C)  
TA = 25°C  
-40°C < TA < 85°C  
VLOGIC = 5.0 V  
3.0 V < VLOGIC < 5.5 V  
Parameter  
Symbol  
Typ.  
Max.  
Min.  
Max.  
Units  
Test Conditions  
IN = 0 V to VLOGIC  
Input Leakage Current  
II  
µA  
V
HCMS-290X/296X (4 char)  
HCMS-291X/297X (8 char)  
HCMS-292X (16 char)  
+7.5  
+15  
+15  
-2.5  
-5.0  
-5.0  
+50  
+100  
+100  
I
I
I
LOGIC OPERATING  
ILOGIC(OPT)  
ILOGIC(SLP)  
ILED(BL)  
ILED(SLP)  
IPIXEL  
mA  
µA  
VIN = V  
LOGIC  
HCMS-290X/296X (4 char)  
HCMS-291X/297X (8 char)  
HCMS-292X (16 char)  
0.4  
0.8  
0.8  
2.5  
5
5
5
10  
10  
LOGIC SLEEP[1]  
VIN = V  
LOGIC  
HCMS-290X/296X (4 char)  
HCMS-291X/297X (8 char)  
HCMS-292X (16 char)  
5
10  
10  
15  
30  
30  
25  
50  
50  
LED BLANK  
mA  
µA  
BL = 0 V  
HMCS-290X/296X (4 char)  
HCMS-291X/297X (8 char)  
HCMS-292X (16 char)  
2.0  
4.0  
4.0  
4
8
8
4.0  
8
8
ILED SLEEP[1]  
HCMS-290X/296X (4 char)  
HCMS 291X/297X (8 char)  
HCMS-292X (16 char)  
1
2
2
3
6
6
50  
100  
100  
Peak Pixel Current[2]  
VLED = 5.5 V  
All pixels ON,  
Average value per  
pixel  
HCMS-29X5 (AlGaAs)  
HCMS-29XX (Other Colors)  
15.4  
14.0  
17.1  
15.9  
18.7  
17.1  
mA  
mA  
HIGH level input voltage  
V
ih  
2.0  
V
V
4.5 V < VLOGIC < 5.5 V  
3.0 V < VLOGIC < 4.5 V  
0.8 VLOGIC  
LOW level input voltage  
HIGH level output voltage  
V
0.8  
V
V
V
4.5 V < VLOGIC < 5.5 V  
3.0 V < VLOGIC < 4.5 V  
il  
0.2 VLOGIC  
V
oh  
2.0  
VLOGIC = 4.5 V,  
Ioh = -40 µA  
0.8 VLOGIC  
V
V
3.0 V < VLOGIC < 4.5 V  
LOW level output voltage  
V
ol  
0.4  
VLOGIC = 5.5 V,  
Iol = 1.6 mA[3]  
0.2 VLOGIC  
V
3.0 V < VLOGIC < 4.5 V  
IC junction to pin  
Thermal Resistance  
RθJ-P  
70  
°C/W  
Notes:  
1. In SLEEP mode, the internal oscillator and reference current for LED drivers are off.  
2. Average peak pixel current is measured at the maximum drive current set by Control Register 0. Individual pixels may exceed this  
value.  
3. For the Oscillator Output, Iol = 40 µA.  
6
Optical Characteristics at 25°C[1]  
VLED = 5.0 V, 50% Peak Current, 100% Pulse Width  
Luminous Intensity  
Peak  
Wavelength  
λPeak (nm)  
Typ.  
Dominant  
Wavelength  
λd[3] (nm)  
Typ.  
per LED[2]  
CharacterAverage(µcd)  
Display Color  
AlGaAs Red  
High Efficiency Red  
Orange  
Part Number  
HCMS-29X5  
HCMS-29X2  
HCMS-29X4  
HCMS-29X1  
HCMS-29X3  
Min.  
Typ.  
230  
64  
95  
645  
635  
600  
583  
568  
637  
626  
602  
585  
574  
29  
29  
64  
Yellow  
29  
64  
Green  
57  
114  
Notes:  
1. Refers to the initial case temperature of the device immediately prior to measurement.  
2. Measured with all LEDs illuminated.  
3. Dominant wavelength, λd, is derived from the CIE chromaticity diagram and represents the single wavelength which defines the  
perceived LED color.  
Electrical Description  
Pin Function  
RESET (RST)  
Description  
Sets Control Register bits to logic low. The Dot Register contents are  
unaffected by the Reset pin. (logic low = reset; logic high = normal  
operation).  
DATA IN (DIN)  
DATA OUT (DOUT  
CLOCK (CLK)  
Serial Data input for Dot or Control Register data. Data is entered on the  
rising edge of the Clock input.  
)
Serial Data output for Dot or Control Register data. This pin is used for  
cascading multiple displays.  
Clock input for writing Dot or Control Register data. When Chip Enable is  
logic low, data is entered on the rising Clock edge.  
REGISTER SELECT (RS)  
CHIP ENABLE (CE)  
Selects Dot Register (RS = logic low) or Control Register (RS = logic high)  
as the destination for serial data entry. The logic level of RS is latched on  
the falling edge of the Chip Enable input.  
This input must be a logic low to write data to the display. When CE  
returns to logic high and CLK is logic low, data is latched to either the LED  
output drivers or a Control Register.  
OSCILLATOR SELECT  
(SEL)  
Selects either an internal or external display oscillator source.  
(logic low = External Display Oscillator; logic high = Internal Display  
Oscillator).  
OSCILLATOR (OSC)  
BLANK (BL)  
Output for the Internal Display Oscillator (SEL = logic high) or input for an  
External Display Oscillator (SEL = logic low).  
Blanks the display when logic high. May be modulated for brightness  
control.  
GNDLED  
GNDLOGIC  
VLED  
Ground for LED drivers.  
Ground for logic.  
Positive supply for LED drivers.  
Positive supply for logic.  
VLOGIC  
7
AC Timing Characteristics Over Temperature Range (-40°C to +85°C)  
Timing  
Diagram  
Ref.  
4.5 V < VLOGIC <5.5 V  
VLOGIC = 3 V  
Number  
Description  
Symbol  
Min.  
Max.  
Min.  
Max.  
Units  
1
2
3
4
5
6
7
Register Select Setup Time to  
Chip Enable  
trss  
10  
10  
ns  
Register Select Hold Time to  
Chip Enable  
trsh  
tclkce  
tces  
tceh  
tds  
10  
20  
35  
20  
10  
10  
10  
10  
20  
55  
20  
10  
10  
10  
ns  
ns  
ns  
ns  
ns  
ns  
Rising Clock Edge to Falling  
Chip Enable Edge  
Chip Enable Setup Time to  
Rising Clock Edge  
Chip Enable Hold Time to  
Rising Clock Edge  
Data Setup Time to Rising  
Clock Edge  
Data Hold Time after Rising  
Clock Edge  
tdh  
[1]  
8
9
Rising Clock Edge to DOUT  
tdout  
40  
18  
65  
30  
ns  
ns  
Propagation Delay DIN to DOUT  
Simultaneous Mode for  
one IC[1,2]  
tdoutp  
10  
11  
12  
CE Falling Edge to DOUT Valid  
Clock High Time  
tcedo  
tclkh  
tclkl  
trstl  
25  
45  
ns  
ns  
80  
80  
50  
100  
100  
50  
Clock Low Time  
ns  
Reset Low Time  
ns  
Clock Frequency  
F
5
4
MHz  
KHz  
cyc  
Internal Display Oscillator  
Frequency  
F
80  
210  
80  
210  
inosc  
Internal Refresh Frequency  
F
150  
410  
150  
400  
Hz  
rf  
External Display Oscillator  
Frequency  
F
exosc  
Prescaler = 1  
Prescaler = 8  
51.2  
410  
1000  
8000  
51.2  
410  
1000  
8000  
KHz  
KHz  
Notes:  
1. Timing specifications increase 0.3 ns per pf of capacitive loading above 15 pF.  
2. This parameter is valid for Simultaneous Mode data entry of the Control Register.  
8
Display Overview  
LEDs. Data is loaded into the Dot  
Register according to the  
procedure shown in Table 1 and  
the Write Cycle Timing Diagram.  
Reset  
The HCMS-29xx series is a family  
of LED displays driven by  
on-board CMOS ICs. The LEDs  
are configured as 5 x 7 font  
characters and are driven in  
groups of 4 characters per IC.  
Each IC consists of a 160-bit shift  
register (the Dot Register), two  
7-bit Control Words, and refresh  
circuitry. The Dot Register  
contents are mapped on a  
one-to-one basis to the display.  
Thus, an individual Dot Register  
bit uniquely controls a single  
LED.  
Reset initializes the Control  
Registers (sets all Control  
Register bits to logic low) and  
places the display in the sleep  
mode. The Reset pin should be  
connected to the system power-on  
reset circuit. The Dot Registers  
are not cleared upon power-on or  
by Reset. After power-on, the Dot  
Register contents are random;  
however, Reset will put the  
display in sleep mode, thereby  
blanking the LEDs. The Control  
Register and the Control Words  
are cleared to all zeros by Reset.  
First RS is brought low, then CE  
is brought low. Next, each  
successive rising CLK edge will  
shift in the data at the DIN pin.  
Loading a logic high will turn the  
corresponding LED on; a logic  
low turns the LED off. When all  
160 bits have been loaded (or 320  
bits in an 8-digit display), CE is  
brought to logic high.  
When CLK is next brought to  
logic low, new data is latched into  
the display dot drivers. Loading  
data into the Dot Register takes  
place while the previous data is  
displayed and eliminates the need  
to blank the display while loading  
data.  
8-character displays have two ICs  
that are cascaded. The Data Out  
line of the first IC is internally  
connected to the Data In line of  
the second IC forming a 320-bit  
Dot Register. The display’s other  
control and power lines are  
To operate the display after being  
Reset, load the Dot Register with  
logic lows. Then load Control  
Word 0 with the desired bright-  
ness level and set the sleep mode  
bit to logic high.  
connected directly to both ICs. In  
16-character displays, each row  
functions as an independent  
8-character display with its own  
320-bit Dot Register.  
Pixel Map  
In a 4-character display, the  
160-bits are arranged as 20  
Dot Register  
The Dot Register holds the  
pattern to be displayed by the  
Table 1. Register Truth Table  
Function  
CLK  
CE  
RS  
Select Dot Register  
Not Rising  
L
Load Dot Register  
DIN = HIGH LED = "ON"  
DIN = LOW LED = "OFF"  
L
X
Copy Data from Dot Register to Dot Latch  
Select Control Register  
L
H
X
H
X
X
Not Rising  
Load Control Register[1][3]  
L
Latch Data to Control Word[2]  
L
Notes:  
1. BIT D0 of Control Word 1 must have been previously set to Low for serial mode or High for simultaneous mode.  
2. Selection of Control Word 1 or Control Word 0 is set by D7 of the Control Shift Register. The unselected control word retains its  
previous value.  
3. Control Word data is loaded Most Significant Bit (D7) first.  
9
RS  
CE  
T
T
RSS  
RSH  
2
1
T
T
T
T
T
CLKL  
12  
CLKCE  
3
CES  
4
CEH  
5
CLKH  
11  
CLK  
[1]  
T
T
T
NEW DATA LATCHED HERE  
DS  
6
DH  
7
D
IN  
T
CEDO  
10  
DOUT  
8
D
(SERIAL)  
OUT  
T
DOUTP  
9
D
OUT  
(SIMULTANEOUS)  
LED OUTPUTS,  
CONTROL  
PREVIOUS DATA  
NEW DATA  
REGISTERS  
NOTE:  
1. DATA IS COPIED TO THE CONTROL REGISTER OR THE DOT LATCH AND LED OUTPUTS WHEN CE IS HIGH AND CLK IS LOW.  
HCMS-29xx Write Cycle Diagram  
columns by 8 rows. This array can Control Register  
logic high and then CE is brought  
to logic low. Next, each  
be conceptualized as four 5 x 8  
dot matrix character locations,  
but only 7 of the 8 rows have  
LEDs (see Figures 1 & 2). The  
bottom row (row 0) is not used.  
Thus, latch location 0 is never  
displayed. Column 0 controls the  
left-most column. Data from Dot  
Latch locations 0-7 determine  
whether or not pixels in Column 0  
are turned-on or turned-off.  
Therefore, the lower left pixel is  
turned-on when a logic high is  
stored in Dot Latch location 1.  
Characters are loaded in serially,  
with the left-most character being  
loaded first and the right-most  
character being loaded last. By  
loading one character at a time  
and latching the data before  
loading the next character, the  
figures will appear to scroll from  
right to left.  
The Control Register allows  
software modification of the IC’s  
operation and consists of two  
independent 7-bit control words.  
Bit D7 in the shift register selects  
one of the two 7-bit control  
words. Control Word 0 performs  
pulse width modulation  
brightness control, peak pixel  
current brightness control, and  
sleep mode. Control Word 1 sets  
serial/simultaneous data out  
mode, and external oscillator  
prescaler. Each function is  
successive rising CLK edge will  
shift in the data on the DIN pin.  
Finally, when 8 bits have been  
loaded, the CE line is brought to  
logic high. When CLK goes to  
logic low, new data is copied into  
the selected control word.  
Loading data into the Control  
Register takes place while the  
previous control word configures  
the display.  
Control Word 0  
independent of the others.  
Loading the Control Register with  
D7 = Logic low selects Control  
Word 0 (see Table 2). Bits D0-D3  
adjust the display brightness by  
pulse width modulating the LED  
on-time, while Bits D4-D5 adjust  
the display brightness by  
changing the peak pixel current.  
Bit D6 selects normal operation or  
sleep mode.  
Control Register Data  
Loading  
Data is loaded into the Control  
Register, MSB first, according to  
the procedure shown in Table 1  
and the Write Cycle Timing  
Diagram. First, RS is brought to  
10  
DATA OUT  
RS (LATCHED)  
H
L
DATA IN  
CLK  
L
H
H
L
SER/PAR  
MODE  
CHIP  
ENABLE  
DI  
40 BIT  
S.R.  
DO  
DI  
40 BIT  
S.R.  
DO  
DI  
40 BIT  
S.R.  
DO  
DI  
40 BIT  
S.R.  
DO  
DOT  
REGISTERS  
AND  
DATA IN  
CLR  
CONTROL  
REGISTER  
DATA  
OUT  
LATCHES  
REGISTER  
SELECT  
D
Q
RS  
(LATCHED)  
V LED +  
CURRENT  
REFERENCE  
REFRESH  
CONTROL  
ANODE  
CURRENT SOURCES  
RESET  
RST  
PWM BRIGHTNESS  
CONTROL  
DOT  
REGISTER  
BIT # 159  
PRESCALE  
VALUE  
ROW 7  
H
L
÷8  
OSC  
ROW 1  
0 x x x x  
x x x x x  
CHAR 1  
x x x x x  
CHAR 2  
x x x x x ROW 0 (NO LEDS)  
H
L
OSCILLATOR  
COLUMN 0  
CHAR 0  
COLUMN 19  
CHAR 3  
L
H
OSC  
SELECT  
GND (LED)  
BLANK  
Figure 1.  
DATA FROM  
PREVIOUS  
CHARACTER  
PIXEL  
DATA TO  
NEXT  
ROW 7  
CHARACTER  
ROW 6  
ROW 5  
ROW 4  
ROW 3  
ROW 2  
ROW 1  
ROW 0  
(NOT USED)  
Figure 2.  
11  
Sleep mode (Control Word 0, bit  
D6 = Low) turns off the Internal  
Display Oscillator and the LED  
pixel drivers. This mode is used  
when the IC needs to be powered  
up, but does not need to be  
same data in all Control Registers.  
In the simultaneous mode, N ICs  
only need 8 clock pulses to load  
the same data in all Control  
Registers. The propagation delay  
from the first IC to the last is  
right-most characters. The Dot  
Registers are connected in series  
to form a 320-bit dot shift  
register. The location of pixel 0  
has not changed. However, Dot  
Shift Register bit 0 of IC2  
active. Current draw in sleep  
mode is nearly zero. Data in the  
Dot Register and Control Words  
are retained during sleep mode.  
N * tDOUTP  
.
becomes bit 160 of the 320-bit  
dot shift register.  
External Oscillator  
Prescaler Bit D1  
Bit D1 of Control Word 1 is used  
to scale the frequency of an  
The Control Registers of the two  
ICs are independent of each  
other. This means that to adjust  
the display brightness the same  
control word must be entered into  
both ICs, unless the Control  
Registers are set to simultaneous  
mode.  
Control Word 1  
Loading the Control Register with  
D7 = logic high selects Control  
Word 1. This Control Word  
performs two functions: serial/  
simultaneous data out mode and  
external oscillator prescale select  
(see Table 2).  
external Display Oscillator. When  
this bit is logic low, the external  
Display Oscillator directly sets the  
internal display clock rate. When  
this bit is a logic high, the  
external oscillator is divided by 8.  
This scaled frequency then sets  
the internal display clock rate. It  
takes 512 cycles of the display  
clock (or 8 x 512 = 4096 cycles  
of an external clock with the  
divide by 8 prescaler) to com-  
pletely refresh the display once.  
Using the prescaler bit allows the  
designer to use a higher external  
oscillator frequency without extra  
circuitry.  
Longer character string systems  
can be built by cascading multiple  
displays together. This is  
accomplished by creating a five  
line bus. This bus consists of CE,  
RS, BL, Reset, and CLK. The  
display pins are connected to the  
corresponding bus line. Thus, all  
CE pins are connected to the CE  
bus line. Similarly, bus lines for  
RS, BL, Reset, and CLK are  
created. Then DIN is connected to  
the right-most display. DOUT from  
this display is connected to the  
next display. The left-most display  
receives its DIN from the DOUT of  
the display to its right. DOUT from  
the left-most display is not used.  
Serial/Simultaneous Data  
Output D0  
Bit D0 of control word 1 is used to  
switch the mode of DOUT between  
serial and simultaneous data entry  
during Control Register writes.  
The default mode (logic low) is  
the serial DOUT mode. In serial  
mode, DOUT is connected to the  
last bit (D7) of the Control Shift  
Register.  
This bit has no affect on the  
internal Display Oscillator  
Frequency.  
Storing a logic high to bit D0  
changes DOUT to simultaneous  
mode which affects the Control  
Register only. In simultaneous  
mode, DOUT is logically connected  
to DIN. This arrangement allows  
multiple ICs to have their Control  
Registers written to simul-  
Bits D2-D6  
These bits must always be pro-  
grammed to logic low.  
Each display may be set to use its  
internal oscillator, or the displays  
may be synchronized by setting  
up one display as the master and  
the others as slaves. The slaves  
are set to receive their oscillator  
input from the master’s oscillator  
output.  
Cascaded ICs  
Figure 3 shows how two ICs are  
connected within an HCMS-29XX  
display. The first IC controls the  
four left-most characters and the  
second IC controls the four  
taneously. For example, for N ICs  
in the serial mode, N * 8 clock  
pulses are needed to load the  
12  
Table 2. Control Shift Register  
CONTROL WORD 0  
L
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Bit D7  
On-Time  
Duty  
Relative  
Set Low  
to Select  
Control  
Word 0  
PWM Brightness  
Control  
Oscillator Factor Brightness  
Cycles  
(%)  
(%)  
L
L
L
L
L
L
L
H
L
0
1
0
0
1.7  
3.3  
5.0  
6.7  
8.3  
11.7  
15  
0.2  
0.4  
0.6  
0.8  
1.0  
1.4  
1.8  
2.1  
2.7  
3.5  
4.3  
5.5  
7.0  
9.4  
11.7  
L
L
H
H
L
2
L
L
H
L
3
L
H
H
H
H
L
4
L
L
H
L
5
L
H
H
L
7
L
H
L
9
H
H
H
H
H
H
H
H
11  
14  
18  
22  
28  
36  
48  
60  
18  
L
L
H
L
23  
L
H
H
L
30  
L
H
L
37  
H
H
H
H
47  
L
H
L
60  
H
H
80  
H
100  
Peak Current  
Brightness  
Control  
Typical Peak  
Pixel Current  
(mA)  
Relative Full  
Scale Current  
(Relative Brightness, %)  
H
L
L
H
L
4.0  
6.4  
31  
50  
L
9.3  
73 (Default at Power Up)  
H
H
12.8  
100  
SLEEP MODE  
L – DISABLES INTERNAL OSCILLATOR-DISPLAY BLANK  
H – NORMAL OPERATION  
CONTROL WORD 1  
H
L
L
L
L
L
D1  
D0  
Serial/Simultaneous Data Out  
Bit D7  
L – Dout holds contents of Bit D7  
H – Dout is functionally tied to Din  
Set High  
to Select  
Control  
Word 1  
Reserved for Future  
Use (Bits D2-D6  
must be set Low)  
External Display Oscillator Prescaler  
L – Oscillator Freq ÷ 1  
H – Oscillator Freq ÷ 8  
13  
CE  
RS  
BL  
RESET  
CLK  
CE  
RS  
BL  
CE  
RS  
BL  
RESET  
CLK  
RESET  
CLK  
IC1  
BITS 0-159  
CHARACTERS 0-3  
IC2  
BITS 160-319  
CHARACTERS 4-7  
D
D
D
IN  
D
D
OUT  
OUT  
OUT  
IN  
OSC  
SEL  
SEL  
SEL  
OSC  
OSC  
D
IN  
Figure 3. Cascaded ICs.  
14  
1.3  
1.2  
1.1  
R
= 100°C/W  
PD can be calculated as Equation  
2 below.  
θ
Appendix A. Thermal  
Considerations  
The display IC has a maximum  
junction temperature of 150°C.  
The IC junction temperature can  
be calculated with Equation 1  
below.  
J-A  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
Figure 4 shows how to derate the  
power of one IC versus ambient  
temperature. Operation at high  
ambient temperatures may  
require the power per IC to be  
reduced. The power consumption  
can be reduced by changing  
either the N, IPIXEL, Osc cyc or  
0.3  
0.2  
A typical value for RθJA is 100°C/  
W. This value is typical for a  
display mounted in a socket and  
covered with a plastic filter. The  
socket is soldered to a .062 in.  
thick PCB with .020 inch wide,  
one ounce copper traces.  
0.1  
0
25 30 35 40 45 50 55 60 65 70 75 80 85 90  
VLED. Changing VLOGIC has very  
T
AMBIENT TEMPERATURE – °C  
A
little impact on the power  
consumption.  
Figure 4.  
Appendix B. Electrical  
Considerations  
Current Calculations  
Equation 1:  
The peak and average display  
current requirements have a  
significant impact on power  
supply selection. The maximum  
peak current is calculated with  
Equation 3 below.  
TJMAX = TA + PD * RθJA  
Where:  
TJMAX = maximum IC junction temperature  
TA = ambient temperature surrounding the display  
RθJA = thermal resistance from the IC junction to ambient  
PD = power dissipated by the IC  
The average current required by  
the display can be calculated with  
Equation 4 below.  
Equation 2:  
PD = (N * IPIXEL * Duty Factor * VLED) + ILOGIC * VLOGIC  
Where:  
The power supply has to be able  
to supply IPEAK transients and  
supply ILED(AVG) continuously.  
The range on VLED allows noise on  
this supply without significantly  
changing the display brightness.  
PD = total power dissipation  
N = number of pixels on (maximum 4 char * 5 * 7 = 140)  
IPIXEL = peak pixel current.  
Duty Factor = 1/8 * Osccyc/64  
Osc cyc = number of ON oscillator cycles per row  
ILOGIC = IC logic current  
V
LOGIC = logic supply voltage  
VLOGIC and VLED Considerations  
The display uses two independent  
electrical systems. One system is  
used to power the display’s logic  
and the other to power the  
display’s LEDs. These two  
systems keep the logic supply  
clean.  
Equation 3:  
IPEAK = M * 20 * IPIXEL  
Where:  
IPEAK = maximum instantaneous peak current for the display  
M = number of ICs in the system  
20 = maximum number of LEDs on per IC  
IPIXEL = peak current for one LED  
Separate electrical systems allow  
the voltage applied to VLED and  
Equation 4:  
VLOGIC to be varied independently.  
Thus, VLED can vary from 0 to 5.5  
V without affecting either the Dot  
or the Control Registers. VLED can  
ILED(AVG) = N * IPIXEL * 1/8 * (oscillator cycles)/64  
(see Variable Definitions above)  
15  
be varied between 4.0 to 5.5 V  
without any noticeable variation  
in light output. However, operat-  
ing VLED below 4.0 V may cause  
objectionable mismatch between  
the pixels and is not  
Electrostatic Discharge  
prescaler or 8 MHz with the  
prescaler may cause noticeable  
pixel to pixel mismatch.  
The inputs to the ICs are pro-  
tected against static discharge  
and input current latchup. How-  
ever, for best results, standard  
CMOS handling precautions  
should be used. Before use, the  
HCMS-29XX should be stored in  
antistatic tubes or in conductive  
material. During assembly, a  
grounded conductive work area  
should be used and assembly  
personnel should wear conductive  
wrist straps. Lab coats made of  
synthetic material should be  
avoided since they are prone to  
static buildup. Input current  
latchup is caused when the CMOS  
inputs are subjected to either a  
Appendix D. Refresh  
Circuitry  
recommended. Dimming the  
display by pulse width modulating  
This display driver consists of 20  
one-of-eight column decoders and  
20 constant current sources, 1  
one-of-eight row decoder and  
eight row sinks, a pulse width  
modulation control block, a peak  
current control block, and the  
circuit to refresh the LEDs. The  
refresh counters and oscillator are  
used to synchronize the columns  
and rows.  
VLED is also not recommended.  
VLOGIC can vary from 3.0 to 5.5 V  
without affecting either the  
displayed message or the display  
intensity. However, operation  
below 4.5 V will change the  
timing and logic levels and  
operation below 3 V may cause  
the Dot and Control Registers to  
be altered.  
The 160 bits are organized as 20  
columns by 8 rows. The IC  
illuminates the display by  
voltage below ground (VIN  
<
The logic ground is internally  
connected to the LED ground by a  
substrate diode. This diode  
becomes forward biased and  
conducts when the logic ground is  
0.4 V greater then the LED  
ground. The LED ground and the  
logic ground should be connected  
to a common ground which can  
withstand the current introduced  
by the switching LED drivers.  
When separate ground  
connections are used, the LED  
ground can vary from -0.3 V to  
+0.3 V with respect to the logic  
ground. Voltages below -0.3 V can  
cause all the dots to be ON.  
Voltage above +0.3 V can cause  
dimming and dot mismatch. The  
LED ground for the LED drivers  
can be routed separately from the  
logic ground until an appropriate  
ground plane is available. On long  
interconnections between the  
display and the host system,  
voltage drops on the analog  
ground) or to a voltage higher  
then VLOGIC (VIN > VLOGIC) and  
when a high current is forced into  
the input. To prevent input  
current latchup and ESD damage,  
unused inputs should be con-  
sequentially turning ON each of  
the 8 row-drivers. To refresh the  
display once takes 512 oscillator  
cycles. Because there are eight  
row drivers, each row driver is  
selected for 64 (512/8) oscillator  
cycles. Four cycles are used to  
briefly blank the display before  
the following row is switched on.  
Thus, each row is ON for 60  
oscillator cycles out of a possible  
64. This corresponds to the  
maximum LED on time.  
nected to either ground or V  
.
Voltages should not be appliLeOdGtICo  
the inputs until VLOGIC has been  
applied to the display.  
Appendix C. Oscillator  
The oscillator provides the  
internal refresh circuitry with a  
signal that is used to synchronize  
the columns and rows. This  
ensures that the right data is in  
the dot drivers for that row. This  
signal can be supplied from either  
an external source or the internal  
source.  
Appendix E. Display  
Brightness  
Two ways have been shown to  
control the brightness of this LED  
display: setting the peak current  
and setting the duty factor. Both  
values are set in Control Word 0.  
To compute the resulting display  
brightness when both PWM and  
peak current control are used,  
simply multiply the two relative  
brightness factors. For example,  
if Control Register 0 holds the  
word 1001101, the peak current  
A display refresh rate of 100 Hz  
or faster ensures flicker-free  
operation. Thus for an external  
oscillator the frequency should be  
greater than or equal to 512 x  
100 Hz = 51.2 kHz. Operation  
above 1 MHz without the  
ground can be kept from affecting  
the display logic levels by  
isolating the two grounds.  
3.0  
2.6  
HER/ORANGE  
YELLOW  
2.2  
1.8  
1.4  
GREEN  
AlGaAs  
1.0  
0.6  
0.2  
-55 -35  
-15  
5
25  
45  
65  
85  
T
AMBIENT TEMPERATURE – °C  
A
Figure 5.  
is 73% of full scale (BIT D5 = L,  
BIT D4 = L) and the PWM is set  
to 60% duty factor (BIT D3 = H,  
BIT D2 = H, BIT D1 = L, BIT D0  
= H). The resulting brightness is  
44% (.73 x .60 = .44) of full  
scale.  
The temperature of the display  
will also affect the LED brightness  
as shown in Figure 5.  
Appendix F. Reference  
Material  
Application Note 1027: Soldering  
LED Components  
Application Note 1015: Contrast  
Enhancement Techniques for  
LED Displays  
www.agilent.com/semiconductors  
For product information and a complete list of  
distributors, please go to our web site.  
For technical assistance call:  
Americas/Canada: +1 (800) 235-0312 or  
(916) 788-6763  
Europe: +49 (0) 6441 92460  
China: 10800 650 0017  
Hong Kong: (+65) 6756 2394  
India, Australia, New Zealand: (+65) 6755 1939  
Japan: (+81 3) 3335-8152 (Domestic/Interna-  
tional), or 0120-61-1280 (Domestic Only)  
Korea: (+65) 6755 1989  
Singapore, Malaysia, Vietnam, Thailand,  
Philippines, Indonesia: (+65) 6755 2044  
Taiwan: (+65) 6755 1843  
Data subject to change.  
Copyright © 2004 Agilent Technologies, Inc.  
Obsoletes 5964-6376E  
July 14, 2004  
5988-4161EN  
配单直通车
HCMS-2905产品参数
型号:HCMS-2905
是否Rohs认证: 不符合
生命周期:Transferred
Reach Compliance Code:unknown
HTS代码:8541.40.20.00
风险等级:5.1
其他特性:TTL COMPATIBLE
颜色:RED
颜色@波长:Red
配置:COMPLEX
显示高度:3.71 mm
最大正向电压:5.5 V
JESD-609代码:e0
字符数:4
功能数量:4
最高工作温度:85 °C
最低工作温度:-40 °C
光电设备类型:SMART/NORMAL 5 X 7 DOT MATRIX LED DISPLAY
峰值波长:645 nm
子类别:LED Displays
端子面层:Tin/Lead (Sn/Pb)
Base Number Matches:1
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