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产品型号HCPL-0601的概述

HCPL-0601概述及详解 HCPL-0601是一款高性能的光耦合器，广泛应用于工业控制、电力电子和通信设备等领域。这款光耦合器具有良好的隔离性能和快速响应特性，是各种电路设计中常见的选择。光耦合器的基本功能是通过光信号传递信息，从而实现电气隔离，因此，在许多电气设备中，它是一种不可或缺的元件。详细参数 HCPL-0601的参数设计使其能够在多种工作环境下提供稳定的性能。以下是该芯片的一些关键技术参数： 1. 输入电流 (If): 通常应在5mA到20mA之间工作。 2. 输出电压 (Vo): 输出电压在0到30V之间，相关的输出应根据负载设计进行调整。 3. 电气隔离电压: 最高可达5000Vrms，有效防止高压对低压部分的干扰。 4. 工作温度范围: 从-40°C到+100°C，适合极端环境中的使用。 5. 传输延迟: 典型值在1μs左右，满足快速响应的需求。 6. 工作频率:...

产品型号HCPL-0601的Datasheet PDF文件预览

Small Outline, 5 Lead, High

CMR, High Speed, Logic Gate

Optocouplers

Technical Data

HCPL-M600

HCPL-M601

HCPL-M611

Description

Features

ThesesmalloutlinehighCMR,

high speed, logic gate optocoup-

lersaresinglechanneldevicesin

afiveleadminiaturefootprint.

Theyareelectricallyequivalentto

thefollowingAgilent

•SurfaceMountable

•VerySmall,LowProfile

JEDECRegisteredPackage

Outline

•CompatiblewithInfrared

VaporPhaseReflowand

WaveSolderingProcesses

•InternalShieldforHigh

CommonModeRejection

(CMR)

HCPL-M601:10,000V/µsat

V_CM= 50 V

optocouplers (except there is no

outputenablefeature):

SO-5 Package

HCPL-M600

HCPL-M601

HCPL-M611

Standard DIP

SO-8 Package

6N137

HCPL-0600

HCPL-0601

HCPL-0611

HCPL-2601

HCPL-2611

HCPL-M611:15,000V/µsat

V_CM= 1000 V

•HighSpeed:10Mbd

•LSTTL/TTLCompatible

•LowInputCurrent

Capability:5mA

•Guaranteedacanddc

Performanceover

TheSO-5JEDECregistered(MO-

155) package outline does not

require“throughholes”inaPCB.

Thispackageoccupies

approximatelyonefourththe

footprintareaofthestandard

dual-in-linepackage.Thelead

profile is designed to be com-

patiblewithstandardsurface

mountprocesses.

Schottky-clampedtransistor.The

internalshieldprovidesa

guaranteedcommonmode

transientimmunityspecificationof

5,000V/µsfortheHCPL-M601,

and10,000V/µsfortheHCPL-

M611.

Temperature:-40°Cto85°C

•Recognizedunderthe

ComponentProgramofU.L.

(File No. E55361) for

DielectricWithstandProof

Test Voltageof2500 Vac, 1

Minute

Thisuniquedesignprovides

maximumacanddccircuit

isolationwhileachievingTTL

compatibility.Theoptocouplerac

anddcoperationalparametersare

guaranteedfrom-40°Cto85°C

allowingtroublefreesystem

performance.

TheHCPL-M600/01/11optically

coupledgatescombineaGaAsP

lightemittingdiodeandan

integratedhighgainphoton

detector.Theoutputofthe

detectorI.C.isanOpen-collector

CAUTION: The small device geometries inherent to the design of this bipolar component increase the component's

susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken

in handling and assembly of this component to prevent damage and/or degradation which may be induced by

ESD.

TheHCPL-M600/01/11are

suitableforhighspeedlogic

interfacing,input/output

buffering,aslinereceiversin

environmentsthatconventional

linereceiverscannottolerate,and

arerecommendedforusein

extremelyhighgroundorinduced

noiseenvironments.

Applications

•IsolatedLineReceiver

•Simplex/MultiplexData

Transmission

•Computer-Peripheral

Interface

•MicroprocessorSystem

Interface

OutlineDrawing(JEDECMO-155)

•DigitalIsolationforA/D,D/A

Conversion

•SwitchingPowerSupply

•InstrumentInput/Output

Isolation

•GroundLoopElimination

ANODE

MXXX

XXX

7.0 ± 0.2

(0.276 ± 0.008)

4.4 ± 0.1

(0.173 ± 0.004)

OUT

CATHODE

GND

•PulseTransformer

Replacement

0.4 ± 0.05

(0.016 ± 0.002)

3.6 ± 0.1*

(0.142 ± 0.004)

0.102 ± 0.102

(0.004 ± 0.004)

0.15 ± 0.025

(0.006 ± 0.001)

2.5 ± 0.1

(0.098 ± 0.004)

7° MAX.

1.27

(0.050)

0.71

BSG

MIN.

(0.028)

MAX. LEAD COPLANARITY

= 0.102 (0.004)

DIMENSIONS IN MILLIMETERS (INCHES)

"Agilent" IS MARKED ON THE

UNDERSIDE OF THE PACKAGE

* MAXIMUM MOLD FLASH ON EACH SIDE IS 0.15 mm (0.006)

PinLocation(forreferenceonly)

Schematic

0.3

(0.01)

4.4

(0.17)

1.3

(0.05)

2.5

(0.10)

–

GND

HCPL-M601/11 SHIELD

0.9

(0.04)

TRUTH TABLE

(POSITIVE LOGIC)

0.5

(0.02)

USE OF A 0.1 µF BYPASS CAPACITOR

MUST BE CONNECTED BETWEEN PINS

6 AND 4 (SEE NOTE 1).

7.2

(0.28)

LED

OUTPUT

OFF

RecommendedOperatingConditions

Parameter

Symbol

I_FL*

Min.

Max.

250

Units

µA

InputCurrent,LowLevel

InputCurrent,HighLevel

SupplyVoltage,Output

Fan Out (R_L= 1 kΩ)

I_FH

4.5

5.5

TTL

Loads

OutputPull-UpResistor

OperatingTemperature

R_L

330

-40

4,000

Ω

°C

* The off condition can also be guaranteed by ensuring that V_F(off) ≤0.8 volts.

AbsoluteMaximumRatings

(NoDeratingRequiredupto85°C)

StorageTemperature .................................................... -55°C to +125°C

OperatingTemperature .................................................. -40°C to +85°C

ForwardInputCurrent-I_F(seeNote2) ....................................... 20mA

ReverseInputVoltage-V_R................................................................. 5 V

SupplyVoltage-V_CC(1MinuteMaximum) ........................................ 7 V

OutputCollectorCurrent-I_O........................................................ 50mA

OutputCollectorPowerDissipation ............................................ 85 mW

OutputCollectorVoltage-V_O............................................................ 7 V

(Selectionforhigheroutputvoltagesupto20Visavailable)

InfraredandVaporPhaseReflowTemperature ....................... see below

260

240

∆T = 145°C, 1°C/SEC

220

∆T = 115°C, 0.3°C/SEC

200

180

160

140

120

100

∆T = 100°C, 1.5°C/SEC

TIME – MINUTES

Maximum Solder Reflow Thermal Profile.

(Note: Use of Non-Chlorine Activated Fluxes is Recommended.)

Insulation Related Specifications

Parameter

Symbol Value Units

Conditions

Min. External Air Gap

(Clearance)

L(IO1)

≥5

Measured from input terminals

to output terminals

Min. External Tracking Path

(Creepage)

L(IO2)

≥5

Measured from input terminals

to output terminals

Min. Internal Plastic Gap

(Clearance)

0.08

Through insulation distance

conductor to conductor

Tracking Resistance

CTI

175

IIIa

DIN IEC 112/VDE 0303 Part 1

Material Group DIN VDE 0109

Isolation Group (per DIN VDE 0109)

Electrical Specifications

Over recommended temperature (T = -40°C to 85°C) unless otherwise specified. (See note 1.)

Parameter

Symbol Min. Typ.* Max. Units

Test Conditions

Fig. Note

Input Threshold

Current

I_TH

I_OH

V_OL

I_CCH

I_CCL

V_F

5.5

0.4

µA

V_CC= 5.5 V, I_O≥13 mA,

V_O= 0.6 V

High Level Output

Current

100

0.6

V_CC= 5.5 V, V_O= 5.5 V

I_F= 250 µA

Low Level Output

Voltage

V_CC= 5.5 V, I_F= 5 mA,

I_OL(Sinking) = 13 mA

2, 4,

5, 13

High Level Supply

Current

7.5

V_CC= 5.5 V, I_F= 0 mA,

Low Level Supply

Current

10.5

V_CC= 5.5 V, I_F= 10 mA,

Input Forward

Voltage

1.4

1.75

1.85

T = 25°C

1.5

1.3

I_F= 10 mA

Input Reverse

BV_R

I_R= 10 µA

Breakdown Voltage

Input Capacitance

C_IN

V_F= 0V, f = 1 MHz

Input Diode

Temperature

Coefficient

∆V_F/∆T_A

-1.6

mV/°C I_F= 10 mA

Input-Output

Insulation

2500

V_RMS

Ω

RH ≤ 50%, t = 1 min.

3, 4

ISO

Resistance

(Input-Output)

R_I-O

C_I-O

10¹²

0.6

V_I-O= 500 V

f = 1 MHz

Capacitance

(Input-Output)

*All typicals at T = 25°C, V_CC= 5 V.

Switching Specifications

Over recommended temperature (T_A= -40°C to 85°C), V_CC= 5 V, I_F= 7.5 mA unless otherwise specified.

Device

Parameter Symbol HCPL- Min. Typ.* Max. Unit

Test Conditions

Fig. Note

Propagation

Delay Time

to High

t_PLH

t_PHL

t_PSK

ns T_A= 25°C

6, 7

100

Output Level

Propagation

Delay Time

to Low

T_A= 25°C

6, 7

100

R_L= 350 Ω

Output Level

Propagation

Delay Skew

10,

Pulse Width |t_PHL- t_PLH

Distortion

3.5

C_L= 15 pF

Output Rise

Time

(10%-90%)

t_rise

Output Fall

Time

t_fall

(10%-90%)

Common

Mode

Transient

Immunity at

High Output

Level

|CM_H|

M600

10,000

V/µs V_CM= 10 V V_O(min)= 2 V

11 7, 9

R_L= 350 Ω

I_F= 0 mA

M601 5,000 10,000

M611 10,000 15,000

V_CM= 50 V

V_CM=1000V T_A= 25°C

Common

Mode

Transient

Immunity at

Low Output

Level

|CM_H|

M600

10,000

V_CM= 10 V V_O(max)= 0.8 V 11 8, 9

R_L= 350 Ω

I_F= 7.5 mA

M601 5,000 10,000

M611 10,000 15,000

V_CM= 50 V

V_CM= 1000V

T_A= 25°C

*All typicals at T_A= 25°C, V_CC= 5 V.

Notes:

1. Bypassing of the power supply line is required with a 0.1 µF ceramic disc capacitor adjacent to each optocoupler. The total lead

length between both ends of the capacitor and the isolator pins should not exceed 10 mm.

2. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current

does not exceed 20 mA.

3. Device considered a two terminal device: pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted together.

4. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 3000 V_RMSfor 1 second

(Leakage detection current limit, I_I-O≤ 5 µA).

5. The t_PLHpropagation delay is measured from 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the

rising edge of the output pulse.

6. The t_PHLpropagation delay is measured from 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the

falling edge of the output pulse.

7. CM_His the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic

state (i.e., V_OUT> 2.0 V).

8. CM_Lis the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic

state (i.e., V_OUT> 0.8 V).

9. For sinusoidal voltages, (|dV_CM|/dt)_max= πf_CMV_CM(p-p)

10. See application section; “Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew” for more information.

11. t_PSKis equal to the worst case difference in t_PHLand/or t_PLHthat will be seen between units at any given temperature within

the worst case operating condition range.

0.5

0.4

100

= 5.5 V

= 5.0 mA

T = 25°C

= 5.5 V

= 250 µA

–

= 12.8 mA

1.0

= 16 mA

= 6.4 mA

0.3

0.2

0.1

0.01

= 9.6 mA

0.001

-60 -40 -20

20 40 60 80 100

1.10 1.20

1.30 1.40

1.50

1.60

-60 -40 -20

20 40 60 80 100

– TEMPERATURE – °C

– FORWARD VOLTAGE – VOLTS

Figure 1. High Level Output

Current vs. Temperature.

Figure 2. Low Level Output Voltage

vs. Temperature.

Figure 3. Input Diode Forward

Characteristic.

= 5 V

= 25 °C

= 350 Ω

PULSE GEN.

= 1 KΩ

Z = 50 Ω

+5 V

t = t = 5 ns

= 4 KΩ

0.1µF

BYPASS

OUTPUT V

MONITORING

NODE

INPUT

MONITORING

NODE

– FORWARD INPUT CURRENT – mA

GND

Figure 4. Output Voltage vs.

Forward Input current.

*C IS APPROXIMATELY 15 pF WHICH INCLUDES

PROBE AND STRAY WIRING CAPACITANCE.

= 5.0 V

= 0.6 V

= 7.5 mA

INPUT

= 3.75 mA

= 10 mA, 15 mA

= 5.0 mA

PLH

PHL

OUTPUT

1.5 V

Figure 6. Test Circuit for t_PHLand t_PLH

-60 -40 -20

20 40 60 80 100

– TEMPERATURE – °C

Figure 5. Low Level Output Current

vs. Temperature.

100

105

= 5.0 V

= 7.5 mA

= 25°C

= 4 kΩ

, R = 4 KΩ

PLH

= 5.0 V

= 7.5 mA

, R = 350 Ω

PHL

1 KΩ

4 KΩ

PLH

, R = 350 Ω

= 350 kΩ

, R = 1 KΩ

PLH

, R = 1 KΩ

PLH

, R = 350 Ω

PLH

, R = 350 Ω

PHL

= 1 kΩ

1 KΩ

4 KΩ

-10

-60 -40 -20

20 40

80 100

-60 -40 -20

20 40

80 100

– PULSE INPUT CURRENT – mA

– TEMPERATURE – °C

Figure 7. Propagation Delay vs.

Temperature.

Figure 8. Propagation Delay vs.

Pulse Input Current.

Figure 9. Pulse Width Distortion vs.

Temperature.

= 5.0 V

= 7.5 mA

RISE

FALL

+5 V

= 4 kΩ

= 1 kΩ

300

290

350 Ω

OUTPUT V

0.1 µF

BYPASS

MONITORING

NODE

GND

= 350 Ω

= 350 Ω, 1 kΩ, 4 kΩ

-60 -40 -20

20 40 60 80 100

PULSE

GENERATOR

= 50 Ω

– TEMPERATURE – °C

Figure 10. Rise and Fall Time vs.

Temperature.

(PEAK)

0 V

5 V

SWITCH AT A: I = 0 mA

(MIN.)

SWITCH AT B: I = 7.5 mA

-2.4

-2.2

(MAX.)

0.5 V

-2.0

-1.8

-1.6

Figure 11. Test Circuit for Common

Mode Transient Immunity and

Typical Waveforms.

-1.4

-1.2

0.1

100

– PULSE INPUT CURRENT – mA

Figure 12. Temperature Coefficient

for Forward Voltage vs. Input

Current.

PropagationDelay,Pulse- beingsentthroughagroupof

only one edge were used, the

clock signal would need to be

twiceasfast.

WidthDistortionand

optocouplers,differencesin

propagationdelayswillcausethe

datatoarriveattheoutputsofthe

optocouplersatdifferenttimes.If

thisdifferenceinpropagation

delaysislargeenough,itwill

determinethemaximumrateat

whichparalleldatacanbesent

throughtheoptocouplers.

PropagationDelaySkew

Propagationdelayisafigureof

meritwhichdescribeshow

quicklyalogicsignalpropagates

throughasystem.Thepropaga-

Propagationdelayskew

representstheuncertaintyof

whereanedgemightbeafter

beingsentthroughan

tiondelayfromlowtohigh(t_PLH

istheamountoftimerequiredfor

aninputsignaltopropagateto

theoutput,causingtheoutputto

change from low to high.

)

optocoupler. Figure16shows

thattherewillbeuncertaintyin

boththedataandtheclocklines.

Itisimportantthatthesetwo

areasofuncertaintynotoverlap,

otherwisetheclocksignalmight

arrivebeforeallofthedata

outputshavesettled,orsomeof

thedataoutputsmaystartto

changebeforetheclocksignal

hasarrived.Fromthese

considerations,theabsolute

minimumpulsewidththatcanbe

sentthroughoptocouplersina

parallelapplicationistwicet_PSK.A

cautiousdesignshouldusea

slightlylongerpulsewidthto

ensurethatanyadditional

Propagationdelayskewisdefined

asthedifferencebetweenthe

minimumandmaximum

propagationdelays,eithert_PLHor

t_PHL, for any given group of

optocouplerswhichareoperating

underthesameconditions(i.e.,

thesamedrivecurrent,supply

voltage,outputload,and

Similarly,thepropagationdelay

from high to low (t_PHL) is the

amountoftimerequiredforthe

inputsignaltopropagatetothe

output,causingtheoutputto

change from high to low (see

Figure7).

operatingtemperature).As

Pulse-widthdistortion(PWD)

resultswhent_PLHandt_PHLdifferin

value.PWDisdefinedasthe

differencebetweent_PLHandt_PHL

andoftendeterminesthemaxi-

mumdataratecapabilityofa

transmissionsystem.PWD can

be expressed in percent by

dividingthePWD(inns)bythe

minimumpulsewidth(inns)

beingtransmitted.Typically,PWD

on the order of 20-30% of the

minimumpulsewidthistolerable;

theexactfiguredependsonthe

particularapplication(RS232,

RS422, T-1, etc.).

illustratedinFigure15,ifthe

inputs of a group of optocouplers

areswitchedeitherONorOFFat

thesametime,t_PSKisthe

differencebetweentheshortest

propagationdelay,eithert_PLHor

t_PHL,andthelongestpropagation

uncertaintyintherestofthe

circuit does not cause aproblem.

delay,eithert_PLHort_PHL

Thet_PSKspecifiedoptocouplers

offertheadvantagesof

Asmentionedearlier,t_PSKcan

determinethemaximumparallel

datatransmissionrate.Figure11

isthetimingdiagramofatypical

paralleldataapplicationwithboth

theclockandthedatalinesbeing

sentthroughoptocouplers.The

figureshowsdataandclock

signalsattheinputsandoutputs

of the optocouplers. To obtain the

maximumdatatransmissionrate,

both edges of the clock signal are

being used to clock the data; if

guaranteedspecificationsfor

propagationdelays,pulse-width

distortionandpropagationdelay

skewovertherecommended

temperature,andinputcurrent,

andpowersupplyranges.

Propagationdelayskew,t_PSK,is

animportantparameterto

considerinparalleldataappli-

cationswheresynchronizationof

signalsonparalleldatalinesisa

concern.Iftheparalleldatais

= 5.0 V

= 0.6 V

5 V

390 Ω

470

*D1

= 350 Ω

= 1 kΩ

0.1 µF

BYPASS

GND 1

GND 2

SHIELD

= 4 kΩ

* DIODE D1 (1N916 OR EQUIVALENT) IS NOT REQUIRED

FOR UNITS WITH OPEN COLLECTOR OUTPUT.

-60 -40 -20

20 40 60 80 100

– TEMPERATURE – °C

Figure 13. Input Threshold Current

vs. Temperature.

Figure 14. Recommended TTL/LSTTL to TTL/LSTTL Interface Circuit.

DATA

INPUTS

50%

CLOCK

1.5 V

DATA

OUTPUTS

PSK

1.5 V

CLOCK

PSK

Figure 15. Illustration of

Propagation Delay Skew – t_PSK

Figure16.ParallelDataTransmissionExample.

www.semiconductor.agilent.com

Data subject to change.

Obsoletes 5091-9635E (10/93)

5966-4942E (11/99)

HCPL-0601相关文章

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HCPL-0601产品参数

型号:	HCPL-0601
是否Rohs认证：	不符合
生命周期：	Transferred
包装说明：	SO-8
Reach Compliance Code：	unknown
HTS代码：	8541.40.80.00
风险等级：	5.15
其他特性：	OPEN COLLECTOR, UL RECOGNIZED
配置：	COMPLEX
标称数据速率：	10 MBps
最大正向电流：	0.02 A
最大绝缘电压：	2500 V
JESD-609代码：	e0
元件数量：	1
最大通态电流：	0.05 A
最高工作温度：	85 °C
最低工作温度：	-40 °C
光电设备类型：	LOGIC IC OUTPUT OPTOCOUPLER
最小供电电压：	4.5 V
端子面层：	Tin/Lead (Sn/Pb)
Base Number Matches：	1

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产品型号HCPL-0601的概述

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