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产品型号HCPL-7800-000E的概述

芯片HCPL-7800-000E的概述 HCPL-7800-000E是一款高度集成的光耦合器。它主要用于电气隔离和信号传递的应用，在工业和消费电子市场中广泛使用。该芯片通过光信号实现输入和输出之间的隔离，具有良好的防干扰能力，非常适合高压和高频的控制电路。HCPL-7800-000E的内部结构包括发光二极管（LED）和光电晶体管，前者负责产生光信号，后者则对光信号进行接收和转换。这种器件的设计使其能够在一定的温度范围内稳定工作，具有较高的耐压能力和可靠性。同时，HCPL-7800-000E的设计使其在电路板上占用较小的空间，这对于现代紧凑型电子设备至关重要。芯片HCPL-7800-000E的详细参数 HCPL-7800-000E的主要技术参数包括： - 输入电压范围：2.5V至5V。 - 输出电压范围：30V最大输出电压。 - 工作温度范围：-40℃至100℃。 - 隔离电压：高达...

产品型号HCPL-7800-000E的Datasheet PDF文件预览

HCPL-7800A/HCPL-7800

Isolation Amplifer

Datasheet

Lead (Pb) Free

RoHS 6 fully

compliant

RoHS 6 fully compliant options available;

-xxxE denotes a lead-free product

Description

Features

• 15 kV/µs Common-Mode Rejection at V = 1000 V

• Compact, Auto-Insertable Standard 8-pin DIP Pack-

age

• 0.00025 V/V/°C Gain Drift vs. Temperature

• 0.3 mV Input Oﬀset Voltage

• 100 kHz Bandwidth

• 0.004% Nonlinearity

• WorldwideSafetyApproval:UL1577(3750Vrms/1min.)

and CSA, IEC/EN/DIN EN 60747-5-2

• Advanced Sigma-Delta (Σ−∆) A/D Converter Technol-

ogy

The HCPL-7800(A) isolation ampliﬁer family was designed

for current sensing in electronic motor drives. In a typical

implementation, motor currents ﬂow through an external

resistor and the resulting analog voltage drop is sensed

by the HCPL-7800(A). A diﬀerential output voltage is

created on the other side of the HCPL-7800(A) optical

isolation barrier. This diﬀerential output voltage is pro-

portional to the motor current and can be converted to

a single-ended signal by using an op-amp as shown in

the recommended application circuit. Since common-

mode voltage swings of several hundred volts in tens of

nanoseconds are common in modern switching inverter

motor drives, the HCPL-7800(A) was designed to ignore

very high common-mode transient slew rates (of at least

10 kV/µs).

• Fully Diﬀerential Circuit Topology

The high CMR capability of the HCPL-7800(A) isolation

ampliﬁer provides the precision and stability needed to

accurately monitor motor current in high noise motor

control environ-ments, providing for smoother control

(less “torque ripple”) in various types of motor control

applications.

Applications

• Motor Phase and Rail Current Sensing

• Inverter Current Sensing

• Switched Mode Power Supply Signal Isolation

• General Purpose Current Sensing and Monitoring

• General Purpose Analog Signal Isolation

The product can also be used for general analog signal

isolation applications requiring high accuracy, stability,

and linearity under similarly severe noise con-ditions.

For general applications, we recommend the HCPL-7800

(gain tolerance of 3%). For precision applications Avago

Technologies oﬀers the HCPL-7800A with part-to-part

gain tolerance of 1%. The HCPL-7800(A) utilizes sigma

delta (Σ−∆) analog-to-digital converter technology,

chopper stabilized ampliﬁers, and a fully diﬀerential

circuit topology.

Functional Diagram

I_DD1

I_DD2

V_DD1

V_IN+

V_IN-

V_DD2

V_OUT+

Together, these features deliver unequaled isolation-

mode noise rejection, as well as excellent oﬀset and

gain accuracy and stability over time and temperature.

This performance is delivered in a compact, auto-insert-

able, industry standard 8-pin DIP package that meets

worldwide regulatory safety standards. (A gull-wing

surface mount option #300 is also available).

V_OUT-

GND1

GND2

SHIELD

NOTE: A 0.1 μF bypass capacitor must be connected

between pins 1 and 4 and between pins 5 and 8.

CAUTION: It is advised that normal static precautions be taken in handling and assembly

of this component to prevent damage and /or degradation which may be induced by ESD.

ꢀ

Ordering Information

HCPL-7800A/HCPL-7800 is UL Recognized with 3750 Vrms for 1 minute per UL1577.

Option

RoHS

Compliant

Non-RoHS

Compliant

Surface

Mount

Gull

Wing

Tape

& Reel

IEC/EN/DIN EN

60747-5-2

Part number

Package

Quantity

-000E

-300E

-500E

No option

#300

50 per tube

1000 per reel

HCPL-7800A

HCPL-7800

300 mil

DIP-8

#500

To order, choose a part number from the part number column and combine with the desired option from the option

column to form an order entry.

Example 1:

HCPL-7800A-500E to order product of Gull Wing Surface Mount package in Tape and Reel packaging with

IEC/EN/DIN EN 60747-5-2 Safety Approval in RoHS compliant.

Example 2:

HCPL-7800 to order product of 300 mil DIP package in tube packaging and non-RoHS compliant.

Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.

Remarks: The notation ‘#XXX’ is used for existing products, while (new) products launched since 15th July 2001 and

RoHS compliant option will use ‘-XXXE’.

Package Outline Drawings

Standard DIP Package

9.80 0.ꢀ2

(0.386 0.0ꢁ0ꢂ

DIMENSIONS IN MILLIMETERS AND (INCHESꢂ.

ꢁ

NOTE:

FLOATING LEAD PROTRUSION IS 0.2 mm (ꢀ0 milsꢂ MAX.

DATE CODE

A 7800

YYWW

ꢀ

7.6ꢀ 0.ꢀ2

(0.300 0.0ꢁ0ꢂ

ꢁ.78 (0.070ꢂ MAX.

ꢁ.ꢁ9 (0.047ꢂ MAX.

6.32 0.ꢀ2

(0.ꢀ20 0.0ꢁ0ꢂ

3.26 0.ꢁ3

(0.ꢁ40 0.002ꢂ

4.70 (0.ꢁ82ꢂ MAX.

0.2ꢁ (0.0ꢀ0ꢂ MIN.

ꢀ.9ꢀ (0.ꢁꢁ2ꢂ MIN.

0.ꢀ0 (0.008

0.33 (0.0ꢁ3

2˚ TYP.

ꢁ.080 0.3ꢀ0

0.62 (0.0ꢀ2ꢂ MAX.

(0.043 0.0ꢁ3ꢂ

ꢀ.24 0.ꢀ2

(0.ꢁ00 0.0ꢁ0ꢂ

Note:

Initial or continued variation in the color of the HCPL-7800(A)’s white mold compound is normal and does not aﬀect device performance or

reliability.

ꢁ

Gull Wing Surface Mount Option 300

LAND PATTERN RECOMMENDATION

ꢁ.0ꢁ6 (0.040ꢂ

9.80 0.ꢀ2

(0.386 0.0ꢁ0ꢂ

ꢁ

A 7800

YYWW

6.320 0.ꢀ2

(0.ꢀ20 0.0ꢁ0ꢂ

ꢁ0.9 (0.430ꢂ

ꢀ.0 (0.080ꢂ

ꢀ

ꢁ.ꢀ7 (0.020ꢂ

9.62 0.ꢀ2

(0.380 0.0ꢁ0ꢂ

ꢁ.780

(0.070ꢂ

MAX.

ꢁ.ꢁ9

(0.047ꢂ

MAX.

7.6ꢀ 0.ꢀ2

(0.300 0.0ꢁ0ꢂ

0.ꢀ0 (0.008ꢂ

0.33 (0.0ꢁ3ꢂ

3.26 0.ꢁ3

(0.ꢁ40 0.002ꢂ

ꢁ.080 0.3ꢀ0

(0.043 0.0ꢁ3ꢂ

0.632 0.ꢀ2

(0.0ꢀ2 0.0ꢁ0ꢂ

ꢁꢀ˚ NOM.

0.632 0.ꢁ30

(0.0ꢀ2 0.002ꢂ

ꢀ.24

(0.ꢁ00ꢂ

BSC

DIMENSIONS IN MILLIMETERS (INCHESꢂ.

TOLERANCES (UNLESS OTHERWISE SPECIFIEDꢂ:

LEAD COPLANARITY

MAXIMUM: 0.ꢁ0ꢀ (0.004ꢂ

xx.xx = 0.0ꢁ

xx.xxx = 0.002

NOTE: FLOATING LEAD PROTRUSION IS 0.2 mm (ꢀ0 milsꢂ MAX.

ꢂ

Maximum Solder Reﬂow Thermal Proﬁle

300

PREHEATING RATE 3˚C + 1˚Cꢀ–0.5˚CꢀSEC.

REFLOW HEATING RATE 2.5˚C 0.5˚CꢀSEC.

PEAK

TEMP.

245˚C

PEAK

TEMP.

240˚C

PEAK

TEMP.

230˚C

200

2.5˚C 0.5˚CꢀSEC.

SOLDERING

TIME

200˚C

160˚C

150˚C

140˚C

SEC.

3˚C + 1˚Cꢀ–0.5˚C

100

PREHEATING TIME

150˚C, 90 + 30 SEC.

50 SEC.

TIGHT

TYPICAL

LOOSE

100

150

200

250

ROOM TEMPERATURE

TIME (SECONDS)

Note: Use of non-chlorine-activated ﬂuxes is highly recommended.

Recommended Pb-Free IR Proﬁle

TIME WITHIN 5 ˚C of ACTUAL

PEAK TEMPERATURE

20-40 SEC.

260 +0ꢀ-5 ˚C

217 ˚C

RAMP-UP

3 ˚CꢀSEC. MAX.

150 - 200 ˚C

RAMP-DOWN

6 ˚CꢀSEC. MAX.

smax

smin

60 to 150 SEC.

PREHEAT

60to180SEC.

t 25 ˚C to PEAK

TIME (SECONDS)

NOTES:

THE TIME FROM 25 ˚C to PEAK TEMPERATURE = 8 MINUTES MAX.

= 200 ˚C, T = 150 ˚C

smax

smin

Note: Use of non-chlorine-activated ﬂuxes is highly recommended.

ꢃ

Regulatory Information

The HCPL-7800(A) has been approved by the following organizations:

IEC/EN/DIN EN 60747-5-2

Approved under UL 1577, component

Approved under:

recognition program up to V = 3750 Vrms.

IEC 60747-5-2:1997 + A1:2002

EN 60747-5-2:2001 + A1:2002

DIN EN 60747-5-2 (VDE 0884 Teil 2): 2003-01.

ISO

CSA

Approved under CSA Component Acceptance

Notice #5, File CA 88324.

[1]

IEC/EN/DIN EN 60747-5-2 Insulation Characteristics

Description

Symbol

Characteristic

Unit

Installation classiﬁcation per DIN VDE 0110/1.89, Table 1

for rated mains voltage 300 Vrms

for rated mains voltage 600 Vrms

I-IV

I-III

Climatic Classiﬁcation

55/100/21

Pollution Degree (DIN VDE 0110/1.89)

Maximum Working Insulation Voltage

V_IORM

V_PR

891

V_PEAK

Input to Output Test Voltage, Method b^[2]

V_IORMx 1.875 = V_PR,100% Production Test with

t_m= 1 sec, Partial discharge < 5 pC

1670

Input to Output Test Voltage, Method a^[2]

V_IORMx 1.5 = V_PR,Type and Sample Test,

t_m= 60 sec, Partial discharge < 5 pC

V_PR

1336

6000

V_PEAK

Highest Allowable Overvoltage

V_IOTM

(Transient Overvoltage t_ini= 10 sec)

Safety-limiting values—maximum values

allowed in the event of a failure.

Case Temperature

T_S

175

400

600

°C

Input Current^[3]

I_S,INPUT

P_S,OUTPUT

Output Power^[3]

Insulation Resistance at T_S, V_IO= 500 V

Notes:

R_S

>10⁹

Ω

800

700

600

500

400

300

1. Insulation characteristics are guaranteed only within the safety maximum ratings which

must be ensured by protective circuits within the application. Surface Mount Classiﬁcation is

Class A in accordance with CECC00802.

(mW)

(mA)

2. Refer to the optocoupler section of the Isolation and Control Components Designer’s Cata-

log, under Product Safety Regulations section, (IEC/EN/DIN EN 60747-5-2) for a detailed descrip-

tion of Method a and Method b partial discharge test proﬁles.

3. Refer to the following ﬁgure for dependence of PS and IS on ambient temperature.

200

100

75 100 125 150 175 200

- CASE TEMPERATURE - ^o

ꢄ

Insulation and Safety Related Speciﬁcations

Parameter

Symbol

Value

Unit

Conditions

Minimum External Air Gap

(Clearance)

L(101)

7.4

Measured from input terminals to output

terminals, shortest distance through air.

Minimum External Tracking

(Creepage)

L(102)

CTI

8.0

0.5

Measured from input terminals to output

terminals, shortest distance path along body.

Minimum Internal Plastic Gap

(Internal Clearance)

Through insulation distance conductor to

conductor, usually the straight line distance

thickness between the emitter and detector.

Tracking Resistance

(Comparative Tracking Index)

>175

III a

Volts

DIN IEC 112/VDE 0303 Part 1

Isolation Group

Material Group

(DIN VDE 0110, 1/89, Table 1)

Absolute Maximum Ratings

Parameter

Symbol

Min.

-55

- 40

Max.

Unit

Note

Storage Temperature

Operating Temperature

Supply Voltage

T_S

125

°C

T_A

100

V_DD1, V_DD2

V_IN+, V_IN-

5.5

Steady-State Input Voltage

2 Second Transient Input Voltage

-2.0

-6.0

V_DD1+0.5

Output Voltage

V_OUT

-0.5

V_DD2+0.5

Solder Reﬂow Temperature Proﬁle

See Maximum Solder Reﬂow Thermal Proﬁle Section

Recommended Operating Conditions

Parameter

Symbol

Min.

-40

4.5

Max.

Unit

°C

Note

Ambient Operating Temperature

Supply Voltage

T_A

V_DD1, V_DD2

V_IN+, V_IN-

5.5

200

Input Voltage (accurate and linear)

Input Voltage (functional)

-200

-2

ꢅ

DC Electrical Speciﬁcations

Unless otherwise noted, all typicals and ﬁgures are at the nominal operating conditions of V = 0, V = 0 V, V =

DD1

IN+

IN-

DD2

= 5 V and T = 25°C; all Min./Max. speciﬁcations are within the Recommended Operating Conditions.

Parameter

Symbol

Min. Typ.

Max. Unit

Test Conditions

Fig. Note

Input Oﬀset Voltage

V_OS

-2.0

0.3

2.0

T_A= 25°C

1,2

-3.0

3.0

-40°C < T_A< +85°C,

-4.5 V < (V_DD1, V_DD2) < 5.5 V

Magnitude of Input Oﬀset

Change vs. Temperature

|DV_OS/DT_A|

G₁

3.0

10.0

µV/°C

V/V

Gain (HCPL-7800A)

7.92 8.00

7.76 8.00

8.08

8.24

-200 mV < V_IN+< 200 mV,

T_A= 25°C,

4,5,6

Gain (HCPL-7800)

G₃

Magnitude of V_OUT

Gain Change vs.Temperature

|DG/DT_A|

0.00025

V/V/°C

V_OUT200 mV Nonlinearity

NL₂₀₀

0.0037

0.0002

0.35

0.2

-200 mV < V_IN+< 200 mV

-100 mV < V_IN+< 100 mV

7,8

Magnitude of V_OUT

200 mV Nonlinearity

Change vs. Temperature

|dNL₂₀₀/dT|

% / °C

V_OUT100 mV Nonlinearity

NL₁₀₀

0.0027

308.0

Maximum Input Voltage

before V_OUTClipping

|V_IN+|MAX

Input Supply Current

Output Supply Current

I_DD1

I_DD2

10.86

11.56

16.0

V_IN+= 400 mV

V_IN+= -400 mV

Input Current

I_IN+

-0.5

5.0

2.8

µA

Magnitude of Input

Bias Current vs.

Temperature Coeﬃcient

|dI_IN/dT|

0.45

nA/°C

Output Low Voltage

Output High Voltage

V_OL

1.29

3.80

2.545

V_OH

V_OCM

Output Common-Mode

Voltage

2.2

Output Short-Circuit

Current

|I_OSC

18.6

Equivalent Input Impedance R_IN

500

V_OUTOutput Resistance

R_OUT

Input DC Common-Mode

Rejection Ratio

CMRR_IN

ꢆ

AC Electrical Speciﬁcations

Unless otherwise noted, all typicals and ﬁgures are at the nominal operating conditions of V = 0, V = 0 V, V =

DD1

IN+

IN-

= 5 V and T = 25°C; all Min./Max. speciﬁcations are within the Recommended Operating Conditions.

DD2

Parameter

Symbol

Min.

Typ.

Max.

Unit

Test Conditions

Fig.

Note

V_OUTBandwidth

(-3 dB) sine wave.

100

kHz

V_IN+= 200 mV_pk-pk

12,13

V_OUTNoise

N_OUT

t_PD10

31.5

2.03

mVrms

µs

V_IN+= 0.0 V

V_INto V_OUT

Signal Delay

(50 – 10%)

3.3

V_IN+= 0 mV to 150 mV

step.

Measured at output of

MC34081 on Figure 15.

14,15

V_INto V_OUT

Signal Delay

(50 – 50%)

t_PD50

t_PD90

t_R/F

3.47

4.99

2.96

5.6

9.9

6.6

V_INto V_OUT

Signal Delay

(50 – 90%)

V_OUT

Rise/ Fall Time

(10 – 90%)

Common Mode

Transient

Immunity

CMTI

PSR

10.0

15.0

170

kV/µs

V_CM= 1 kV, T_A= 25°C

Power Supply

Rejection

mVrms

With recommended

application circuit.

Package Characteristics

Parameter

Symbol

Min.

Typ.

Max.

Unit

Test Condition

Fig.

Note

Input-Output

Momentary Withstand

Voltage

V_ISO

3750

Vrms

RH < 50%,

t = 1 min.

T_A= 25°C

16,17

Resistance

(Input-Output)

R_I-O

C_I-O

>10⁹

1.2

Ω

V_I-O= 500 V_DC

Capacitance

ƒ = 1 MHz

(Input-Output)

ꢇ

Notes:

12. CMRR is deﬁned as the ratio of the diﬀerential signal

gain (signal applied diﬀerentially between pins and 3)

General Note: Typical values represent the mean value of all char-

acterization units at the nominal operating conditions. Typical drift

speciﬁcations are determined by calculating the rate of change of the

speciﬁed parameter versus the drift pa-rameter (at nominal operat-

ing conditions) for each characterization unit, and then averaging the

individual unit rates. The corresponding drift ﬁgures are normalized

to the nominal operating conditions and show how much drift occurs

as the par-ticular drift parameter is varied from its nominal value, with

all other parameters held at their nominal operating values. Note that

the typical drift speciﬁcations in the tables below may diﬀer from the

slopes of the mean curves shown in the corresponding ﬁgures.

to the common-mode gain (input pins tied together and the signal

applied to both inputs at the same time), expressed in dB.

13. Output noise comes from two primary sources: chopper noise

and sigma-delta quantization noise. Chopper noise results from

chopper stabilization of the output op-amps. It occurs at a speciﬁc

frequency (typically 400 kHz at room temperature), and is not at-

tenuated by the internal output ﬁlter. A ﬁlter circuit can be easily

added to the external post-ampliﬁer to reduce the total rms output

noise. The internal output ﬁlter does eliminate most, but not all, of

the sigma-delta quantization noise. The magnitude of the output

quantization noise is very small at lower frequencies (below 10 kHz)

and increases with increasing frequency.

1. Avago Technologies recommends operation with V = 0 V (tied to

IN-

GND1). Limiting V to 100 mV will improve DC nonlinearity and

IN+

14. CMTI (Common Mode Transient Immunity or CMR, Common Mode

Rejection) is tested by applying an exponentially rising/falling volt-

age step on pin 4 (GND1) with respect to pin 5 (GND2). The rise time

of the test waveform is set to approximately 50 ns. The amplitude

nonlinearity drift. If V is brought above V

– 2 V, an internal test

IN-

DD1

mode may be activated. This test mode is for testing LED coupling

and is not intended for customer use.

2. This is the Absolute Value of Input Oﬀset Change vs. Temperature.

3. Gain is deﬁned as the slope of the best-ﬁt line of diﬀerential output

of the step is adjusted until the diﬀerential output (V

–V

)

OUT+ OUT-

exhibits more than a 200 mV deviation from the average output

voltage for more than 1µs. The HCPL-7800(A) will continue to func-

tion if more than 10 kV/µs common mode slopes are applied, as

long as the breakdown voltage limitations are observed.

voltage (V

–V

) vs. diﬀerential input voltage (V –V ) over

OUT+ OUT- IN+ IN-

the speciﬁed input range.

4. This is the Absolute Value of Gain Change vs. Temperature.

5. Nonlinearity is deﬁned as half of the peak-to-peak output deviation

from the best-ﬁt gain line, expressed as a percentage of the full-

scale diﬀerential output voltage.

15. Data sheet value is the diﬀerential amplitude of the transient at the

output of the HCPL-7800(A) when a 1 V

, 1 MHz square wave

pk-pk

with 40 ns rise and fall times is applied to both V

and V

DD1

DD2

6. NL

is the nonlinearity speciﬁed over an input voltage range of

16. In accordance with UL 1577, each optocoupler is proof tested by ap-

100

100 mV.

plying an insulation test voltage ≥4500 V for 1 second (leakage

rms

detection current limit, I ≤ 5 µA). This test is performed before

7. The input supply current decreases as the diﬀerential input voltage

I-O

the 100% production test for partial discharge (method b) shown in

IEC/EN/DIN EN 60747-5-2 Insulation Characteristic Table.

(V –V ) decreases.

IN+ IN-

8. The maximum speciﬁed output supply current occurs when the

17. The Input-Output Momentary Withstand Voltage is a dielectric

voltage rating that should not be interpreted as an input-output

continuous voltage rating. For the continuous voltage rating refer

to the IEC/EN/DIN EN 60747-5-2 insulation characteristics table and

your equipment level safety speciﬁcation.

diﬀerential input voltage (V –V ) = -200 mV, the maximum rec-

IN+ IN-

ommended operat-ing input voltage. However, the out-put sup-

ply current will continue to rise for diﬀerential input voltages up to

approximately -300 mV, beyond which the output supply current

remains constant.

18. This is a two-terminal measurement: pins 1–4 are shorted together

and pins 5–8 are shorted together.

9. Because of the switched-capacitor nature of the input sigma-delta

con-verter, time-averaged values are shown.

10. When the diﬀerential input signal exceeds approximately 308 mV,

the outputs will limit at the typical values shown.

11. Short circuit current is the amount of output current generated

when either output is shorted to V

or ground.

DD2

ꢈ

V_DDꢁ

V_DDꢀ

+ꢁ2 V

0.ꢁ µF

ꢁ

ꢀ

0.ꢁ µF

ꢁ0 K

HCPL-7800

OUT

0.ꢁ µF

ꢁ0 K

AD6ꢀ4CD

GAIN = ꢁ00

0.ꢁ µF

0.47

µF

0.47

µF

-ꢁ2 V

Figure 1. Input Oﬀset Voltage Test Circuit.

0.8

0.7

8.032

8.03

0.39

0.38

0.37

0.36

0.32

vs. V_DDꢁ

vs. V_DDꢀ

0.6

0.2

0.4

8.0ꢀ2

8.0ꢀ

8.0ꢁ2

8.0ꢁ

0.3

0.ꢀ

0.34

0.33

-22 -ꢀ2

ꢁꢀ2

-22 -32 -ꢁ2

ꢀ2 42 62 82 ꢁ02 ꢁꢀ2

4.2

4.72

2.0

2.ꢀ2

2.2

T_A- TEMPERATURE - ˚C

T_A- TEMPERATURE - ¡C

V_DD- SUPPLY VOLTAGE - V

Figure 2. Input Oﬀset Voltage vs. Temperature.

Figure 3. Input Oﬀset vs. Supply.

Figure 4. Gain vs. Temperature.

V_DDꢁ

V_DDꢀ

+ꢁ2 V

0.ꢁ µF

ꢁ

0.ꢁ µF

ꢁ0 K

404

ꢀ

V_IN

HCPL-7800

OUT

ꢁ3.ꢀ

ꢁ0 K

AD6ꢀ4CD

GAIN = 4

AD6ꢀ4CD

GAIN = ꢁ0

0.0ꢁ µF

0.ꢁ µF

0.47

µF

0.47

µF

-ꢁ2 V

ꢁ0 K

0.47

µF

Figure 5. Gain and Nonlinearity Test Circuit.

ꢀ0

8.03ꢀ

0.03

0.002

0.0ꢀ2

8.03

8.0ꢀ8

8.0ꢀ6

8.0ꢀ4

0.004

0.003

0.00ꢀ

0.0ꢀ

0.0ꢁ2

0.0ꢁ

vs. V_DDꢁ

vs. V_DDꢀ

vs. V_DDꢁ

vs. V_DDꢀ

0.002

4.2

4.72

2.0

2.ꢀ2

2.2

-22 -ꢀ2

ꢁꢀ2

4.2

4.72

2.0

2.ꢀ2

2.2

V_DD- SUPPLY VOLTAGE - V

T_A- TEMPERATURE - ¡C

V_DD- SUPPLY VOLTAGE - V

Figure 6. Gain vs. Supply.

Figure 7. Nonlinearity vs. Temperature.

Figure 8. Nonlinearity vs. Supply.

-ꢁ

-ꢀ

-3

4.ꢀ

3.4

ꢁ3

ꢁ0

ꢀ.6

ꢁ.8

ꢁ.0

-4

-2

IDDꢁ

IDDꢀ

V_OP

V_OR

-0.2

-0.6 -0.4 -0.ꢀ

0.ꢀ

0.4

0.6

-0.2

-0.3

-0.ꢁ

0.ꢁ

0.3

0.2

-0.3

-0.ꢁ

0.ꢁ

0.3

0.2

V_IN- INPUT VOLTAGE - V

Figure 9. Output Voltage vs. Input Voltage.

Figure 10. Supply Current vs. Input Voltage. Figure 11. Input Current vs. Input Voltage.

ꢁ

2.2

4.7

3.9

3.ꢁ

-20

Tpd ꢁ0

Tpd 20

Tpd 90

Trise

-ꢁ

-ꢀ

-ꢁ00

-ꢁ20

-ꢀ00

-3

-4

ꢀ.3

ꢁ.2

-ꢀ20

-300

ꢁ0

ꢁ00

ꢁ000 ꢁ0000 ꢁ00000

FREQUENCY (Hzꢂ

ꢁ0

ꢁ00

ꢁ000 ꢁ0000 ꢁ00000

FREQUENCY (Hzꢂ

-22 -ꢀ2

ꢁꢀ2

T_A- TEMPERATURE - ˚C

Figure 12. Gain vs. Frequency.

Figure 13. Phase vs. Frequency.

Figure 14. Propagation Delay vs. Temperature.

ꢀꢀ

ꢁ0 K

DDꢀ

DDꢁ

+ꢁ2 V

0.ꢁ µF

ꢁ

ꢀ

0.ꢁ µF

ꢀ K

HCPL-7800

OUT

MC3408ꢁ

0.ꢁ µF

0.0ꢁ µF

ꢁ0 K

-ꢁ2 V

IMPEDANCE LESS THAN ꢁ0 Ω.

Figure 15. Propagation Delay Test Circuits.

ꢁ0 K

ꢁ20 pF

+ꢁ2 V

DDꢀ

78L02

IN OUT

0.ꢁ µF

ꢁ

ꢀ

0.ꢁ

µF

0.ꢁ

µF

0.ꢁ µF

ꢀ K

HCPL-7800

9 V

OUT

MC3408ꢁ

0.ꢁ µF

ꢁ0 K

ꢁ20

PULSE GEN.

-ꢁ2 V

Figure 16. CMTI Test Circuits.

ꢀꢁ

Application Information

Power Supplies and Bypassing

The recommended supply con-nections are shown in

Figure 17. A ﬂoating power supply (which in many ap-

plications could be the same supply that is used to drive

the high-side power transistor) is regulated to 5 V using

a simple zener diode (D1); the value of resistor R4 should

be chosen to supply suﬃcient current from the existing

ﬂoating supply. The voltage from the current sensing

resistor (Rsense) is applied to the input of the HCPL-

7800(A) through an RC anti-aliasing ﬁlter (R2 and C2).

Although the application circuit is relatively simple, a few

recommendations should be followed to ensure optimal

performance.

The power supply for the HCPL -7800(A) is most often

obtained from the same supply used to power the

power transistor gate drive circuit. If a dedicated supply

is required, in many cases it is possible to add an ad-

ditional winding on an existing transformer. Otherwise,

some sort of simple isolated supply can be used, such as

a line powered transformer or a high-frequency DC-DC

converter.

An inexpensive 78L05 three-terminal regulator can also

be used to reduce the ﬂoating supply voltage to 5 V. To

help attenuate high-frequency power supply noise or

ripple, a resistor or inductor can be used in series with

the input of the regulator to form a low-pass ﬁlter with

the regulator’s input bypass capacitor.

HV+

FLOATING

POWER

SUPPLY

GATE DRIVE

CIRCUIT

* * *

Dꢁ

2.ꢁ V

Cꢁ

0.ꢁ µF

Rꢀ

39 Ω

Cꢀ

0.0ꢁ µF

HCPL-7800

MOTOR

Rꢁ

* * *

SENSE

* * *

HV-

Figure 17. Recommended Supply and Sense Resistor Connections.

ꢀꢂ

As shown in Figure 18, 0.1 µF bypass capacitors (C1, C2)

should be located as close as possible to the pins of the

HCPL-7800(A). The bypass capacitors are required because

of the high-speed digital nature of the signals inside the

HCPL-7800(A). A 0.01 µF bypass capacitor (C2) is also rec-

ommended at the input due to the switched-capacitor

nature of the input circuit. The input bypass capacitor

also forms part of the anti-aliasing ﬁlter, which is recom-

mended to prevent high-frequency noise from aliasing

down to lower frequencies and interfering with the input

signal. The input ﬁlter also performs an important reliabil-

ity function—it reduces transient spikes from ESD events

ﬂowing through the current sensing resistor.

PC Board Layout

The design of the printed circuit board (PCB) should follow

good layout practices, such as keeping bypass capacitors

close to the supply pins, keeping output signals away

from input signals, the use of ground and power planes,

etc. In addition, the layout of the PCB can also aﬀect the

isolation transient immunity (CMTI) of the HCPL-7800(A),

due primarily to stray capacitive coupling between the

input and the output circuits. To obtain optimal CMTI

performance, the layout of the PC board should minimize

any stray coupling by maintaining the maximum possible

distance between the input and output sides of the circuit

and ensuring that any ground or power plane on the PC

board does not pass directly below or extend much wider

than the body of the HCPL-7800(A).

POSITIVE

FLOATING

SUPPLY

ꢁ20 pF

HV+

GATE DRIVE

CIRCUIT

* * *

ꢁ0.0 K

Uꢁ

78L02

+2 V

+ꢁ2 V

IN OUT

0.ꢁ µF

Cꢁ

Cꢀ

ꢁ

ꢀ

0.ꢁ

µF

0.ꢁ

µF

0.ꢁ µF

Rꢁ

ꢀ.00 K

Uꢀ

0.0ꢁ

µF

Rꢀ

MC3408ꢁ

ꢀ.00 K

MOTOR

* * *

ꢁ20 pF

ꢁ0.0 K

R_SENSE

0.ꢁ µF

HCPL-7800

-ꢁ2 V

* * *

HV-

Figure 18: Recommended Application Circuit.

Cꢀ

TO V_DDꢁ

TO V_DDꢀ

V_OUT+

V_OUT-

TO R_SENSE+

TO R_SENSE-

Figure 19. Example Printed Circuit Board Layout.

ꢀꢃ

Current Sensing Resistors

The current sensing resistor should have low resistance (to

minimize power dissipation), low inductance (to minimize

di/dt induced voltage spikes which could adversely aﬀect

operation), and reasonable tolerance (to maintain overall

circuit accuracy). Choosing a particular value for the

resistor is usually a compro-mise between minimizing

power dissipation and maximizing accu-racy. Smaller

sense resistance decreases power dissipation, while larger

sense resistance can improve circuit accuracy by utilizing

the full input range of the HCPL -7800(A).

become a larger percentage of the signal amp-litude. The

selected value of the sense resistor will fall somewhere

between the minimum and maximum values, depending

on the particular requirements of a speciﬁc design.

When sensing currents large enough to cause signiﬁcant

heating of the sense resistor, the temperature coeﬃcient

(tempco) of the resistor can introduce nonlinearity due to

the signal dependent temperature rise of the resistor. The

eﬀect increases as the resistor-to-ambient thermal resis-

tance increases. This eﬀect can be minimized by reducing

the thermal resistance of the current sensing resistor or

by using a resistor with a lower tempco. Lowering the

thermal resistance can be accomplished by repositioning

the current sensing resistor on the PC board, by using

larger PC board traces to carry away more heat, or by

using a heat sink.

The ﬁrst step in selecting a sense resistor is determining

how much current the resistor will be sensing. The graph

in Figure 20 shows the RMS current in each phase of a

three-phase induction motor as a function of average

motor output power (in horsepower, hp) and motor

drive supply voltage. The maximum value of the sense

re-sistor is determined by the current being measured

and the maxi-mum recommended input voltage of the

isolation ampliﬁer. The maximum sense resistance can

be calculated by taking the maxi-mum recommended

input voltage and dividing by the peak current that the

sense resistor should see during normal operation. For

example, if a motor will have a maximum RMS current

of 10 A and can experience up to 50% overloads during

normal op-eration, then the peak current is 21.1 A (=10 x

1.414 x 1.5). Assuming a maximum input voltage of 200

mV, the maximum value of sense resistance in this case

would be about 10 mΩ.

For a two-terminal current sensing resistor, as the value

of resistance decreases, the re-sistance of the leads

become a signiﬁcant percentage of the total resistance.

This has two primary eﬀects on resistor accuracy. First,

the eﬀective resistance of the sense resistor can become

dependent on factors such as how long the leads are, how

they are bent, how far they are inserted into the board,

and how far solder wicks up the leads during assembly

(these issues will be discussed in more detail shortly).

Second, the leads are typically made from a material, such

as copper, which has a much higher tempco than the

material from which the resistive element itself is made,

resulting in a higher tempco overall.

440 V

380 V

ꢀꢀ0 V

ꢁꢀ0 V

Both of these eﬀects are eliminated when a four-terminal

current sensing resistor is used. A four- terminal resistor

has two additional terminals that are Kelvin-connected

directly across the resistive element itself; these two

terminals are used to monitor the voltage across the

resistive element while the other two terminals are used

to carry the load current. Because of the Kelvin connection,

any voltage drops across the leads carrying the load current

should have no impact on the measured voltage.

ꢀ2

ꢀ0

ꢁ2

ꢁ0

ꢁ2

ꢀ0 ꢀ2

30 32

When laying out a PC board for the current sensing

resistors, a couple of points should be kept in mind. The

Kelvin connections to the resistor should be brought

together under the body of the resistor and then run very

close to each other to the input of the HCPL-7800(A); this

minimizes the loop area of the connection and reduces

the possibility of stray magnetic ﬁelds from interfering

with the measured signal. If the sense resistor is not

located on the same PC board as the HCPL-7800(A) circuit,

a tightly twisted pair of wires can accomplish the same

thing.

MOTOR PHASE CURRENT - A (rmsꢂ

Figure 20. Motor Output Horsepower vs. Motor Phase Current and Supply

The maximum average power dissipation in the sense

resistor can also be easily calculated by multiplying the

sense resistance times the square of the maximum RMS

current, which is about 1 W in the previous example. If

the power dissipation in the sense resistor is too high, the

resistance can be decreased below the maximum value

to decrease power dissipation. The minimum value of the

sense resistor is limited by precision and accuracy require-

ments of the design. As the resistance value is reduced,

the output voltage across the resistor is also reduced,

which means that the oﬀset and noise, which are ﬁxed,

Also, multiple layers of the PC board can be used to

increase current carrying capacity. Numerous plated-

through vias should surround each non-Kelvin terminal of

ꢀꢄ

the sense resistor to help distribute the current between

the layers of the PC board. The PC board should use 2 or

4 oz. copper for the layers, resulting in a current carrying

capacity in excess of 20 A. Making the current carrying

traces on the PC board fairly large can also improve the

sense resistor’s power dissipation capability by acting as a

heat sink. Liberal use of vias where the load current enters

and exits the PC board is also recommended.

Output Side

The op-amp used in the external post-ampliﬁer circuit

should be of suﬃciently high precision so that it does not

contribute a signiﬁcant amount of oﬀset or oﬀset drift

relative to the contribution from the isolation ampliﬁer.

Generally, op-amps with bipolar input stages exhibit

better oﬀset performance than op-amps with JFET or

MOSFET input stages.

Note: Please refer to Avago Technologies Application Note 1078 for

additional information on using Isolation Ampliﬁers.

In addition, the op-amp should also have enough

bandwidth and slew rate so that it does not adversely

aﬀect the response speed of the overall circuit. The post-

ampliﬁer circuit includes a pair of capacitors (C5 and C6)

that form a single-pole low-pass ﬁlter; these capacitors

allow the bandwidth of the post-amp to be adjusted

independently of the gain and are useful for reducing

the output noise from the isola-tion ampliﬁer. Many

diﬀerent op-amps could be used in the circuit, including:

MC34082A (Motorola), TLO32A, TLO52A, and TLC277

(Texas Instruments), LF412A (National Semiconductor).

Sense Resistor Connections

The recommended method for connecting the HCPL-

7800(A) to the current sensing resistor is shown in Figure

18. V (pin 2 of the HPCL-7800(A)) is connected to the

IN+

positive terminal of the sense resistor, while V (pin

IN-

3) is shorted to GND1 (pin 4), with the power-supply

return path functioning as the sense line to the negative

terminal of the current sense resistor. This allows a single

pair of wires or PC board traces to connect the HCPL-

7800(A) circuit to the sense resistor. By referencing the

input circuit to the negative side of the sense resistor,

any load current induced noise transients on the resistor

are seen as a common-mode signal and will not interfere

with the current-sense signal. This is important because

the large load currents ﬂowing through the motor drive,

along with the parasitic inductances inherent in the

wiring of the circuit, can generate both noise spikes and

oﬀsets that are relatively large compared to the small

voltages that are being measured across the current

sensing resistor.

The gain-setting resistors in the post-amp should have a

tolerance of 1% or better to ensure adequate CMRR and

adequate gain toler-ance for the overall circuit. Resistor

networks can be used that have much better ratio toler-

ances than can be achieved using discrete resistors. A

resistor network also reduces the total number of compo-

nents for the circuit as well as the required board space.

If the same power supply is used both for the gate

drive circuit and for the current sensing circuit, it is very

important that the connection from GND1 of the HCPL-

7800(A) to the sense resistor be the only return path for

supply current to the gate drive power supply in order

to eliminate potential ground loop problems. The only

direct connection between the HCPL-7800(A) circuit

and the gate drive circuit should be the positive power

supply line.

ꢀꢅ

FREQUENTLY ASKED QUESTIONS ABOUT

THE HCPL-7800(A)

1. THE BASICS

2. Filter resistor: The equivalent input resistance for

HCPL-7800(A) is around 500 kΩ. It is therefore best

to ensure that the ﬁlter resistance is not a signiﬁcant

percentage of this value; otherwise the oﬀset voltage

will be increased through the resistor divider eﬀect.

1.1: Why should I use the HCPL-7800(A) for sensing cur-

rent when Hall-eﬀect sensors are available which don’t

need an isolated supply voltage?

[As an example, if R = 5.5 kΩ, then V = (Vin * 1%)

ﬁlt

Available in an auto-insertable, 8-pin DIP package, the

HCPL-7800(A) is smaller than and has better linearity,

oﬀset vs. temperature and Common Mode Rejection

(CMR) performance than most Hall-eﬀect sensors. Ad-

ditionally, often the required input-side power supply

can be derived from the same supply that powers the

gate-drive optocoupler.

= 2 mV for a maximum 200 mV input and V will

vary with respect to Vin.]

3. The input bandwidth is changed as a result of this

diﬀerent R-C ﬁlter conﬁguration. In fact this is one

of the main reasons for changing the input-ﬁlter R-C

time constant.

4. Filter capacitance: The input capacitance of the

HCPL-7800(A) is approximately 1.5 pF. For proper

operation the switching input-side sampling

2. SENSE RESISTOR AND INPUT FILTER

2.1: Where do I get 10 mΩ resistors? I have never seen one

that low.

capacitors must be charged from a relatively ﬁxed

(low impedance) voltage source. Therefore, if a ﬁlter

capacitor is used it is best for this capacitor to be a

Although less common than values above 10 Ω, there

are quite a few manufacturers of resistors suitable for

measuring currents up to 50 A when combined with

the HCPL-7800(A). Example product information may be

found at Dale’s web site (http://www.vishay.com/vishay/

dale) and Isotek’s web site (http://www.isotekcorp.com).

few orders of magnitude greater than the C

value of at least 100 pF works well.)

INPUT

2.4: How do I ensure that the HCPL-7800(A) is not de-

stroyed as a result of short circuit conditions which cause

voltage drops across the sense resistor that exceed the rat-

ings of the HCPL-7800(A)’s inputs?

2.2: Should I connect both inputs across the sense resistor

instead of grounding V directly to pin 4?

IN-

Select the sense resistor so that it will have less than 5 V

drop when short circuits occur. The only other require-

ment is to shut down the drive before the sense resistor

is damaged or its solder joints melt. This ensures that the

input of the HCPL-7800(A) can not be damaged by sense

resistors going open-circuit.

This is not necessary, but it will work. If you do, be sure

to use an RC ﬁlter on both pin 2 (V ) and pin 3 (V ) to

IN+

IN-

limit the input voltage at both pads.

2.3: Do I really need an RC ﬁlter on the input? What is it

for? Are other values of R and C okay?

The input anti-aliasing ﬁlter (R=39 Ω, C=0.01 µF) shown

in the typical application circuit is recommended for

ﬁltering fast switching voltage transients from the input

signal. (This helps to attenuate higher signal frequencies

which could otherwise alias with the input sampling rate

and cause higher input oﬀset voltage.)

3. ISOLATION AND INSULATION

3.1: How many volts will the HCPL-7800(A) withstand?

The momentary (1 minute) withstand voltage is 3750 V

rms per UL 1577 and CSA Component Acceptance Notice

#5.

Some issues to keep in mind using diﬀerent ﬁlter resistors

or capacitors are:

4. ACCURACY

1. Filter resistor: Input bias current for pins 2 and 3: This

is on the order of 500 nA. If you are using a single

ﬁlter resistor in series with pin 2 but not pin 3 the IxR

drop across this resistor will add to the oﬀset error of

the device. As long as this IR drop is small compared

to the input oﬀset voltage there should not be a

problem. If larger-valued resistors are used in series,

it is better to put half of the resistance in series with

pin 2 and half the resistance in series with pin 3. In

this case, the oﬀset voltage is due mainly to resistor

mismatch (typically less than 1% of the resistance

design value) multiplied by the input bias.

4.1: Can the signal to noise ratio be improved?

Yes. Some noise energy exists beyond the 100 kHz

bandwidth of the HCPL-7800(A). Additional filtering

using diﬀerent ﬁlter R,C values in the post-ampliﬁer

application circuit can be used to improve the signal

to noise ratio. For example, by using values of R3 = R4

= 10 kΩ, C5 = C6 = 470 pF in the application circuit

the rms output noise will be cut roughly by a factor of

2. In applications needing only a few kHz bandwidth

even better noise performance can be obtained. The

noise spectral density is roughly 500 nV/š Hz below

20 kHz (input referred).

ꢀꢆ

4.2: Does the gain change if the internal LED light output

degrades with time?

No. The LED is used only to transmit a digital pattern.

Avago Technologies has accounted for LED degradation

in the design of the product to ensure long life.

5. POWER SUPPLIES AND START-UP

5.1: What are the output voltages before the input side

power supply is turned on?

is close to 1.29 V and V is close to 3.80 V. This is

O+

O-

equivalent to the output response at the condition that

LED is completely oﬀ.

5.2: How long does the HCPL-7800(A) take to begin work-

ing properly after power-up?

Within 1 ms after V

and V

powered the device

DD1

DD2

starts to work. But it takes longer time for output to settle

down completely. In case of the oﬀset measurement

while both inputs are tied to ground there is initially V

adjustment (about 60 ms). The output completely settles

down in 100 ms after device powering up.

6. MISCELLANEOUS

6.1: How does the HCPL-7800(A) measure negative signals

with only a +5 V supply?

The inputs have a series resistor for protection against

large negative inputs. Normal signals are no more than

200 mV in amplitude. Such signals do not forward bias

any junctions sufficiently to interfere with accurate

operation of the switched capacitor input circuit.

For product information and a complete list of distributors, please go to our web site: www.avagotech.com

Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.

AV0ꢁ-0ꢃꢀ0EN - May ꢁꢅ, ꢁ00ꢇ

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HCPL-7800-000E产品参数

型号:	HCPL-7800-000E
是否Rohs认证：	符合
生命周期：	Transferred
IHS 制造商：	AGILENT TECHNOLOGIES INC
包装说明：	DIP, DIP8,.3
Reach Compliance Code：	unknown
风险等级：	5.83
放大器类型：	ISOLATION AMPLIFIER
JESD-30 代码：	R-PDIP-T8
湿度敏感等级：	1
功能数量：	1
端子数量：	8
最高工作温度：	100 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP
封装等效代码：	DIP8,.3
封装形状：	RECTANGULAR
封装形式：	IN-LINE
电源：	5 V
认证状态：	Not Qualified
子类别：	Isolation Amplifiers
最大压摆率：	16 mA
标称供电电压 (Vsup)：	5 V
表面贴装：	NO
温度等级：	INDUSTRIAL
端子形式：	THROUGH-HOLE
端子节距：	2.54 mm
端子位置：	DUAL

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