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产品型号HG74ALVC162835C的Datasheet PDF文件预览

18-BIT UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
HG74ALVC162835C  
Jan. 1999  
General Description  
Features  
The HG74ALVC162835C is an 18-bit universal bus  
driver designed for 2.3V to 3.6 V VCC Operation.  
l Ideal for Use in PC100 Registered DIMM  
l 0.5mm CMOS Technology  
l 2.3 ~ 3.6 VCC Operation  
l Output Port Has 26-WSeries Damping  
Resistor, No External Resistors are Required  
l Package Options Include Plastic Thin Shrink  
Small-Outline Packages, Shrink Small-Outline  
Packages , Thin Very Small Outline Packages  
(TSSOP 56 Pins, SSOP 56 Pins , TVSOP 56 Pins)  
The Output Enable(OE) controls data flow from A to Y.  
The device operates in transparent mode when the  
latch-enable(LE) input is high. When LE is low, the A  
data is latched if the clock input is held at a high or low  
logic level. If LE is low, the A data is stored in the  
latch/flip-flop on the low-to-high transition of CLK.  
When OE is high, the Outputs are in the high  
impedance state. OE should be tied to VCC through a  
pull up resistor to ensure the high impedance state  
during power up or power down.  
Pin Configuration  
The equivalent 26-W series resistors are included in  
the output to reduce overshoot and undershoot.  
(TOP VIEW)  
NC  
NC  
1
2
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
GND  
NC  
The HG74ALVC162835C is characterized for operation  
from -40°C to 85°C.  
Y1  
3
A1  
GND  
Y2  
4
GND  
A2  
5
Y3  
6
A3  
Vcc  
Y4  
7
Vcc  
A4  
8
Y5  
9
A5  
Function Table  
Y6  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
A6  
GND  
Y7  
GND  
A7  
INPUTS  
Y8  
A8  
OUTPUT  
Y9  
A9  
Y
LE  
CLK  
A
OE  
Y10  
Y11  
Y12  
GND  
Y13  
Y14  
Y15  
Vcc  
Y16  
Y17  
GND  
Y18  
A10  
A11  
A12  
GND  
A13  
A14  
A15  
Vcc  
A16  
A17  
GND  
A18  
CLK  
GND  
H
L
L
L
L
L
X
H
H
L
L
L
X
X
X
X
L
H
L
H
X
Z
L
H
L
H
YO  
=
L or H  
=Output level before the indicated steady-state input  
conditions were established, provided that CLK is high  
before LE goes low.  
26  
27  
28  
OE  
LE  
NC- No ineternal connection  
Copyright©1999, Hyundai Electronics Industries Co., Ltd.  
ELECTRONICS  
18-BIT UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
HG74ALVC162835C  
Jan. 1999  
Logic Diagram (positive logic)  
27  
30  
OE  
CLK  
28  
54  
LE  
A1  
3
1D  
Y1  
C1  
CLK  
TO 17 Other Channels  
Absolute Maximum Ratings Over Operating Free-air Temperature Range  
=
Symbols  
VCC  
VI  
Parameter  
Supply Voltage Range  
Input Voltage Range (see note 1)  
Output Voltage Range (see notes 1 and 2)  
Input Clamp Current  
Value  
-0.5 V to 4.6 V  
-0.5 V to VCC + 0.5 V  
-0.5 V to VCC + 0.5 V  
-50 mA  
Conditions  
VO  
IIK  
VI < 0  
IOK  
IO  
Output Clamp Current  
Continuous Output Current  
VO <0 or VO >VCC  
VO =0 to VCC  
±50 mA  
±50 mA  
ICC  
IGND  
Tstg  
Continuous Current through each VCC  
Continuous Current through each GND  
Storage Temperature Range  
+100 mA  
-100 mA  
- 65°C to 150°C  
=Stresses beyond those listed under “ absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “ recommended operating condition” is not  
implied. Exposure to absolute maximum-rated conditions for extended periods may affect device reliability.  
Note 1) The input and output voltage ratings may be exceeded if the input and output clamp current are observed.  
Note 2) This value is limited to 4.6 V maximum.  
Copyright©1999, Hyundai Electronics Industries Co., Ltd.  
ELECTRONICS  
18-BIT UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
HG74ALVC162835C  
Jan. 1999  
Recommended Operating Conditions (see Note 3)  
Value  
Symbols  
VCC  
Parameter  
Supply Voltage  
Units  
Conditions  
MIN  
2.3  
1.7  
2
MAX  
3.6  
V
V
V
V
V
VCC =2.3V to 2.7V  
VCC =2.7V to 3.6V  
VCC =2.3V to 2.7V  
VCC =2.7V to 3.6V  
VIH  
High -level input Voltage  
Low-level input Voltage  
0.7  
0.8  
VCC  
VCC  
-6  
-8  
-12  
6
VIL  
VI  
VO  
Input Voltage  
Output Voltage  
0
0
V
V
mA  
mA  
mA  
mA  
mA  
mA  
ns/V  
VCC =2.3V  
VCC =2.7V  
VCC =3V  
VCC =2.3V  
VCC =2.7V  
VCC =3V  
IOH  
High-level output current  
Low-level output current  
IOL  
8
12  
10  
Input transition rise or fall rate  
Operating free-air temperature  
0
Dt/Dv  
TA  
-40  
85  
°C  
Note 3) All unused inputs of the device must be held at Vcc or GND to ensure proper device operation.  
Electrical Characteristics Over Recommended Operating Free-air Temperature Range  
Value  
Parameter  
Test Conditions  
Units  
VCC  
Min  
Typ=  
Max  
VCC - 0.2  
2.3V to 3.6V  
2.3V  
2.3V  
3V  
2.7V  
IOH = -100mA  
IOH = - 4mA  
IOH = - 6mA  
VIH =1.7V  
VIH =1.7V  
VIH = 2V  
VIH = 2V  
VIH = 2V  
1.9  
1.7  
2.4  
2
VOH  
V
IOH = - 8mA  
IOH = -12 mA  
IOL = 100mA  
IOL = 4mA  
2
3V  
0.2  
0.4  
0.55  
0.55  
0.6  
2.3V to 3.6V  
2.3V  
2.3V  
3V  
2.7V  
VIL = 0.7V  
VIL = 0.7V  
VIL = 0.8V  
VIL = 0.8V  
VIL = 0.8V  
IOL = 6mA  
VOL  
V
IOL =8mA  
IOL =12mA  
0.8  
3V  
IL  
IOZ  
VI= VCC or GND  
VO = VCC or GND  
3.6V  
3.6V  
±5  
±10  
VI = VCC or GND  
IO = 0  
mA  
ICC  
40  
3.6V  
One input at VCC - 0.6V,  
Other inputs at VCC or GND  
750  
3V to 3.6V  
DICC  
Control Inputs  
3.5  
VI = VCC or GND  
CI  
3.3V  
3.3V  
r F  
r F  
Data Inputs  
Outputs  
5
7
Co  
VO= VCC or GND  
=
All typical Values are at VCC =3.3V, TA = 25°C.  
Copyright©1999, Hyundai Electronics Industries Co., Ltd.  
ELECTRONICS  
18-BIT UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
HG74ALVC162835C  
Jan. 1999  
Timing Requirements Over Recommended Operating Free-air Temperature Range(see figure1~10)  
VCC=2.5V±0.2V  
VCC=3.3V±0.3V  
Condition  
VCC=2.7V  
Unit  
Symbol Parameter  
Min  
Max  
150  
Min  
Max  
Min  
Max  
150  
Clock  
fclock  
150  
MHz  
frequency  
Pulse  
Duration  
LE high  
CLK high or low  
Data before CLK•  
3.3  
3.3  
0.9  
1.9  
1.3  
1.0  
3.3  
3.3  
0.9  
1.6  
1.1  
1.0  
3.3  
3.3  
0.7  
1.5  
1
ns  
ns  
ns  
ns  
ns  
ns  
tW  
tsu  
Setup time  
Hold time  
CLK high  
CLK low  
Data before LE¯  
1.1  
Data after CLK•  
th  
CLK high  
or low  
1.4  
1.7  
1.4  
ns  
Data after LE¯  
Switching Characteristics Over Recommended Operating Free-air Temperature Range  
VCC=2.7V  
VCC=2.5V± 0.2V  
VCC=3.3V±0.3V  
Input  
(From)  
Output  
(To)  
Parameter  
Unit  
Min  
150  
1
Max  
Min  
150  
Max  
Min  
150  
1
Max  
fmax  
MHz  
ns  
ns  
A
5
5
4.2  
5.1  
Y
1.3  
5.9  
5.8  
1.3  
tpd  
LE  
CLK  
1.4  
1.4  
6.3  
6.3  
6.1  
6.5  
1.4  
1.1  
5.4  
5.5  
ns  
ns  
ten  
Y
Y
OE  
OE  
tdis  
1
4.9  
4.9  
1.3  
4.5  
ns  
Switching Characteristics From 0°C to 65°C, CL=50r F  
Parameter  
Input  
(From)  
Output  
(To)  
VCC =3.3V± 0.15V  
Unit  
ns  
Min  
Max  
tpd  
CLK  
Y
1.9  
5
Copyright©1999, Hyundai Electronics Industries Co., Ltd.  
ELECTRONICS  
18-BIT UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
HG74ALVC162835C  
Jan. 1999  
Parameter Measurement (VCC=2.5V±0.2V)  
2 x Vcc  
Open  
500W  
From Output  
Under Test  
S1  
Test  
tpd  
S1  
Open  
2 x VCC  
GND  
tPLZ / tPZL  
CL= 30pF  
tPHZ /tPZH  
GND  
(
see Note)  
500W  
Figure 1. Load Circuit  
Note) CL includes probe and jig capacitance  
Voltage Waveforms  
VCC  
Timing  
VCC /2  
th  
0V  
Input  
tw  
tsu  
VCC  
0V  
VCC /2  
VCC /2  
Input  
VCC  
0V  
Data  
VCC /2  
VCC /2  
Input  
Figure 2. Set up and Hold Times  
Figure 3. Pulse Duration  
VCC  
0V  
VCC /2  
VCC /2  
Input  
tPHL  
tPLH  
VOH  
Output  
VCC /2  
VCC/2  
VOL  
Figure 4. Propagation Delay times  
Copyright©1999, Hyundai Electronics Industries Co., Ltd.  
ELECTRONICS  
18-BIT UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
HG74ALVC162835C  
Jan. 1999  
Output Control  
VCC  
0V  
VCC /2  
(Low-level enabling)  
VCC /2  
Output Waveform 1  
S1 at 2 x VCC  
tPZL  
tPLZ  
VCC  
VOL  
VCC /2  
VCC + 0.15V  
(See Note 1 )  
tPZH  
tPHZ  
VOH  
0V  
Output Waveform 2  
S1 at GND  
VCC - 0.15V  
VCC /2  
(See Note 1 )  
Figure 5. Enable and Disable Times  
Note 1) Waveform1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform2 is for an output with internal conditions such that the output is high except when disabled by the output control  
Note 2) All input pulses are supplied by generators having the following characteristics:  
PRR Í 10Mhz, Zo = 50W , tr Í 2ns, tf Í 2ns.  
Note 3) The output are measured one at a time with one transition per measurement.  
Note 4) tPLZ and tPHZ are the same as tdis  
Note 5) tPZL and tPZH are the same as ten  
.
.
Note 6) tPLH and tPHL are the same as tpd.  
Copyright©1999, Hyundai Electronics Industries Co., Ltd.  
ELECTRONICS  
18-BIT UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
HG74ALVC162835C  
Jan. 1999  
Parameter Measurement (Vcc=2.7V and 3.3V ± 0.3V)  
6V  
From Output  
Under Test  
500  
S 1  
Test  
S1  
Open  
6V  
Open  
GND  
tpd  
tPLZ / tPZL  
tPHZ /tPZH  
GND  
CL = 50pF  
(see note)  
500  
Figure 6. Load Circuit  
Note) CL includes probe and jig capacitance  
Voltage Waveforms  
2.7V  
Timing  
1.5V  
th  
0V  
Input  
tw  
tsu  
2.7V  
0V  
Input  
1.5V  
1.5V  
Data  
2.7V  
0V  
1.5V  
1.5V  
Input  
Figure 8. Pulse Duration  
Figure 7. Set up and Hold Times  
2.7V  
0V  
1.5V  
1.5V  
Input  
tPHL  
tPLH  
VOH  
1.5V  
1.5V  
Output  
VOL  
Figure 9. Propagation Delay times  
Copyright©1999, Hyundai Electronics Industries Co., Ltd.  
ELECTRONICS  
18-BIT UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
HG74ALVC162835C  
Jan. 1999  
Output Control  
(Low-level enabling)  
2.7V  
0V  
1.5V  
1.5V  
tPLZ  
tPZL  
Output Waveform 1  
S1 at 6V  
3V  
1.5V  
(See Note1)  
VOL + 0.3V  
VOL  
tPHZ  
tPZH  
VOH  
0V  
Output Waveform 2  
S1 at GND  
(See Note1)  
VOH - 0.3V  
1.5V  
Figure 10. Enable and Disable Times  
Note 1) Waveform1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
Note 2) All input pulses are supplied by generators having the following characteristics :  
PRR Í 10MHz, Zo = 50W, tr Í 2.5ns, tf Í 2.5ns.  
Note 3) The output are measured one at a time with one transition per measurement.  
Note 4) tPLZ and tPHZ are the same as tdis  
Note 5) tPZL and tPZH are the same as ten  
.
.
Note 6) tPLH and tPHL are the same as tpd.  
Copyright©1999, Hyundai Electronics Industries Co., Ltd.  
ELECTRONICS  
配单直通车
HGA-2010产品参数
型号:HGA-2010
生命周期:Contact Manufacturer
Reach Compliance Code:unknown
风险等级:5.84
Base Number Matches:1
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