HGTG5N120BND, HGTP5N120BND
Test Circuit and Waveforms
HGTG5N120BND
90%
OFF
10%
ON
V
GE
E
L = 2mH
E
V
CE
R
= 25Ω
G
90%
+
-
10%
t
d(OFF)I
I
CE
V
= 960V
DD
t
rI
t
fI
t
d(ON)I
FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT
FIGURE 21. SWITCHING TEST WAVEFORMS
Handling Precautions for IGBTs
Operating Frequency Information
Insulated Gate Bipolar Transistors are susceptible to gate-
insulation damage by the electrostatic discharge of energy
through the devices. When handling these devices, care
should be exercised to assure that the static charge built in the
handler’s body capacitance is not discharged through the
device. With proper handling and application procedures,
however, IGBTs are currently being extensively used in
production by numerous equipment manufacturers in military,
industrial and consumer applications, with virtually no damage
problems due to electrostatic discharge. IGBTs can be
handled safely if the following basic precautions are taken:
Operating frequency information for a typical device (Figure 3)
is presented as a guide for estimating device performance for
a specific application. Other typical frequency vs collector
current (I ) plots are possible using the information shown
CE
for a typical unit in Figures 5, 6, 7, 8, 9 and 11. The operating
frequency plot (Figure 3) of a typical device shows f
or
MAX1
; whichever is smaller at each point. The information is
f
MAX2
based on measurements of a typical device and is bounded
by the maximum rated junction temperature.
f
is defined by f
MAX1
= 0.05/(t ).
+ t
MAX1
d(OFF)I d(ON)I
Deadtime (the denominator) has been arbitrarily held to 10%
of the on-state time for a 50% duty factor. Other definitions are
1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such as
“ECCOSORBD™ LD26” or equivalent.
possible. t
and t are defined in Figure 19. Device
d(OFF)I
d(ON)I
turn-off delay can establish an additional frequency limiting
condition for an application other than T . t is
JM d(OFF)I
2. When devices are removed by hand from their carriers, the
hand being used should be grounded by any suitable
means - for example, with a metallic wristband.
important when controlling output ripple under a lightly loaded
condition.
3. Tips of soldering irons should be grounded.
f
is defined by f
MAX2
= (P - P )/(E
OFF
+ E ). The
ON
MAX2
D
C
allowable dissipation (P ) is defined by P = (T - T )/R
The sum of device switching and conduction losses must
.
4. Devices should never be inserted into or removed from
circuits with power on.
D
D
JM θJC
C
5. Gate Voltage Rating - Never exceed the gate-voltage
not exceed P . A 50% duty factor was used (Figure 3) and
D
rating of V
. Exceeding the rated V can result in
the conduction losses (P ) are approximated by
C
GEM
GE
permanent damage to the oxide layer in the gate region.
P
= (V
x I )/2.
C
CE
CE
6. Gate Termination - The gates of these devices are
essentially capacitors. Circuits that leave the gate open-
circuited or floating should be avoided. These conditions
can result in turn-on of the device due to voltage buildup on
the input capacitor due to leakage currents or pickup.
E
and E
OFF
are defined in the switching waveforms shown
is the integral of the instantaneous power
ON
in Figure 21. E
loss (I x V ) during turn-on and E
instantaneous power loss (I x V ) during turn-off. All tail
ON
is the integral of the
CE CE OFF
CE CE
losses are included in the calculation for E
OFF
; i.e., the
7. Gate Protection - These devices do not have an internal
monolithic Zener diode from gate to emitter. If gate
collector current equals zero (I = 0).
CE
protection is required an external Zener is recommended.
©2003 Fairchild Semiconductor Corporation
HGTG5N120BND, HGTP5N120BND, Rev. B1