HI-574A, HI-674A, HI-774
Temperature Coefficients
Power Supplies
The temperature coefficients for full-scale calibration, unipo- Supply voltages to the HI-X74(A) (+15V, -15V and +5V) must
lar offset, and bipolar offset specify the maximum change be “quiet” and well regulated. Voltage spikes on these lines can
o
from the initial (25 C) value to the value at T
or T
.
MAX
affect the converter’s accuracy, causing several LSBs to flicker
when a constant input is applied. Digital noise and spikes from
a switching power supply are especially troublesome. If switch-
ing supplies must be used, outputs should be carefully filtered
to assure “quiet” DC voltage at the converter terminals.
MIN
Power Supply Rejection
The standard specifications for the HI-X74A assume use of
+5.00V and ±15.00V or ±12.00V supplies. The only effect of
power supply error on the performance of the device will be
a small change in the full scale calibration. This will result in
a linear change in all lower order codes. The specifications
show the maximum change in calibration from the initial
value with the supplies at the various limits.
Further, a bypass capacitor pair on each supply voltage
terminal is necessary to counter the effect of variations in
supply current. Connect one pair from pin 1 to 15 (V
LOGIC
supply), one from pin 7 to 9 (V
to Analog Common) and
CC
to Analog Common). For each
one from pin 11 to 9 (V
EE
capacitor pair, a 10µF tantalum type in parallel with a 0.1µF
ceramic type is recommended.
Code Width
A fundamental quantity for A/D converter specifications is
the code width. This is defined as the range of analog input
values for which a given digital output code will occur. The
nominal value of a code width is equivalent to 1 least signifi-
cant bit (LSB) of the full scale range or 2.44mV out of 10V for
a 12-bit ADC.
Ground Connections
Pins 9 and 15 should be tied together at the package to
guarantee specified performance for the converter. In
addition, a wide PC trace should run directly from pin 9 to
(usually) +15V common, and from pin 15 to (usually) the +5V
Logic Common. If the converter is located some distance from
the system’s “single point” ground, make only these connec-
tions to pins 9 and 15: Tie them together at the package, and
back to the system ground with a single path. This path
should have low resistance. (Code dependent currents flow in
Quantization Uncertainty
Analog-to-digital converters exhibit an inherent quantization
1
uncertainty of ± / LSB. This uncertainty is a fundamental
2
characteristic of the quantization process and cannot be
reduced for a converter of given resolution.
the V , V
and V
terminals, but not through the
HI-X74(A)’s Analog Common or Digital Common).
CC EE
LOGIC
Left-justified Data
The data format used in the HI-X74(A) is left-justified. This Analog Signal Source
means that the data represents the analog input as a frac-
HI-574A and HI-674A
4095
tion of full-scale, ranging from 0 to
binary point to the left of the MSB.
. This implies a
4096
The device chosen to drive the HI-X74A analog input will see a
nominal load of 5kΩ (10V range) or 10kΩ (20V range).
However, the other end of these input resistors may change
±400mV with each bit decision, creating abrupt changes in cur-
rent at the analog input. Thus, the signal source must maintain
its output voltage while furnishing these step changes in load
current, which occur at 1.6µs and 950ns intervals for the
HI-574A and HI-674A, respectively. This requires low output
impedance and fast settling by the signal source.
Applying the HI-X74(A)
For each application of this converter, the ground
connections, power supply bypassing, analog signal source,
digital timing and signal routing on the circuit board must be
optimized to assure maximum performance. These areas
are reviewed in the following sections, along with basic oper-
ating modes and calibration requirements.
The output impedance of an op amp, for example, has an open
loop value which, in a closed loop, is divided by the loop gain
available at a frequency of interest. The amplifier should have
acceptable loop gain at 600KHz for use with the HI-X74A. To
check whether the output properties of a signal source are
suitable, monitor the HI-X74A’s input (pin 13 or 14) with an oscil-
loscope while a conversion is in progress. Each of the twelve
disturbances should subside in 1µs or less for the HI-574A and
500ns or less for the HI-674A. (The comparator decision is
made about 1.5µs and 850ns after each code change from the
SAR for the HI-574A and HI-674A, respectively.)
Physical Mounting and Layout Considerations
Layout
Unwanted, parasitic circuit components, (L, R, and C) can
make 12-bit accuracy impossible, even with a perfect A/D
converter. The best policy is to eliminate or minimize these
parasitics through proper circuit layout, rather than try to
quantify their effects.
The recommended construction is a double-sided printed
circuit board with a ground plane on the component side.
Other techniques, such as wire-wrapping or point-to-point
wiring on vector board, will have an unpredictable effect on
accuracy.
If the application calls for a Sample/Hold to precede the
converter, it should be noted that not all Sample/Holds are
compatible with the HI-574A in the manner described above.
These will require an additional wideband buffer amplifier to
lower their output impedance. A simpler solution is to use the
Intersil HA-5320 Sample/Hold, which was designed for use
with the HI-574A.
In general, sensitive analog signals should be routed between
ground traces and kept well away from digital lines. If analog
and digital lines must cross, they should do so at right angles.
6-962