HIP4080AIPZ应用文章市场行情现货热卖使用介绍供应商报价-中国IC网-芯三七

当前位置：IC37首页_>H字母起始型号索引_>H字母起始型号索引第346页更新时间：2024-10-25 16:28:03

产品型号HIP4080AIPZ的概述

芯片HIP4080AIPZ的概述 HIP4080AIPZ是一种用于功率驱动的高效集成电路，主要应用于电机控制和其它需要高功率输出的电子设备领域。该芯片采用了先进的逻辑设计，使其在高频、高效率和高功率应用中表现出色。HIP4080AIPZ具有优良的耐压和短路保护功能，提升了其在各种苛刻环境下的可靠性。作为集成电路的一部分，HIP4080AIPZ主要用于控制功率MOSFET或IGBT等开关元件，以实现高效的电源转换和电机驱动。芯片HIP4080AIPZ的详细参数 HIP4080AIPZ是一款具有多种功能的驱动器，其关键参数包括： - 输入电压范围：通常为10V至20V，使其适用于多种电源条件。 - 输出电流：支持最大输出电流为2A，保证驱动器能够有效控制负载。 - 开关频率：支持的开关频率高达200kHz，适应于高频操作的需求。 - 温度范围：工作温度可在-40°C至+125°C之间，增...

产品型号HIP4080AIPZ的Datasheet PDF文件预览

HIP4080A

Data Sheet

July 2004

FN3658.7

80V/2.5A Peak, High Frequency Full Bridge

FET Driver

Features

• Drives N-Channel FET Full Bridge Including High Side

Chop Capability

The HIP4080A is a high frequency, medium voltage Full

Bridge N-Channel FET driver IC, available in 20 lead plastic

SOIC and DIP packages. The HIP4080A includes an input

comparator, used to facilitate the “hysteresis” and PWM

modes of operation. Its HEN (high enable) lead can force

current to freewheel in the bottom two external power

MOSFETs, maintaining the upper power MOSFETs off.

Since it can switch at frequencies up to 1MHz, the HIP4080A

is well suited for driving Voice Coil Motors, switching power

amplifiers and power supplies.

• Bootstrap Supply Max Voltage to 95VDC

• Drives 1000pF Load at 1MHz in Free Air at +50°C with

Rise and Fall Times of Typically 10ns

• User-Programmable Dead Time

• Charge-Pump and Bootstrap Maintain Upper Bias

Supplies

• DIS (Disable) Pin Pulls Gates Low

• Input Logic Thresholds Compatible with 5V to 15V Logic

Levels

HIP4080A can also drive medium voltage brush motors, and

two HIP4080As can be used to drive high performance

stepper motors, since the short minimum “on-time” can

provide fine micro-stepping capability.

• Very Low Power Consumption

• Undervoltage Protection

Short propagation delays of approximately 55ns maximize

control loop crossover frequencies and dead-times which

can be adjusted to near zero to minimize distortion, resulting

in precise control of the driven load.

• Pb-Free Available as an Option

Applications

• Medium/Large Voice Coil Motors

• Full Bridge Power Supplies

• Switching Power Amplifiers

• High Performance Motor Controls

• Noise Cancellation Systems

• Battery Powered Vehicles

• Peripherals

The similar HIP4081A IC allows independent control of all 4

FETs in a Full Bridge configuration.

The Application Note for the HIP4080A is AN9404.

Ordering Information

PART

TEMPERATURE

PKG.

NUMBER

RANGE (°C)

PACKAGE

DWG. #

HIP4080AIPZ

(Note 1)

-40 to +85

20 Ld PDIP

(Pb-Free)

E20.3

• U.P.S.

HIP4080AIP

HIP4080AIB

-40 to +85

20 Ld PDIP

20 Ld SOIC

E20.3

M20.3

Pinout

HIP4080A

(PDIP, SOIC)

TOP VIEW

HIP4080AIBZ

(Note 1)

20 Ld SOIC

(Pb-Free)

NOTES:

BHO

BHS

BHB

HEN

DIS

1. Intersil Pb-Free products employ special Pb-free material sets;

molding compounds/die attach materials and 100% matte tin

plate termination finish, which is compatible with both SnPb and

Pb-free soldering operations. Intersil Pb-Free products are MSL

classified at Pb-free peak reflow temperatures that meet or

exceed the Pb-free requirements of IPC/JEDEC J Std-020B.

18 BLO

BLS

OUT

IN+

2. Add “T” suffix for Tape and Reel packing option. HIP4080AIP not

available in Tape and Reel.

IN-

ALS

ALO

HDEL

LDEL

AHB

AHS

AHO

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

HIP4080A

Application Block Diagram

80V

12V

BHO

BHS

BLO

LOAD

HEN

DIS

HIP4080A

IN+

IN-

ALO

AHS

AHO

GND

Functional Block Diagram ^{(1/2 HIP4080A)}

AHB

HIGH VOLTAGE BUS ≤ 80VDC

DRIVER

UNDER-

AHO

AHS

CHARGE

PUMP

LEVEL SHIFT

AND LATCH

VOLTAGE

HEN

TURN-ON

DELAY

TO V

(PIN 16)

+12VDC

DIS

OUT

IN+

DRIVER

ALO

ALS

TURN-ON

DELAY

BIAS

SUPPLY

HDEL

LDEL

HIP4080A

Typical Application (Hysteresis Mode Switching)

80V

BHB

HEN

DIS

BHO

BHS

BLO

BLS

12V

DIS

LOAD

OUT

IN+

12V

IN-

ALS 14

ALO 13

HDEL

LDEL

AHB

AHS

AHO

GND

HIP4080A

Absolute Maximum Ratings

Thermal Information

Thermal Resistance (Typical, Note 3)

Supply Voltage, V

and V . . . . . . . . . . . . . . . . . . . . -0.3V to 16V

(°C/W)

Logic I/O Voltages . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V

+0.3V

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Maximum Power Dissipation at +85°C

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .470mW

PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .530mW

Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C

Operating Max. Junction Temperature. . . . . . . . . . . . . . . . . . +125°C

Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300°C

(For SOIC - Lead Tips Only)

Voltage on AHS, BHS . . . -6.0V (Transient) to 80V (25°C to 125°C)

Voltage on AHS, BHS . . . -6.0V (Transient) to 70V (-55°C to 125°C)

Voltage on ALS, BLS . . . . . . . -2.0V (Transient) to +2.0V (Transient)

Voltage on AHB, BHB . . . . . . V

-0.3V to V +V

AHS, BHS

AHS, BHS DD

Voltage on ALO, BLO. . . . . . . . . . . . .V

-0.3V to V

+0.3V

ALS, BLS

Voltage on AHO, BHO . . . . . . V

-0.3V to V

AHB, BHB

AHS, BHS

Input Current, HDEL and LDEL . . . . . . . . . . . . . . . . . . -5mA to 0mA

Phase Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V/ns

All Voltages relative to V , unless otherwise specified.

Operating Conditions

Supply Voltage, V

and V . . . . . . . . . . . . . . . . . . +9.5V to +15V

Voltage on ALS, BLS . . . . . . . . . . . . . . . . . . . . . . . . . -1.0V to +1.0V

Voltage on AHB, BHB . . . . . . . .V

+5V to V

+15V

AHS, BHS

Input Current, HDEL and LDEL . . . . . . . . . . . . . . . .-500µA to -50µA

Operating Ambient Temperature Range . . . . . . . . . .-40°C to +85°C

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

3. θ is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

Electrical Specifications

= V

AHB

= V

= 12V, V = V

SS ALS

= V

AHS

= V

= 0V, R

HDEL

= R = 100K, and

LDEL

BHB

BLS

BHS

= +25°C, Unless Otherwise Specified

T = - 40°C

= +25°C

TO +125°C

PARAMETERS

SYMBOL

TEST CONDITIONS

MIN

TYP MAX

MIN

MAX UNITS

SUPPLY CURRENTS AND CHARGE PUMPS

Quiescent Current

Operating Current

Quiescent Current

IN- = 2.5V, Other Inputs = 0V

µA

Outputs switching f = 500kHz, No Load

IN- = 2.5V, Other Inputs = 0V,

DDO

100

= I

= 0

BLO

ALO

Operating Current

f = 500kHz, No Load

1.25

-25

2.0

-11

0.8

-60

CCO

, I

AHB, BHB Quiescent Current -

Qpump Output Current

IN- = 2.5V, Other Inputs = 0V,

-50

-10

µA

AHB BHB

= I

= 0,

CC AHB

AHO BHO

= V =V

= V = 10V

BHB

AHB, BHB Operating Current

f = 500kHz, No Load

0.62

1.2

1.5

1.0

0.5

1.9

µA

AHBO

BHBO

AHS, BHS, AHB, BHB Leakage Current

AHB

= V

= 80V,

= 93V

0.02

12.6

HLK

BHS

AHS

BHB

AHB-AHS, BHB-BHS Qpump

Output Voltage

= I

= 0, No Load

AHB

11.5

14.0

10.5

14.5

AHB

AHS

BHB

BHS

INPUT COMPARATOR PINS: IN+, IN-, OUT

Offset Voltage

Over Common Mode Voltage Range

-10

0.5

+10

-15

+15

µA

Input Bias Current

Input Offset Current

-1

-2

Input Common Mode Voltage Range

CMVR

-1.5

HIP4080A

Electrical Specifications

= V

AHB

= V

= 12V, V = V

= V

AHS

= V

= 0V, R

HDEL

= R = 100K, and

LDEL

BHB

ALS

BLS

BHS

= +25°C, Unless Otherwise Specified (Continued)

T = - 40°C

= +25°C

TO +125°C

PARAMETERS

Voltage Gain

SYMBOL

TEST CONDITIONS

MIN

TYP MAX

MIN

MAX UNITS

AVOL

V/mV

OUT High Level Output Voltage

IN+ > IN-, I

= -250µA

-0.4

- 0.5

OUT Low Level Output Voltage

Low Level Output Current

High Level Output Current

INPUT PINS: DIS

IN+ < IN-, I = +250µA

0.4

-3

0.5

= 6V

6.5

-17

-10

OUT

-20

-2.5

Low Level Input Voltage

High Level Input Voltage

Input Voltage Hysteresis

Low Level Input Current

High Level Input Current

INPUT PINS: HEN

Full Operating Conditions

2.5

1.0

2.7

0.8

-100

µA

= 0V, Full Operating Conditions

= 5V, Full Operating Conditions

-130

-1

-75

-135

-10

-65

+10

Low Level Input Voltage

High Level Input Voltage

Input Voltage Hysteresis

Low Level Input Current

High Level Input Current

Full Operating Conditions

2.5

1.0

2.7

0.8

-200

µA

= 0V, Full Operating Conditions

= 5V, Full Operating Conditions

-260

-1

-150

-270

-10

-130

+10

TURN-ON DELAY PINS: LDEL AND HDEL

LDEL, HDEL Voltage

= I = -100µA

LDEL

4.9

5.1

5.3

4.8

5.4

HDEL,

HDEL

GATE DRIVER OUTPUT PINS: ALO, BLO, AHO, AND BHO

Low Level Output Voltage

High Level Output Voltage

Peak Pullup Current

= 100mA

= -100mA

0.7

0.8

1.7

8.1

7.6

0.25

0.85

0.95

2.6

1.0

1.1

3.8

3.3

9.4

8.9

0.65

0.5

1.4

1.3

8.0

7.5

0.2

1.1

1.2

4.1

3.6

9.5

9.0

0.7

- V

OUT

I +

= 0V

OUT

Peak Pulldown Current

I -

= 12V

2.4

Under Voltage, Rising Threshold

Under Voltage, Falling Threshold

Under Voltage, Hysteresis

UV+

UV-

8.8

8.3

HYS

0.4

HIP4080A

Switching Specifications

= V

AHB

= V

BHB

= 12V, V = V

= V

AHS

= V

= 0V, R

HDEL

= R

= 10K,

LDEL

ALS

BLS

BHS

= 1000pF, and T = +25°C, Unless Otherwise Specified

T = - 40°C

= +25°C

TO +125°C

PARAMETERS

Lower Turn-off Propagation Delay (IN+/IN- to ALO/BLO)

Upper Turn-off Propagation Delay (IN+/IN- to AHO/BHO)

Lower Turn-on Propagation Delay (IN+/IN- to ALO/BLO)

Upper Turn-on Propagation Delay (IN+/IN- to AHO/BHO)

Rise Time

SYMBOL

TEST CONDITIONS

MIN TYP MAX MIN MAX UNITS

110

140

LPHL

HPHL

LPLH

HPLH

Fall Time

Turn-on Input Pulse Width

PWIN-ON

Turn-off Input Pulse Width

PWIN-OFF

Disable Turn-off Propagation Delay

(DIS - Lower Outputs)

DISLOW

Disable Turn-off Propagation Delay

(DIS - Upper Outputs)

105

DISHIGH

Disable to Lower Turn-on Propagation Delay

(DIS - ALO and BLO)

DLPLH

Refresh Pulse Width (ALO and BLO)

240 380 500 200 600

REF-PW

Disable to Upper Enable (DIS - AHO and BHO)

HEN-AHO, BHO Turn-off, Propagation Delay

HEN-AHO, BHO Turn-on, Propagation Delay

480 630

750

UEN

= R

= 10K

HEN-PHL

HEN-PLH

HDEL

LDEL

110

HDEL

TRUTH TABLE

INPUT

OUTPUT

IN+ > IN-

HEN

U/V

DIS

ALO

AHO

BLO

BHO

HIP4080A

Pin Descriptions

NUMBER

SYMBOL

DESCRIPTION

BHB

B High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap

diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30µA out of this pin to

maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V.

HEN

DIS

High-side Enable input. Logic level input that when low overrides IN+/IN- (Pins 6 and 7) to put AHO and BHO drivers

(Pins 11 and 20) in low output state. When HEN is high AHO and BHO are controlled by IN+/IN- inputs. The pin can

be driven by signal levels of 0V to 15V (no greater than V ).

DISable input. Logic level input that when taken high sets all four outputs low. DIS high overrides all other inputs.

When DIS is taken low the outputs are controlled by the other inputs. The pin can be driven by signal levels of 0V to

15V (no greater than V ).

Chip negative supply, generally will be ground.

OUT

IN+

OUTput of the input control comparator. This output can be used for feedback and hysteresis.

Noninverting input of control comparator. If IN+ is greater than IN- (Pin 7) then ALO and BHO are low level outputs

and BLO and AHO are high level outputs. If IN+ is less than IN- then ALO and BHO are high level outputs and BLO

and AHO are low level outputs. DIS (Pin 3) high level will override IN+/IN- control for all outputs. HEN (Pin 2) low level

will override IN+/IN- control of AHO and BHO. When switching in four quadrant mode, dead time in a half bridge leg

is controlled by HDEL and LDEL (Pins 8 and 9).

IN-

Inverting input of control comparator. See IN+ (Pin 6) description.

HDEL

High-side turn-on DELay. Connect resistor from this pin to V to set timing current that defines the turn-on delay of

both high-side drivers. The low-side drivers turn-off with no adjustable delay, so the HDEL resistor guarantees no

shoot-through by delaying the turn-on of the high-side drivers. HDEL reference voltage is approximately 5.1V.

LDEL

AHB

Low-side turn-on DELay. Connect resistor from this pin to V to set timing current that defines the turn-on delay of

both low-side drivers. The high-side drivers turn-off with no adjustable delay, so the LDEL resistor guarantees no

shoot-through by delaying the turn-on of the low-side drivers. LDEL reference voltage is approximately 5.1V.

A High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap

diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30µA out of this pin to

maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V.

AHO

AHS

A High-side Output. Connect to gate of A High-side power MOSFET.

A High-side Source connection. Connect to source of A High-side power MOSFET. Connect negative side of

bootstrap capacitor to this pin.

ALO

ALS

A Low-side Output. Connect to gate of A Low-side power MOSFET.

A Low-side Source connection. Connect to source of A Low-side power MOSFET.

Positive supply to gate drivers. Must be same potential as V

(Pin 16). Connect to anodes of two bootstrap diodes.

Positive supply to lower gate drivers. Must be same potential as V

(Pin 15). De-couple this pin to V (Pin 4).

BLS

BLO

BHS

B Low-side Source connection. Connect to source of B Low-side power MOSFET.

B Low-side Output. Connect to gate of B Low-side power MOSFET.

B High-side Source connection. Connect to source of B High-side power MOSFET. Connect negative side of

bootstrap capacitor to this pin.

BHO

B High-side Output. Connect to gate of B High-side power MOSFET.

HIP4080A

Timing Diagrams

HPHL

LPLH

U/V = DIS

HEN

IN+ > IN-

ALO

AHO

BLO

BHO

HPLH

LPHL

(10% - 90%) (90% - 10%)

FIGURE 1. BISTATE MODE

HEN-PHL

HEN-PLH

U/V = DIS

HEN

IN+ > IN-

ALO

AHO

BLO

BHO

FIGURE 2. HIGH SIDE CHOP MODE

DLPLH

DIS

REF-PW

U/V or DIS

HEN

IN+ > IN-

ALO

AHO

BLO

BHO

UEN

FIGURE 3. DISABLE FUNCTION

HIP4080A

Typical Performance Curves V = V = V

= V

= 12V, V = V

SS ALS

= V

AHS

= V

= 0V, R

= R =

LDEL

AHB

BHB

BLS

BHS

HDEL

100K, and T = +25°C, Unless Otherwise Specified

12.5

12.0

11.5

11.0

10.5

14.0

12.0

10.0

8.0

6.0

4.0

2.0

200

400

600

800

1000

SUPPLY VOLTAGE (V)

SWITCHING FREQUENCY (kHz)

FIGURE 4. QUIESCENT I

SUPPLY CURRENT vs V

FIGURE 5. I

NO-LOAD I

SUPPLY CURRENT vs

SUPPLY VOLTAGE

DDO

FREQUENCY (kHz)

5.0

4.0

3.0

2.0

1.0

0.0

+125°C

20.0

15.0

10.0

5.0

+75°C

+25°C

0°C

-40°C

0.0

100 200 300 400 500 600 700 800 900 1000

SWITCHING FREQUENCY (kHz)

100 200 300 400 500 600 700 800 900 1000

SWITCHING FREQUENCY (kHz)

FIGURE 6. SIDE A, B FLOATING SUPPLY BIAS CURRENT vs

FREQUENCY (LOAD = 1000pF)

FIGURE 7. I

, NO-LOAD I

SUPPLY CURRENT vs

CCO

FREQUENCY (kHz) TEMPERATURE

2.5

1.0

1.5

0.5

-40

-20

100

120

200

400

600

800

1000

SWITCHING FREQUENCY (kHz)

JUNCTION TEMPERATURE (°C)

FIGURE 8. I

, I

NO-LOAD FLOATING SUPPLY BIAS

FIGURE 9. COMPARATOR INPUT CURRENT I vs

AHB BHB

CURRENT vs FREQUENCY

TEMPERATURE AT V

= 5V

HIP4080A

Typical Performance Curves V = V = V

= V

= 12V, V = V

SS ALS

= V

AHS

= V

= 0V, R

HDEL

= R

AHB

BHB

BLS

BHS

LDEL

100K, and T = +25°C, Unless Otherwise Specified (Continued)

-90

-100

-110

-120

-180

-190

-200

-210

-220

-230

-50

-25

100

125

-40

-20

100

120

JUNCTION TEMPERATURE (°C)

FIGURE 10. DIS LOW LEVEL INPUT CURRENT I vs

FIGURE 11. HEN LOW LEVEL INPUT CURRENT I vs

TEMPERATURE

15.0

14.0

13.0

12.0

11.0

10.0

-40

-20

100

120

-40

-20

100

120

JUNCTION TEMPERATURE (°C)

FIGURE 12. AHB - AHS, BHB - BHS NO-LOAD CHARGE PUMP

VOLTAGE vs TEMPERATURE

FIGURE 13. UPPER DISABLE TURN-OFF PROPAGATION

DELAY T vs TEMPERATURE

DISHIGH

525

500

475

450

425

-50

-25

100

125 150

-40

-20

100

120

JUNCTION TEMPERATURE (°C)

FIGURE 14. DISABLE TO UPPER ENABLE T

FIGURE 15. LOWER DISABLE TURN-OFF PROPAGATION

DELAY T vs TEMPERATURE

UEN

PROPAGATION DELAY vs TEMPERATURE

DISLOW

HIP4080A

Typical Performance Curves V = V = V

= V

= 12V, V = V

SS ALS

= V

AHS

= V

= 0V, R

HDEL

= R

AHB

BHB

BLS

BHS

LDEL

10K, and T = +25°C, Unless Otherwise Specified

450

425

400

375

350

-50

-25

100

125 150

-40

-20

100

120

JUNCTION TEMPERATURE (°C)

FIGURE 16. T

REFRESH PULSE WIDTH vs

FIGURE 17. DISABLE TO LOWER ENABLE TDLPLH

PROPAGATION DELAY vs TEMPERATURE

REF-PW

TEMPERATURE

90.0

80.0

70.0

60.0

50.0

40.0

90.0

80.0

70.0

60.0

50.0

40.0

-40

-20

100 120

-40

-20

100

120

JUNCTION TEMPERATURE (°C)

FIGURE 18. UPPER TURN-OFF PROPAGATION DELAY T

vs TEMPERATURE

FIGURE 19. UPPER TURN-ON PROPAGATION DELAY THPLH

vs TEMPERATURE

HPHL

90.0

80.0

70.0

60.0

50.0

40.0

90.0

80.0

70.0

60.0

50.0

40.0

-40

-20

100

120

-40

-20

100

120

JUNCTION TEMPERATURE (°C)

FIGURE 20. LOWER TURN-OFF PROPAGATION DELAY T

vs TEMPERATURE

FIGURE 21. LOWER TURN-ON PROPAGATION DELAY T

vs TEMPERATURE

LPHL

LPLH

HIP4080A

Typical Performance Curves V = V = V

= V

= 12V, V = V

SS ALS

= V

AHS

= V

= 0V, R

HDEL

= R

AHB

BHB

BLS

BHS

LDEL

100K, and T = +25°C, Unless Otherwise Specified

13.5

12.5

11.5

10.5

9.5

13.5

12.5

11.5

10.5

9.5

8.5

-40

-20

100

120

-20

100

120

JUNCTION TEMPERATURE (°C)

FIGURE 22. GATE DRIVE FALL TIME T vs TEMPERATURE

FIGURE 23. GATE DRIVE RISE TIME T vs TEMPERATURE

1500

1250

1000

6.0

5.5

5.0

4.5

4.0

750

-40°C

0°C

+25°C

+75°C

+125°C

500

250

-40

-20

100

120

JUNCTION TEMPERATURE (°C)

BIAS SUPPLY VOLTAGE (V)

FIGURE 24. V

, V

VOLTAGE vs TEMPERATURE

FIGURE 25. HIGH LEVEL OUTPUT VOLTAGE, V

- V

LDEL HDEL

BIAS SUPPLY AND TEMPERATURE AT 100µA

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

1500

1250

1000

750

-40°C

500

250

0°C

+25°C

+75°C

+125°C

, V

(V)

BIAS SUPPLY VOLTAGE (V)

, V , V

CC DD AHG BHB

FIGURE 26. LOW LEVEL OUTPUT VOLTAGE V vs BIAS

FIGURE 27. PEAK PULLDOWN CURRENT I BIAS SUPPLY

O-

SUPPLY AND TEMPERATURE AT 100µA

VOLTAGE

HIP4080A

Typical Performance Curves V = V = V

= V

= 12V, V = V

SS ALS

= V

AHS

= V = 0V, R

BHS HDEL

= R =

LDEL

AHB

BHB

BLS

100K, and T = +25°C, Unless Otherwise Specified (Continued)

500

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

200

10,000

3,000

1,000

100

0.5

0.2

0.1

, V

(V)

50 100 200

500 1000

, V , V

SWITCHING FREQUENCY (kHz)

CC DD ABH BHB

FIGURE 28. PEAK PULLUP CURRENT I vs SUPPLY

O+

FIGURE 29. LOW VOLTAGE BIAS CURRENT I

AND I

(LESS QUIESCENT COMPONENT) vs

FREQUENCY AND GATE LOAD CAPACITANCE

VOLTAGE

1000

500

UV+

8.8

8.6

200

100

UV-

8.4

8.2

100

125

150

100

200

500

1000

SWITCHING FREQUENCY (kHz)

TEMPERATURE (°C)

FIGURE 30. HIGH VOLTAGE LEVEL-SHIFT CURRENT vs

FREQUENCY AND BUS VOLTAGE

FIGURE 31. UNDERVOLTAGE LOCKOUT vs TEMPERATURE

150

120

100

150

200

250

HDEL/LDEL RESISTANCE (kΩ)

FIGURE 32. MINIMUM DEAD-TIME vs DEL RESISTANCE

IN2 IN1

POWER SECTION

+12V

B+

CONTROL LOGIC

SECTION

R21

R22

DRIVER SECTION

HIP4080A/81A

R29

CR2

JMPR1

OUT/BLI

BHB

HEN/BHI BHS

DIS

BHO

CD4069UB

BLO

BLS

JMPR2

JMPR3

IN+/ALI

+12V

OUT/BLI

IN+/ALI

IN-/AHI

HDEL ALO

LDEL AHS

R23

R24

CD4069UB

ALS

HEN/BHI

AHB

AHO

CR1

CD4069UB

R34

R33

JMPR4

IN-/AHI

R30

R31

CD4069UB

COM

ALS

BLS

NOTES:

1. DEVICE CD4069UB PIN 7 = COM. PIN 14 = +12V.

2. COMPONENTS L1, L2, C1, C2, CX, CY, R30, R31, ARE NOT

SUPPLIED. REFER TO APPLICATION NOTE FOR HELP IN

DETERMINING JMPR1 - JMPR4 JUMPER LOCATIONS.

FIGURE 33. HIP4080A EVALUATION PC BOARD SCHEMATIC

GND

+12V

B+

COM

CR2

BHO

R22

R24

DIS

JMPR1

BLO

BLS

IN1

JMPR2

JMPR3

JMPR4

ALS

ALO

R23

R21

IN2

AHO

LDEL

ALS

BLS

CR1

R33

R34

FIGURE 33. HIP4080A EVALUATION BOARD SILKSCREEN

HIP4080A

Dual-In-Line Plas tic Packages (PDIP)

E20.3 (JEDEC MS-001-AD ISSUE D)

20 LEAD DUAL-IN-LINE PLASTIC PACKAGE

INDEX

AREA

INCHES

MILLIMETERS

1 2

N/2

SYMBOL

MIN

MAX

0.210

MIN

MAX

5.33

NOTES

-B-

-C-

-A-

0.015

0.115

0.014

0.045

0.008

0.980

0.005

0.300

0.240

0.39

2.93

0.356

1.55

0.204

24.89

0.13

7.62

6.10

BASE

PLANE

0.195

0.022

0.070

0.014

1.060

4.95

0.558

1.77

0.355

26.9

SEATING

PLANE

e_A

e_C

e_B

0.010 (0.25) M

B S

0.325

0.280

8.25

7.11

NOTES:

0.100 BSC

0.300 BSC

2.54 BSC

7.62 BSC

1. Controlling Dimensions: INCH. In case of conflict between English

and Metric dimensions, the inch dimensions control.

0.430

0.150

10.92

3.81

2. Dimensioning and tolerancing per ANSI Y14.5M-1982.

0.115

2.93

3. Symbols are defined in the “MO Series Symbol List” in Section 2.2

of Publication No. 95.

4. Dimensions A, A1 and L are measured with the package seated in

Rev. 0 12/93

JEDEC seating plane gauge GS-3.

5. D, D1, and E1 dimensions do not include mold flash or protrusions.

Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).

6. E and

dicular to datum

7. e and e are measured at the lead tips with the leads uncon-

are measured with the leads constrained to be perpen-

-C-

strained. e must be zero or greater.

8. B1 maximum dimensions do not include dambar protrusions. Dam-

bar protrusions shall not exceed 0.010 inch (0.25mm).

9. N is the maximum number of terminal positions.

10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,

E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).

HIP4080A

Small Outline Plas tic Packages (SOIC)

M20.3 (JEDEC MS-013-AC ISSUE C)

20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE

INCHES MILLIMETERS

INDEX

0.25(0.010)

AREA

SYMBOL

MIN

MAX

MIN

2.35

0.10

0.35

0.23

MAX

2.65

NOTES

0.0926

0.0040

0.014

0.1043

0.0118

0.019

-B-

0.30

0.49

0.0091

0.4961

0.2914

0.0125

0.32

SEATING PLANE

0.5118 12.60

13.00

7.60

-A-

0.2992

7.40

h x 45

0.050 BSC

1.27 BSC

-C-

0.394

0.010

0.016

0.419

0.029

0.050

10.00

0.25

0.40

10.65

0.75

1.27

0.10(0.004)

0.25(0.010)

Rev. 1 1/02

NOTES:

1. Symbols are defined in the “MO Series Symbol List” in Section

2.2 of Publication Number 95.

2. Dimensioning and tolerancing per ANSI Y14.5M-1982.

3. Dimension “D” does not include mold flash, protrusions or gate

burrs. Mold flash, protrusion and gate burrs shall not exceed

0.15mm (0.006 inch) per side.

4. Dimension “E” does not include interlead flash or protrusions. In-

terlead flash and protrusions shall not exceed 0.25mm (0.010

inch) per side.

5. The chamfer on the body is optional. If it is not present, a visual

index feature must be located within the crosshatched area.

6. “L” is the length of terminal for soldering to a substrate.

7. “N” is the number of terminal positions.

8. Terminal numbers are shown for reference only.

9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater

above the seating plane, shall not exceed a maximum value of

0.61mm (0.024 inch)

10. Controlling dimension: MILLIMETER. Converted inch dimen-

sions are not necessarily exact.

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

HIP4080AIPZ相关文章

配单直通车

北京元坤伟业科技有限公司服务专线: 010-62104931621064316210489162104791 在线联系:

QQ：857273081 复制

QQ：1594462451 复制

柒号芯城电子商务（深圳）有限公司服务专线: 0755-83209937 在线联系:

QQ：2881677436 复制

QQ：2881620402 复制

深圳市中利达电子科技有限公司服务专线: 0755-83200645/13686833545 在线联系:

QQ：1902134819 复制

QQ：2881689472 复制

首天国际（深圳）科技有限公司服务专线: 0755-82807802/82807803 在线联系:

QQ：528164397 复制

QQ：1318502189 复制

深圳市芯福林电子有限公司服务专线: 13418564337 在线联系:

QQ：2881495808 复制

QQ：308365177 复制

HIP4080AIPZ产品参数

型号:	HIP4080AIPZ
Brand Name：	Intersil
生命周期：	Unknown
IHS 制造商：	INTERSIL CORP
零件包装代码：	PDIP, SOIC
包装说明：	DIP,
针数：	20, 20
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
Factory Lead Time：	1 week
风险等级：	8.1
Samacsys Confidence：	3
Samacsys Status：	Released
Samacsys PartID：	237941
Samacsys Pin Count：	20
Samacsys Part Category：	Integrated Circuit
Samacsys Package Category：	Dual-In-Line Packages
Samacsys Footprint Name：	Dual-In-Line Plastic Packages (PDIP)
Samacsys Released Date：	2017-01-11 16:59:44
Is Samacsys：	N
高边驱动器：	YES
接口集成电路类型：	FULL BRIDGE BASED MOSFET DRIVER
JESD-30 代码：	R-PDIP-T20
JESD-609代码：	e3
长度：	25.895 mm
功能数量：	1
端子数量：	20
最高工作温度：	85 °C
最低工作温度：	-40 °C
标称输出峰值电流：	1.4 A
封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP
封装形状：	RECTANGULAR
封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT APPLICABLE
认证状态：	Not Qualified
座面最大高度：	5.33 mm
最大供电电压：	15 V
最小供电电压：	9.5 V
标称供电电压：	12 V
表面贴装：	NO
温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn) - annealed
端子形式：	THROUGH-HOLE
端子节距：	2.54 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT APPLICABLE
断开时间：	0.11 µs
接通时间：	0.14 µs
宽度：	7.62 mm
Base Number Matches：	1

电子百科

产品导航

产品型号HIP4080AIPZ的概述

产品型号HIP4080AIPZ的Datasheet PDF文件预览

HIP4080AIPZ相关产品

HIP4080AIPZ相关文章

IC37:专业IC行业平台