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Agilent HMPP-389x Series

MiniPak Surface Mount

RF PIN Switch Diodes

Data Sheet

Features

• Surface mount MiniPak package

– low height, 0.7 mm (0.028") max.

– small footprint, 1.75 mm²

(0.0028 inch²)

• Better thermal conductivity for

higher power dissipation

• Single and dual versions

Low junction capacitance of the

PIN diode chip, combined with

ultra low package parasitics, mean

that these products may be used

at frequencies which are higher

than the upper limit for conven-

tional PIN diodes.

Description/Applications

These ultra-miniature products

represent the blending of Agilent

Technologies’ proven semiconduc-

tor and the latest in leadless

packaging technology.

• Matched diodes for consistent

performance

• Low capacitance

• Low resistance at low current

• Low FIT (Failure in Time) rate*

• Six-sigma quality level

The HMPP-389x series is optimized

for switching applications where

low resistance at low current and

low capacitance are required. The

MiniPak package offers reduced

parasitics when compared to

conventional leaded diodes, and

lower thermal resistance.

Note that Agilent’s manufacturing

techniques assure that dice

packaged in pairs are taken from

adjacent sites on the wafer,

assuring the highest degree of

match.

*

For more information, see the Surface

Mount Schottky Reliability Data Sheet.

Pin Connections and

Package Marking

The HMPP-389T low inductance

wide band shunt switch is well

suited for applications up to 6 GHz.

3

4

1

AA

2

Package Lead Code Identification

(Top View)

Product code Date code

Notes:

1. Package marking provides orientation and

identification.

2. See “Electrical Specifications” for

appropriate package marking.

Single

Anti-parallel

Parallel

Shunt Switch

Cathode

Anode

3

2

4

1

3

2

4

1

3

2

4

1

3

4

1

2

Anode

Cathode

#0

#2

#5

T

HMPP-389x Series Absolute Maximum Ratings^[1], T_C= 25°C

ESD WARNING:

Handling Precautions Should Be

Taken To Avoid Static Discharge.

Symbol

Parameter

Units

Value

I_f

Forward Current (1 µs pulse)

Peak Inverse Voltage

Junction Temperature

Storage Temperature

Thermal Resistance^[2]

Amp

V

1

P_IV

T_j

100

°C

150

T_stg

θ_jc

°C

-65 to +150

150

°C/W

Notes:

1. Operation in excess of any one of these conditions may result in permanent damage to the

device.

2. T_C= +25°C, where T_Cis defined to be the temperature at the package pins where contact is

made to the circuit board.

Electrical Specifications, T_C= +25°C, each diode

Part Number

HMPP-

Package

Marking Code

Minimum Breakdown

Voltage (V)

Maximum Series

Resistance (Ω)

Maximum Total

Capacitance (pF)

Lead Code

Configuration

3890

3892

3895

389T

D

C

B

T

0

2

5

T

Single

Anti-parallel

Parallel

100

2.5

0.30

Shunt Switch

Test Conditions

V_R= V_BR

I_F= 5 mA

V_R= 5V

Measure I_R≤ 10 µA

f = 100 MHz

f = 1 MHz

Typical Parameters, T_C= +25°C

Part Number

HMPP-

Series Resistance

R_S(Ω)

Carrier Lifetime

τ (ns)

Total Capacitance

C_T(pF)

389x

3.8

200

0.20 @ 5V

Test Conditions

I_F= 1 mA

f = 100 MHz

I_F= 10 mA

I_R= 6 mA

2

HMPP-389x Series Typical Performance, T_c= 25°C, each diode

0.50

120

115

110

105

100

95

Diode Mounted as a

Series Attenuator in a

50 Ohm Microstrip and

Tested at 123 MHz

0.45

10

0.40

Intercept point

will be higher

at higher

0.35

0.30

0.25

frequencies

1

1 MHz

90

0.20

0.15

1 GHz

4

85

0

8

12

16

20

1

10

30

0.1

1

10

100

I – FORWARD BIAS CURRENT (mA)

I

– FORWARD BIAS CURRENT (mA)

V

– REVERSE VOLTAGE (V)

F

R

Figure 1. Total RF Resistance at 25°C vs.

Forward Bias Current.

Figure 2. Capacitance vs. Reverse Voltage.

Figure 3. 2nd Harmonic Input Intercept Point

vs. Forward Bias Current.

200

160

100

10

1

V

= –2V

R

120

80

V

= –5V

R

0.1

40

0

V

= –10V

R

25°C –50°C

125°C

0.4

– FORWARD VOLTAGE (V)

0.01

10

15

20

25

30

0

0.2

0.6

0.8

1.0

1.2

FORWARD CURRENT (mA)

V

F

Figure 4. Typical Reverse Recovery Time vs.

Reverse Voltage.

Figure 5. Forward Current vs. Forward Voltage.

Typical Applications

RF COMMON

3

4

2

1

3

4

1

3

2

4

1

RF 1

RF 2

RF 1

RF 2

2

BIAS 1

BIAS 2

BIAS

Figure 6. Simple SPDT Switch Using Only Positive Bias.

Figure 7. High Isolation SPDT Switch Using Dual Bias.

3

RF COMMON

Diode Construction

At Agilent Technologies, two basic

methods of diode fabrication are

used. In the case of bulk diodes, a

wafer of very pure (intrinsic)

silicon is heavily doped on the top

and bottom faces to form P and N

regions. The result is a diode with

a very thick, very pure I region.

The epitaxial layer (or EPI) diode

starts as a wafer of heavily doped

silicon (the P or N layer), onto

which a thin I layer is grown.

After the epitaxial growth, diffu-

sion is used to add a heavily doped

(N or P) layer on the top of the epi,

creating a diode with a very thin I

layer populated by a relatively

large number of imperfections.

1

2

4

3

2

4

1

3

2

4

1

RF 2

RF 1

BIAS

Figure 8. Very High Isolation SPDT Switch, Dual Bias.

Applications Information

matched input impedance (low

VSWR) to the source. Every

microwave network which uses

PIN diodes (phase shifter, modula-

tor, etc.) is a variation on one of

these two basic circuits.

PIN Diodes

In RF and microwave networks,

mechanical switches and attenua-

tors are bulky, often unreliable,

and difficult to manufacture.

Switch ICs, while convenient to

use and low in cost in small

quantities, suffer from poor

distortion performance and are

not as cost effective as PIN diode

switches and attenuators in very

large quantities. For over 30 years,

designers have looked to the PIN

diode for high performance/low

cost solutions to their switching

and level control needs.

These two different methods of

design result in two classes of

diode with distinctly different

characteristics, as shown in

Table 1.

One can see that the switch and

the attenuator are quite different

in their function, and will there-

fore often require different

characteristics in their PIN diodes.

These properties are easily

controlled through the way in

which a PIN diode is fabricated.

See Figure 9.

As we shall see in the following

paragraphs, the bulk diode is

almost always used for attenuator

applications and sometimes as a

switch, while the epi diode (such

as the HMPP-3890) is generally

used as a switching element.

Bulk

N+ Diffusion

I-Layer

Metal Contact

In the RF and microwave ranges,

the switch serves the simple

Diode Lifetime and Its Implications

The resistance of a PIN diode is

controlled by the conductivity (or

resistivity) of the I layer. This

conductivity is controlled by the

density of the cloud of carriers

(charges) in the I layer (which is, in

turn, controlled by the DC bias).

Minority carrier lifetime, indicated

by the Greek symbol τ, is a

purpose which is implied by its

name; it operates between one of

two modes, ON or OFF. In the ON

state, the switch is designed to

have the least possible loss. In the

OFF state, the switch must exhibit

a very high loss (isolation) to the

input signal, typically from 20 to

60 dB. The attenuator, however,

serves a more complex function.

It provides for the “soft” or

Bulk Attenuator Diode

Epi Switching Diode

P+ Diffusion

N+ Substrate

Epi

I-Layer

Contact Over

P+ Diffusion

Figure 9. PIN Diode Construction.

Table 1. Bulk and EPI Diode Characteristics.

controlled variation in the power

level of a RF or microwave signal.

At the same time as it attenuates

the input signal to some predeter-

mined value, it must also present a

Characteristic

EPI Diode

Bulk Diode

Lifetime

Short

High

Long

Low

Distortion

Current Required

I Region Thickness

Low

High

Thick

Very Thin

4

measure of the time it takes for the Thus, for a given current and

Linear Equivalent Circuit

charge stored in the I layer to

decay, when forward bias is

replaced with reverse bias, to some resistance than the bulk diode.

junction capacitance, the epi

diode will always have a lower

In order to predict the perfor-

mance of the HMPP-3890 as a

switch, it is necessary to construct

a model which can then be used in

one of the several linear analysis

programs presently on the market.

predetermined value. This lifetime

can be short (35 to 200 nsec. for

epitaxial diodes) or it can be

relatively long (400 to 3000 nsec.

for bulk diodes). Lifetime has a

strong influence over a number of

PIN diode parameters, among

which are distortion and basic

diode behavior.

The thin epi diode, with its

physically small I region, can

easily be saturated (taken to the

point of minimum resistance) with Such a model is given in Figure 11,

very little current compared to the where R_S+ R_jis given in Figure 1

much larger bulk diode. While an

epi diode is well saturated at

currents around 10 mA, the bulk

diode may require upwards of

100 mA or more. Moreover, epi

diodes can achieve reasonable

values of resistance at currents of

and C_jis provided in Figure 2.

Careful examination of Figure 11

will reveal the fact that the

package parasitics (inductance

and capacitance) are much lower

for the MiniPak than they are for

leaded plastic packages such as

the SOT-23, SOT-323 or others.

This will permit the HMPP-389x

family to be used at higher fre-

quencies than its conventional

leaded counterparts.

To study the effect of lifetime on

diode behavior, we first define a

cutoff frequency f_C= 1/τ. For short 1 mA or less, making them ideal

lifetime diodes, this cutoff fre-

quency can be as high as 30 MHz

while for our longer lifetime

diodes f_C400 KHz. At frequen-

cies which are ten times f_C(or

more), a PIN diode does indeed

act like a current controlled

variable resistor. At frequencies

for battery operated applications.

Having compared the two basic

types of PIN diode, we will now

focus on the HMPP-3890 epi

diode.

20 fF

3

4

Given a thin epitaxial I region, the

diode designer can trade off the

30 fF

2

1.1 nH

1

which are one tenth (or less) of f_C, device’s total resistance (R_S+ R_j)

a PIN diode acts like an ordinary

PN junction diode. Finally, at

and junction capacitance (C_j) by

varying the diameter of the

20 fF

Single diode package (HMPP-3890)

0.1f_C≤ f ≤ 10f_C, the behavior of the contact and I region. The

20 fF

diode is very complex. Suffice it to HMPP-3890 was designed with the

0.05 nH

0.5 nH

0.05 nH

mention that in this frequency

range, the diode can exhibit very

strong capacitive or inductive

reactance—it will not behave at

930 MHz cellular and RFID, the

1.8 GHz PCS and 2.45 GHz RFID

markets in mind. Combining the

low resistance shown in Figure 10

3

2

4

1

12 fF

30 fF

0.05 nH

0.5 nH

0.05 nH

all like a resistor. However, at zero with a typical total capacitance of

20 fF

bias or under heavy forward bias,

all PIN diodes demonstrate very

high or very low impedance

(respectively) no matter what

their lifetime is.

0.27 pF, it forms the basis for high

performance, low cost switching

networks.

Anti-parallel diode package (HMPP-3892)

20 fF

0.05 nH

0.5 nH

0.05 nH

3

2

4

1

1000

12 fF

30 fF

0.05 nH

HSMP-3880 Bulk PIN Diode

0.5 nH

0.05 nH

Diode Resistance vs. Forward Bias

If we look at the typical curves for

resistance vs. forward current for

bulk and epi diodes (see Figure

10), we see that they are very

different. Of course, these curves

apply only at frequencies > 10 f_C.

One can see that the curve of

100

10

20 fF

Parallel diode package (HMPP-3895)

Figure 11. Linear Equivalent Circuit of the

MiniPak PIN Diode.

HMPP-389x

Epi PIN Diode

1

resistance vs. bias current for the

bulk diode is much higher than

that for the epi (switching) diode.

0.01

0.1

1

10

100

BIAS CURRENT (mA)

Figure 10. Resistance vs, Forward Bias.

5

Testing the HMPP-389T on the

Demo-board

Demo-board Preparation

Test Results

Since the performance of the

shunt switch is ultimately limited

by the demo-board, a short

discussion of the constructional

aspects will be beneficial. Edge-

mounted SMA connectors

(Johnson #142-0701-881) were

mounted on both the reference

and test lines. A special mounting

technique has been used to

minimize reflection at the pcb to

connector interface. Prior to

mounting, the connector pins

were cut down to two pin diam-

eters in length. Subsequently, the

connector fingers were soldered

to the upper ground plane (Figure

13). Solder was filled between the

connector body and fingers on the

lower ground plane until the small

crescent of exposed teflon was

completely covered (Figure 14).

Measurements of the reference

line’s return and insertion losses

were used to gauge the effective-

ness of the VSWR mitigating steps.

In our prototype, the worst case

return loss of the reference line

was 20 dB at 5 GHz (Figure 15).

Introduction

The HMPP-389T PIN diode is a

high frequency shunt switch. It

has been designed as a smaller

and higher performance version of

the HSMP-389T (SC-70 package).

-18

-22

-26

-30

-34

-38

The DEMO-HMPP-389T demo-

board allows customers to evalu-

ate the performance of the

HMPP-389T without having to

fabricate their own PCB. Since a

shunt switch’s isolation is limited

primarily by its parasitic induc-

tance, the product’s true potential

cannot be shown if a conventional

microstrip pcb is used. In order to

overcome this problem, a coplanar

waveguide over ground-plane

structure is used for the demo-

board. The bottom ground-plane is

connected to the upper ground

traces using multiple via-holes.

1

2

3

4

5

6

FREQUENCY (GHz)

Figure 15. Swept return loss of reference line.

Insertion loss of the reference was

very low and generally, increased

with frequency (Figure 16). If the

demo-board has been constructed

carefully, there should not be any

evidence of resonance. The

reference line’s insertion loss

trace can be stored in the VNA’s

display memory and used to

correct for the insertion loss of

the test line in the subsequent

measurements.

A 50Ω reference line is provided at

the top to calibrate the board loss.

The bottom line allows the

HMPP-389T diode to be tested as

a shunt switch.

reference line

Figure 13. Soldering details of connector

fingers to upper ground plane.

Agilent

SK063A

test line

HMPP-389T

Figure 14. Soldering details of connector

fingers to lower ground plane.

Figure 12. Demo-board DEMO-HMPP-389T.

6

0

-0.2

-0.4

-0.6

-0.8

-1.0

Normalization was used to remove The PIN diode’s resistance is a

the pcb’s and connectors’ losses

from the measurement of the

shunt switch’s loss. The active

trace was divided by the memo-

rized trace (Data/Memory) to

produce the normalized data. At

zero bias, the insertion loss was

under 0.6 dB up to 6 GHz (Figure

18). Applying a reverse bias to the

PIN diode has the effect of

function of the bias current. So, at

higher forward current, the

isolation improved. The combina-

tion of the HMPP-389T and the

SK063A demoboard exhibited

more than 17 dB of isolation from

1 to 6 GHz at If ≥ 1mA (Figure 20).

-10

0.15 mA

1

2

3

4

5

6

0.25 mA

-14

reducing its parasitic capacitance.

With a reverse bias of -20V, the

insertion loss improved to better

than 0.5 dB (Figure 19).

FREQUENCY (GHz)

0.5 mA

-18

-22

-26

-30

1 mA

Figure 16. Insertion loss of reference line.

1.5 mA

To evaluate the HMPP-389T as

0

-0.2

-0.4

-0.6

-0.8

-1.0

shunt switch, it was mounted on

the test line and then the appropri-

ate biasing voltage was applied. In

our prototype, the worst case

return loss was 10 dB at 5 GHz

(Figure 17). The return loss varied

very little when the bias was

20 mA

1

2

3

4

5

6

FREQUENCY (GHz)

Figure 20. Isolation at different frequencies

with forward current as a parameter.

changed from zero to -20V.

The combination of the

-5

-15

-25

-35

-45

-55

HMPP-389T and the demo-board

allows a high performance shunt

switch to be constructed swiftly

and economically. The extremely

low parasitic inductance of the

package allows the switch to

operate over a very wide fre-

quency range.

1

2

3

4

5

6

FREQUENCY (GHz)

Figure 18. Insertion loss of HMPP-389T at 0V.

0

-0.2

-0.4

-0.6

-0.8

-1.0

1

2

3

4

5

6

FREQUENCY (GHz)

Figure 17. Return loss of HMPP-389T mounted

on test line at 0V and -20V bias.

1

2

3

4

5

6

FREQUENCY (GHz)

Figure 19. Insertion loss of HMPP-389T at -20V.

7

SMT Assembly

passes through one or more

Assembly Information

Reliable assembly of surface

mount components is a complex

process that involves many

material, process, and equipment

factors, including: method of

heating (e.g., IR or vapor phase

reflow, wave soldering, etc.)

circuit board material, conductor

thickness and pattern, type of

solder alloy, and the thermal

conductivity and thermal mass of

components. Components with a

low mass, such as the MiniPak

package, will reach solder reflow

temperatures faster than those

with a greater mass.

preheat zones. The preheat zones

increase the temperature of the

board and components to prevent

thermal shock and begin evaporat-

ing solvents from the solder paste.

The reflow zone briefly elevates

the temperature sufficiently to

produce a reflow of the solder.

The MiniPak diode is mounted to

the PCB or microstrip board using

the pad pattern shown in

Figure 21.

0.4

0.5

0.4

0.3

0.5

0.3

The rates of change of tempera-

ture for the ramp-up and cool-

down zones are chosen to be low

enough to not cause deformation

of the board or damage to compo-

nents due to thermal shock. The

maximum temperature in the

reflow zone (T_MAX) should not

exceed 255°C.

Figure 21. PCB Pad Layout, MiniPak

(dimensions in mm).

Agilent’s diodes have been quali-

fied to the time-temperature

profile shown in Figure 23. This

profile is representative of an IR

reflow type of surface mount

assembly process.

This mounting pad pattern is

satisfactory for most applications.

However, there are applications

where a high degree of isolation is

required between one diode and

the other is required. For such

applications, the mounting pad

pattern of Figure 22 is

These parameters are typical for a

surface mount assembly process

for Agilent diodes. As a general

guideline, the circuit board and

components should be exposed

only to the minimum temperatures

and times necessary to achieve a

uniform reflow of solder.

After ramping up from room

temperature, the circuit board

with components attached to it

(held in place with solder paste)

recommended.

0.40 mm via hole

(4 places)

350

300

0.20

Peak Temperature

Min. 240°C

2.40

0.8

Max. 255°C

250

221

200

Reflow Time

Min. 60 s

Max. 90 s

0.40

150

2.60

Preheat 130–170°C

100

Min. 60 s

Figure 22. PCB Pad Layout, High Isolation

MiniPak (dimensions in mm).

Max. 150 s

50

0

This pattern uses four via holes,

connecting the crossed ground

strip pattern to the ground plane

of the board.

0

30

60

90

120

150

180 210

240

270

300

330 360

TIME (seconds)

Figure 23. Surface Mount Assembly Temperature Profile.

8

MiniPak Outline Drawing for HMPP-3890, -3892, and -3895

1.44 (0.058)

1.40 (0.056)

1.12 (0.045)

1.08 (0.043)

0.82 (0.033)

0.78 (0.031)

1.20 (0.048)

1.16 (0.046)

0.32 (0.013)

0.28 (0.011)

0.00

Top view

-0.07 (-0.003)

-0.03 (-0.001)

0.92 (0.037)

0.88 (0.035)

0.00

-0.07 (-0.003) 0.42 (0.017)

1.32 (0.053)

1.28 (0.051)

-0.03 (-0.001) 0.38 (0.015)

0.70 (0.028)

0.58 (0.023)

Bottom view

Side view

MiniPak Outline Drawing for HMPP-389T

1.12 (0.045)

1.08 (0.043)

0.82 (0.033)

0.78 (0.031)

0.32 (0.013)

0.28 (0.011)

0.00

-0.07 (-0.003)

-0.03 (-0.001)

0.92 (0.037)

0.88 (0.035)

0.00

-0.07 (-0.003) 0.42 (0.017)

-0.03 (-0.001) 0.38 (0.015)

1.32 (0.053)

1.28 (0.051)

Bottom view

Dimensions are in millimeteres (inches)

Ordering Information

Part Number

No. of Devices

Container

HMPP-389x-TR2

HMPP-389x-TR1

HMPP-389x-BLK

10000

3000

100

13” Reel

7”Reel

antistatic bag

9

Device Orientation

REEL

TOP VIEW

4 mm

END VIEW

CARRIER

TAPE

8 mm

USER

FEED

DIRECTION

COVER TAPE

Note: “AA” represents package marking code. Package marking is

right side up with carrier tape perforations at top. Conforms to

Electronic Industries RS-481, “Taping of Surface Mounted

Components for Automated Placement.” Standard quantity is 3,000

devices per reel.

Tape Dimensions and Product Orientation

For Outline 4T (MiniPak 1412)

P

D

2

P

0

E

F

W

C

D

1

t

(CARRIER TAPE THICKNESS)

T (COVER TAPE THICKNESS)

t

1

K

5° MAX.

0

A

B

0

DESCRIPTION

SYMBOL

SIZE (mm)

SIZE (INCHES)

CAVITY

LENGTH

WIDTH

DEPTH

PITCH

A

B

K

P

D

1.40 ± 0.05

1.63 ± 0.05

0.80 ± 0.05

4.00 ± 0.10

0.80 ± 0.05

0.055 ± 0.002

0.064 ± 0.002

0.031 ± 0.002

0.157 ± 0.004

0.031 ± 0.002

0

BOTTOM HOLE DIAMETER

1

0

PERFORATION

DIAMETER

PITCH

POSITION

D

P

E

1.50 ± 0.10

4.00 ± 0.10

1.75 ± 0.10

0.060 ± 0.004

0.157 ± 0.004

0.069 ± 0.004

CARRIER TAPE WIDTH

THICKNESS

W

8.00 + 0.30 - 0.10 0.315 + 0.012 - 0.004

t

0.254 ± 0.02

0.010 ± 0.001

1

COVER TAPE

WIDTH

C

5.40 ± 0.10

0.213 ± 0.004

TAPE THICKNESS

T

0.062 ± 0.001

0.002 ± 0.00004

t

DISTANCE

CAVITY TO PERFORATION

(WIDTH DIRECTION)

F

3.50 ± 0.05

0.138 ± 0.002

CAVITY TO PERFORATION

(LENGTH DIRECTION)

P

2

2.00 ± 0.05

0.079 ± 0.002

10

www.agilent.com/semiconductors

For product information and a complete list of

distributors, please go to our web site.

For technical assistance call:

Americas/Canada: +1 (800) 235-0312 or

(408) 654-8675

Europe: +49 (0) 6441 92460

China: 10800 650 0017

Hong Kong: (+65) 271 2451

India, Australia, New Zealand: (+65) 271 2394

Japan: (+81 3) 3335-8152(Domestic/International), or

0120-61-1280(Domestic Only)

Korea: (+65) 271 2194

Malaysia, Singapore: (+65) 271 2054

Taiwan: (+65) 271 2654

Data subject to change.

Obsoletes 5988-4071EN

February 20, 2002

5988-5733EN

型号:	HMPP-3895-TR2
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Obsolete
IHS 制造商：	AVAGO TECHNOLOGIES INC
包装说明：	R-CBCC-N4
针数：	4
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8541.10.00.60
风险等级：	5.18
Is Samacsys：	N
应用：	SWITCHING
最小击穿电压：	100 V
配置：	SEPARATE, 2 ELEMENTS
最大二极管电容：	0.3 pF
标称二极管电容：	0.2 pF
二极管元件材料：	SILICON
最大二极管正向电阻：	2.5 Ω
二极管电阻测试电流：	1 mA
二极管电阻测试频率：	100 MHz
二极管类型：	PIN DIODE
频带：	ULTRA HIGH FREQUENCY
JESD-30 代码：	R-CBCC-N4
JESD-609代码：	e3
少数载流子标称寿命：	0.2 µs
湿度敏感等级：	1
元件数量：	2
端子数量：	4
最高工作温度：	150 °C
封装主体材料：	CERAMIC, METAL-SEALED COFIRED
封装形状：	RECTANGULAR
封装形式：	CHIP CARRIER
峰值回流温度（摄氏度）：	260
认证状态：	Not Qualified
反向测试电压：	5 V
子类别：	PIN Diodes
表面贴装：	YES
技术：	POSITIVE-INTRINSIC-NEGATIVE
端子面层：	Tin (Sn)
端子形式：	NO LEAD
端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	20
Base Number Matches：	1

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