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产品型号HN27C4096AHG-85的Datasheet PDF文件预览

HN27C4096AHG/AHCC Series  
262,144-word × 16-bit CMOS UV Erasable and Programmable  
ROM  
ADE-203-247A(Z)  
Rev. 1.0  
Apr. 4, 1997  
Description  
HN27C4096AHG/AHCC is a 4-Mbit ultraviolet erasable and electrically programmable ROM, featuring high  
speed access time and programming. Fabricated on advanced fine process and high speed circuitry technique,  
the HN27C4096AHG/AHCC makes high speed access time possible. Therefore, it is suitable for 16-bit  
microcomputer systems using high speed microcomputer such as the 80286/68020.  
The  
HN27C4096AHG/AHCC offers high speed programming using page programming mode. This device has  
the package variation of cerdip 40-pin and JLCC 44-pin.  
Features  
High speed  
Access time: 85 ns (max)  
Low power dissipation  
Active mode: 35 mW/MHz (typ)  
Fast high reliability page programming and fast high-reliability programming  
Programming voltage: +12.5 V D.C.  
Programming time: 3.5 sec. (min) (Theoretical in page programming)  
Inputs and outputs TTL compatible during both read and program modes.  
Pin arrangement: 40-pin JEDEC standard, 44-pin JLCC JEDEC standard  
Device indentifier mode: Manufacturer code and device code  
Fully compatible with the HN27C4096HG/HCC Series.  
Ordering Information  
Type No.  
Access time  
85 ns  
Package  
HN27C4096AHG-85  
HN27C4906AHCC-85  
600-mil 40-pin Cerdip (DG-40A)  
44-pin J-bend leaded chip carrier (CC-44)  
85 ns  
HN27C4096AHG/AHCC Series  
Pin Arrangement  
HN27C4096AHG Series  
HN27C4096AHCC Series  
VPP  
CE  
1
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
VCC  
A17  
A16  
A15  
A14  
A13  
A12  
A11  
A10  
A9  
2
I/O15  
I/O14  
I/O13  
I/O12  
I/O11  
I/O10  
I/O9  
I/O8  
VSS  
3
6
5
4
3
2
1 44 43 42 41 40  
4
5
7
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
A13  
A12  
A11  
A10  
A9  
I/O12  
I/O11  
I/O10  
I/O9  
I/O8  
VSS  
6
8
7
9
8
10  
11  
12  
13  
14  
15  
16  
17  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
VSS  
NC  
A8  
VSS  
A8  
NC  
I/O7  
I/O6  
I/O5  
I/O4  
I/O3  
I/O2  
I/O1  
I/O0  
OE  
I/O7  
I/O6  
I/O5  
I/O4  
A7  
A6  
A7  
A5  
A6  
A4  
A5  
A3  
18 19 20 21 22 23 24 25 26 27 28  
A2  
A1  
A0  
(Top View)  
(Top View)  
Pin Description  
Pin name  
A0 – A17  
I/O0 – I/O15  
CE  
Function  
Address  
Input/output  
Chip enable  
Output enable  
Power supply  
OE  
VCC  
VPP  
Programming power supply  
Ground  
VSS  
NC  
No connection  
2
HN27C4096AHG/AHCC Series  
Block Diagram  
A7  
2048 × 2048  
X-Decoder  
Memory Matrix  
A17  
I/O0  
Input  
Data  
Y-Gating  
Y-Decoder  
Control  
I/O15  
CE  
OE  
H
A0  
A6  
VCC  
VPP  
VSS  
H
H
: High Threshold Inverter  
3
HN27C4096AHG/AHCC Series  
Mode Selection  
Pin  
CE  
(3)  
(2)  
VIL  
VIL  
VIH  
VIH  
VIL  
VIL  
VIH  
VIH  
VIL  
VIH  
VIL  
VIH  
VIL  
OE  
(22)  
(20)  
VIL  
A9  
(35)  
(31)  
×
VPP  
(2)  
(1)  
VCC  
I/O  
CC-44  
DG-40A  
(44)  
(40)  
(4 – 11, 14 – 21)  
(3 – 10, 12 – 19)  
Dout  
Mode  
Read  
VSS – VCC VCC  
VSS – VCC VCC  
VSS – VCC VCC  
Output disable  
Standby  
Page prog.  
VIH  
×
High-Z  
High-Z  
High-Z  
Din  
X
×
Page program set  
VH*2  
VH*2  
VIH  
VIL  
×
VPP  
VPP  
VPP  
VPP  
VCC  
VPP  
VPP  
VPP  
VPP  
VCC  
VCC  
VCC  
VCC  
VCC  
VCC  
VCC  
VCC  
VCC  
Page data latch  
Page program  
Page program verify  
Page program reset  
Program  
×
×
High-Z  
Dout  
×
VIH  
VIH  
VIL  
×
High-Z  
Din  
Word prog.  
Identifier  
×
Program verify  
Optional verify  
Program inhibit  
×
Dout  
VIL  
×
Dout  
VIH  
VIL  
×
VH*2  
High-Z  
Code  
VSS – VCC VCC  
Notes: 1. ×: Don’t care.  
2. VH: 12.0 V ± 0.5 V  
Absolute Maximum Ratings  
Parameter  
Symbol  
Vin, Vout  
VID  
Value  
Unit  
All input and output voltages*1  
Voltage on pin A9 and OE  
VPP voltage*1  
–0.6*2 to +7.0  
–0.6*2 to +13.0  
–0.6 to +13.5  
–0.6 to +7.0  
0 to +70  
V
V
VPP  
V
VCC voltage*1  
VCC  
V
Operating temperature range  
Storage temperature range*3  
Storage temperature under bias  
Notes: 1. Relative to VSS.  
Topr  
°C  
°C  
°C  
Tstg  
–65 to +125  
–20 to +80  
Tbias  
2. Vin, Vout, VID min = –2.0 V for pulse width 20 ns  
3. Storage temperature range of device before programming.  
4
HN27C4096AHG/AHCC Series  
Capacitance (Ta = 25°C, f = 1 MHz)  
Parameter  
Symbol  
Cin  
Min  
Typ  
Max  
12  
Unit  
pF  
Test conditions  
Vin = 0 V  
Input capacitance  
Output capacitance  
Cout  
20  
pF  
Vout = 0 V  
Read Operation  
DC Characteristics (VCC = 5 V ± 10%, VPP = VSS to VCC, Ta = 0 to +70°C)  
Parameter  
Symbol Min  
Typ  
1
Max  
2
Unit  
µA  
µA  
µA  
mA  
mA  
mA  
V
Test conditions  
Input leakage current  
Output leakage current  
VPP current  
ILI  
Vin = 5.5 V  
ILO  
2
Vout = 5.5 V/0.45 V  
VPP = 5.5 V  
IPP1  
ISB  
20  
Standby VCC current  
Operating VCC current  
30  
CE = VIH  
ICC1  
ICC2  
VIL  
30  
Iout = 0 mA, f = 1 MHz  
Iout = 0 mA, f = 11.8 MHz  
140  
0.8  
VCC + 1*2  
0.45  
Input voltage  
–0.3*1  
2.2  
VIH  
VOL  
VOH  
V
Output voltage  
V
IOL = 2.1 mA  
2.4  
V
IOH = –400 µA  
Notes: 1. VIL min = –1.0 V for pulse width 50 ns  
VIL min = –2.0 V for pulse width 20 ns  
2. VIH max = VCC +1.5 V for pulse width 20 ns  
If VIH is over the specified maximum value, read operation cannot be guaranteed.  
5
HN27C4096AHG/AHCC Series  
AC Characteristics (VCC = 5 V ± 10%, VPP = VSS to VCC, Ta = 0 to +70°C)  
Test Conditions  
Input pulse levels: 0.45 to 2.4 V  
Input rise and fall time: 10 ns  
Output load: 1 TTL gate +100 pF  
Reference levels for measuring timing: 1.5 V  
HN27C4096AHG/AHCC-85  
Parameter  
Symbol  
tACC  
tCE  
Min  
0
Max  
85  
Unit  
ns  
Test conditions  
CE = OE = VIL  
OE = VIL  
Address to output delay  
CE to output delay  
OE to output delay  
OE high to output float*1  
Address to output hold  
85  
ns  
tOE  
45  
ns  
CE = VIL  
tDF  
30  
ns  
CE = VIL  
tOH  
5
ns  
CE = OE = VIL  
Note: 1. tDF is defined as the time at which the output achieves the open circuit condition and data is no  
longer driven.  
Read Timing Waveform  
Address  
CE  
Standby Mode  
Standby Mode  
Active Mode  
tCE  
OE  
tDF  
tOH  
tOE  
tACC  
Data Out Valid  
Data Out  
6
HN27C4096AHG/AHCC Series  
Fast High-Reliability Page Programming  
This device can be applied the high performance page programming algorithm shown in the following  
flowchart. This algorithm allows to obtain faster programming time without any voltage stress to the device  
nor deterioration in reliability of programmed data.  
Page Program Set  
Apply 12 V to OE pin after applying 12.5 V to VPP to set a page program mode.  
The device operates in a page program mode until reset.  
Page Program Reset  
Set VPP to VCC level or less to reset a page program mode.  
7
HN27C4096AHG/AHCC Series  
START  
SET PAGE PROG LATCH MODE  
= 12.5 ± 0.3 V V = 6.25 ± 0.25 V  
V
PP  
CC  
OE  
= 12.0 ± 0.5 V  
Address = 0  
n = 0  
Latch  
Address + 1 Address  
Latch  
Address + 1 Address  
Latch  
Address + 1 Address  
Latch  
n + 1  
n
SET PAGE PROG./VERIFY MODE  
V
= 12.5 ± 0.3 V V = 6.25 ± 0.25 V  
CC  
PP  
µ
Program t  
= 50 s ± 5%  
Address + 1 Address  
PW  
NOGO  
VERIFY  
GO  
LAST  
address?  
NO  
NO  
n = 10?  
YES  
YES  
SET READ MODE  
= 5.0 ± 0.5 V V = V  
CC  
V
CC  
PP  
READ  
NOGO  
all address  
GO  
FAIL  
END  
8
HN27C4096AHG/AHCC Series  
DC Characteristics (VCC = 6.25 V ± 0.25 V, VPP = 12.5 V ± 0.3 V, Ta = 25°C ± 5°C)  
Parameter  
Symbol Min  
Typ  
Max  
2
Unit  
µA  
V
Test conditions  
Vin = 6.5 V/0.45 V  
IOL = 2.1 mA  
Input leakage current  
ILI  
Output voltage during  
verify  
VOL  
0.45  
VOH  
ICC  
VIL  
VIH  
VH  
2.4  
V
IOH = –400 µA  
Operating VCC current  
Input voltage  
–0.1*5  
50  
mA  
V
0.8  
2.2  
VCC + 0.5*6  
12.5  
70  
V
11.5  
12.0  
V
VPP supply current  
IPP  
mA  
CE = VIL  
Notes: 1. VCC must be applied before VPP and removed after VPP.  
2. VPP must not exceed 13.5 V including overshoot.  
3. An influence may be had upon device reliability if the device is installed or removed while  
VPP = 12.5 V.  
4. Do not alter VPP either VIL to 12.5 V or 12.5 V to VIL when CE = low.  
5. VIL min = –0.6 V for pulse width 20 ns.  
6. If VIH is over the specified maximum value, programming operation cannot be guaranteed.  
9
HN27C4096AHG/AHCC Series  
AC Characteristics (VCC = 6.25 V ± 0.25 V, VPP = 12.5 V ± 0.3 V, Ta = 25°C ± 5°C)  
Test Conditions  
Input pulse levels: 0.45 to 2.4 V  
Input rise and fall time: 20 ns  
Reference levels for measuring timings: Inputs; 0.8 V, 2.0 V  
Outputs; 0.8 V, 2.0 V  
Parameter  
Symbol Min  
Typ  
Max  
Unit  
µs  
µs  
µs  
µs  
µs  
ns  
µs  
µs  
µs  
µs  
ns  
µs  
µs  
µs  
µs  
Test conditions  
Address setup time  
OE setup time  
tAS  
2
tOES  
tDS  
tAH  
tDH  
2
Data setup time  
2
Address hold time  
Data hold time  
0
2
*1  
OE high to output float delay  
VPP setup time  
tDF  
0
130  
tVPS  
tVCS  
tPW  
2
VCC setup time  
2
CE programming pulse width  
CE setup time  
47.5  
2
50.0  
52.5  
tCES  
tOE  
Data valid from OE  
CE pulse width during data latch  
OE=VH setup time  
OE=VH hold time  
VPP hold time*2  
0
150  
tLW  
1
tOHS  
tOHH  
tVRS  
2
2
1
Notes: 1. tDF is defined as the time at which the output achieves the open circuit condition and data is  
no longer driven.  
2. Page program mode will be reset when VPP is set to VCC or less.  
10  
HN27C4096AHG/AHCC Series  
Fast High-Reliability Page Programming Timing Waveform  
Page program mode  
Page program  
Program data latch  
Program verify  
A2 – A17  
A0, A1  
Data  
tAH  
tAH  
tAS  
tAS  
tDH  
tOE  
tDF  
tDS  
Data in  
strobe  
Data out valid  
t VPS  
V
PP  
V
PP  
V
CC  
t VCS  
V
+ 1.25  
CC  
V
CC  
t
V
OHH  
CC  
t
tOHS  
t
t
OES  
PW  
CES  
CE  
t
LW  
V
H
t
VRS  
OE  
V
IH  
V
IL  
11  
HN27C4096AHG/AHCC Series  
Fast High-Reliability Programming  
This device can be applied the fast high-reliability programming algorithm shown in the following flowchart.  
This algorithm allows to obtain faster programming time without any voltage stress to the device nor  
deterioration in reliability of programmed data.  
START  
SET PROG./VERIFY MODE  
V
PP  
= 12.5 ± 0.3 V V = 6.25 ± 0.25 V  
CC  
Address = 0  
n = 0  
n + 1  
Program t  
n
µ
= 50 s ± 5%  
PW  
NOGO  
VERIFY  
GO  
Address + 1 Address  
NO  
n = 10?  
YES  
LAST  
NO  
address?  
YES  
SET READ MODE  
= 5.0 ± 0.5 V V = V  
CC  
V
CC  
PP  
NOGO  
READ  
all address  
GO  
END  
FAIL  
Fast High-Reliability Programming Flowchart  
12  
HN27C4096AHG/AHCC Series  
DC Characteristics (VCC = 6.25 V ± 0.25 V, VPP =12.5 V ± 0.3 V, Ta = 25°C ± 5°C)  
Parameter  
Symbol Min  
Typ  
Max  
Unit  
µA  
mA  
mA  
V
Test conditions  
Vin = 6.5 V/0.45 V  
CE = VIL  
Input leakage current  
VPP supply current  
Operating VCC current  
Input voltage  
ILI  
2
IPP  
ICC  
VIL  
VIH  
VOL  
VOH  
40  
50  
–0.1*5  
2.2  
0.8  
VCC + 0.5*6  
V
Output voltage  
0.45  
V
IOL = 2.1 mA  
2.4  
V
IOH = –400 µA  
Notes: 1. VCC must be applied before VPP and removed after VPP.  
2. VPP must not exceed 13.5 V including overshoot.  
3. An influence may be had upon device reliability if the device is installed or removed while VPP  
12.5 V.  
=
4. Do not alter VPP either VIL to 12.5 V or 12.5 V to VIL when CE = low.  
5. VIL min = –0.6 V for pulse width 20 ns.  
6. If VIH is over the specified maximum value, programming operation cannot be guaranteed.  
13  
HN27C4096AHG/AHCC Series  
AC Characteristics (VCC = 6.25 V ± 0.25 V, VPP = 12.5 V ± 0.3 V, Ta = 25°C ± 5°C)  
Test Conditions  
Input pulse levels: 0.45 to 2.4 V  
Input rise and fall time: 20 ns  
Reference levels for measuring timings: Inputs: 0.8 V, 2.0 V  
Outputs: 0.8 V, 2.0 V  
Parameter  
Symbol Min  
Typ  
Max  
Unit  
µs  
µs  
µs  
µs  
µs  
ns  
µs  
µs  
µs  
ns  
Test conditions  
Address setup time  
OE setup time  
tAS  
2
tOES  
tDS  
tAH  
tDH  
2
Data setup time  
2
Address hold time  
Data hold time  
0
2
*1  
OE to output float delay  
VPP setup time  
tDF  
0
130  
tVPS  
tVCS  
tPW  
tOE  
2
VCC setup time  
2
CE programming pulse width  
Data valid from OE  
47.5  
0
50.0  
52.5  
150  
Note: 1. tDF is defined as the time at which the output achieves the open circuit condition and data is no  
longer driven.  
14  
HN27C4096AHG/AHCC Series  
Fast High-Reliability Programming Timing Waveform  
Program  
Program Verify  
Address  
Data  
t
t
t
AH  
AS  
DS  
Data In Stable  
Data Out Valid  
t
t
DF  
DH  
V
V
PP  
CC  
V
PP  
t
t
VPS  
VCS  
V
+ 1.25  
CC  
V
CC  
V
CC  
CE  
t
t
t
OE  
PW  
OES  
OE  
Optional Page Programming  
This device can be applied the optional page programming algorithm shown in the following flowchart. This  
algorithm allows to obtain faster programming time without any voltage stress to the device nor deterioration  
in reliability of programmed data.  
This programming algorithm is the combination of page programming and word verify. It can avoid the  
increase of programming verify time when a programmer with slow machine cycle is used, and shorten the  
total programming time.  
Regarding the timing specifications for page programming and word verify, please refer to the specifications  
for fast high-reliability page programming and fast high-reliability programming.  
15  
HN27C4096AHG/AHCC Series  
START  
SET PAGE PROG LATCH MODE  
= 12.5 ± 0.3 V V = 6.25 ± 0.25 V  
V
PP  
CC  
OE  
= 12.0 ± 0.5 V  
Address = 0  
Latch  
Address + 1 Address  
Latch  
Address + 1 Address  
Latch  
Address + 1 Address  
Latch  
SET PAGE PROG. MODE  
V
PP  
= 12.5 ± 0.3 V V = 6.25 ± 0.25 V  
CC  
µ
= 50 s ± 5%  
Program t  
PW  
Address + 1 Address  
LAST  
address?  
NO  
YES  
PAGE PROG. RESET  
= V = 6.25 ± 0.25 V  
V
PP  
CC  
SET WORD PROG./VERIFY MODE  
V
PP  
= 12.5 ± 0.3 V V = 6.25 ± 0.25 V  
CC  
Address = 0  
n = 0  
VERIFY  
GO  
NOGO  
n + 1  
n
µ
Program t  
= 50 s ± 5%  
Address + 1 Address  
PW  
NOGO  
VERIFY  
GO  
NO  
LAST  
all address?  
n = 10?  
YES  
YES  
SET READ MODE  
V
CC  
= 5.0 ± 0.5 V V = V  
PP  
CC  
READ  
all address  
NOGO  
GO  
FAIL  
END  
Optional Page Programming Flowchart  
16  
HN27C4096AHG/AHCC Series  
DC Characteristics (VCC = 6.25 V ± 0.25 V, VPP =12.5 V ± 0.3 V, Ta = 25°C ± 5°C)  
Parameter  
Symbol Min  
Typ  
Max  
2
Unit  
µA  
V
Test conditions  
Vin = 6.5 V/0.45 V  
IOL = 2.1 mA  
Input leakage current  
ILI  
Output voltage during verify VOL  
VOH  
0.45  
2.4  
V
IOH = –400 µA  
Operating VCC current  
Input voltage  
ICC  
VIL  
VIH  
VH  
IPP  
50  
mA  
V
–0.1*5  
2.2  
11.5  
0.8  
VCC + 0.5*6  
12.5  
70  
V
12.0  
V
VPP supply current  
mA  
CE = VIL  
Notes: 1. VCC must be applied before VPP and removed after VPP.  
2. VPP must not exceed 13.5 V including overshoot.  
3. An influence may be had upon device reliability if the device is installed or removed  
while VPP = 12.5 V.  
4. Do not alter VPP either VIL to 12.5 V or 12.5 V to VIL when CE = low.  
5. VIL min = –0.6 V for pulse width 20 ns.  
6. If VIH is over the specified maximum value, programming operation cannot be guaranteed.  
17  
HN27C4096AHG/AHCC Series  
AC Characteristics (VCC = 6.25 V ± 0.25 V, VPP = 12.5 V ± 0.3 V, Ta = 25°C ± 5°C)  
Test Conditions  
Input pulse levels: 0.45 to 2.4 V  
Input rise and fall time: 20 ns  
Reference levels for measuring timing: Inputs: 0.8 V, 2.0 V,  
Outputs: 0.8 V, 2.0 V  
Parameter  
Symbol Min  
Typ  
Max  
Unit  
µs  
µs  
µs  
µs  
µs  
ns  
µs  
µs  
µs  
µs  
ns  
µs  
µs  
µs  
µs  
µs  
Test conditions  
Address setup time  
OE setup time  
tAS  
2
tOES  
tDS  
tAH  
tDH  
2
Data setup time  
Address hold time  
Data hold time  
2
0
2
*1  
OE high to output float delay  
VPP setup time  
tDF  
0
130  
tVPS  
tVCS  
2
VCC setup time  
2
CE initial programming pulse width tPW  
47.5  
2
50.0  
52.5  
CE setup time  
tCES  
tOE  
Data valid from OE  
0
150  
CE pulse width during data latch  
OE = VH setup time  
OE = VH hold time  
Page programming reset time*2  
VPP hold time*2  
tLW  
1
tOHS  
tOHH  
tVLW  
tVRS  
2
2
1
1
Notes: 1. tDF is defined as the time at which the output achieves the open circuit condition and data is no  
longer driven.  
2. Page program mode will be reset when VPP is set to VCC or less.  
18  
HN27C4096AHG/AHCC Series  
Option Page Programming Timing Waveform  
Word program mode  
Page program mode  
Page program  
Program data latch  
Program verify  
Program  
A2 – A17  
t
AH  
t
t
t
t
AS  
AH  
AH  
AS  
A0, A1  
Data  
t
DH  
t
DS  
t
t
DS  
DF  
Data  
out  
Data in  
stable  
Data in stable  
valid  
t
t
t
OE  
t
VPS  
VCS  
DF  
VPS  
V
PP  
V
PP  
t
V
VRS  
CC  
t
t
VLW  
V
+ 1.25  
CC  
V
CC  
V
t
CES  
t
CC  
OHH  
t
CES  
t
OHS  
CE  
t
OES  
t
LW  
t
t
PW  
PW  
V
H
OE  
V
IH  
V
IL  
Erase  
Erasure of HN27C4096AHG/AHCC is performed by exposure to ultraviolet light of 2537 Å and all the output  
data are changed to “1” after this erasure procedure. The minimum integrated dose (i.e. UV intensity ×  
exposure time) for erasure is 15 W · sec/cm2.  
19  
HN27C4096AHG/AHCC Series  
Mode Description  
Device Identifier Mode  
The device identifier mode allows the reading out of binary codes that identify manufacturer and type of  
device, from outputs of EPROM. By this mode, the device will be automatically matched its own  
corresponding programming algorithm, using programming equipment.  
HN27C4096AH Identifier Code  
A0 I/O8 – I/O15  
(24) (11) – (4)  
I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 I/O0  
(14) (15) (16) (17) (18) (19) (20) (21)  
(12) (13) (14) (15) (16) (17) (18) (19) Hex data  
CC-44  
Identifier  
DG-40A (21) (10) – (3)  
Manufacturer code  
Device code  
VIL  
VIH  
×
×
0
1
0
0
0
1
0
0
0
0
1
0
1
1
1
0
07  
A2  
Notes: 1. VCC = 5.0 V ± 10%  
2. A9 = 12.0 V ± 0.5 V  
3. A1 – A8, A10 – A17, CE, OE = VIL  
4. ×: Don’t care.  
20  
HN27C4096AHG/AHCC Series  
Package Dimensions  
HN27C4096AHG Series (DG-40A)  
Unit: mm  
52.07  
53.34 Max  
21  
20  
40  
1
φ
8.89  
1.32  
15.24  
2.54 Max  
+ 0.11  
– 0.05  
0.25  
2.54 ± 0.25  
0.48 ± 0.10  
0 – 15°  
Hitachi Code  
DG-40A  
SC-615 Mod.  
12.57 g  
JEDEC Code  
EIAJ Code  
Weight  
21  
HN27C4096AHG/AHCC Series  
Package Dimensions(cont)  
HN27C4096AHCC Series (CC-44)  
Unit: mm  
+0.16  
–0.24  
17.57  
+0.38  
–0.22  
16.51  
39  
29  
40  
28  
18  
44  
1
6
7
17  
0.89  
0.73  
+0.07  
–0.13  
+0.38  
–0.22  
0.15  
1.27  
0.46  
15.75  
M
0.18  
Hitachi Code  
JEDEC Code  
EIAJ Code  
Weight  
CC-44  
+0.38  
15.75  
–0.22  
2.62 g  
22  
HN27C4096AHG/AHCC Series  
When using this document, keep the following in mind:  
1. This document may, wholly or partially, be subject to change without notice.  
2. All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the whole or part of  
this document without Hitachi’s permission.  
3. Hitachi will not be held responsible for any damage to the user that may result from accidents or any other  
reasons during operation of the user’s unit according to this document.  
4. Circuitry and other examples described herein are meant merely to indicate the characteristics and  
performance of Hitachi’s semiconductor products. Hitachi assumes no responsibility for any intellectual  
property claims or other problems that may result from applications based on the examples described  
herein.  
5. No license is granted by implication or otherwise under any patents or other rights of any third party or  
Hitachi, Ltd.  
6. MEDICAL APPLICATIONS: Hitachi’s products are not authorized for use in MEDICAL  
APPLICATIONS without the written consent of the appropriate officer of Hitachi’s sales company. Such  
use includes, but is not limited to, use in life support systems. Buyers of Hitachi’s products are requested  
to notify the relevant Hitachi sales offices when planning to use the products in MEDICAL  
APPLICATIONS.  
Hitachi, Ltd.  
Semiconductor & IC Div.  
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100, Japan  
Tel: Tokyo (03) 3270-2111  
Fax: (03) 3270-5109  
For further information write to:  
Hitachi America, Ltd.  
Semiconductor & IC Div.  
2000 Sierra Point Parkway  
Brisbane, CA. 94005-1835  
U S A  
Hitachi Europe GmbH  
Electronic Components Group  
Continental Europe  
Dornacher Straße 3  
D-85622 Feldkirchen  
München  
Hitachi Europe Ltd.  
Electronic Components Div.  
Northern Europe Headquarters  
Whitebrook Park  
Lower Cookham Road  
Maidenhead  
Hitachi Asia Pte. Ltd.  
16 Collyer Quay #20-00  
Hitachi Tower  
Singapore 0104  
Tel: 535-2100  
Tel: 415-589-8300  
Fax: 535-1533  
Fax: 415-583-4207  
Tel: 089-9 91 80-0  
Fax: 089-9 29 30 00  
Berkshire SL6 8YA  
United Kingdom  
Hitachi Asia (Hong Kong) Ltd.  
Unit 706, North Tower,  
World Finance Centre,  
Harbour City, Canton Road  
Tsim Sha Tsui, Kowloon  
Hong Kong  
Tel: 0628-585000  
Fax: 0628-778322  
Tel: 27359218  
Fax: 27306071  
23  
HN27C4096AHG/AHCC Series  
Revision Record  
Rev. Date  
Contents of Modification  
Drawn by Approved by  
A. Nara T. Muto  
0.0 May. 6, 1994 Initial issue  
1.0 Apr. 4, 1997 Change of format  
DC Characteristics  
(VCC = 5 V ± 10 %, VPP = VSS to VCC,Ta = 0 to + 70˚C)  
CC1 max 35 mA to 30 mA  
I
AC Characteristics  
Deletion of tBAC  
Change of Read timing waveform  
Deletion of Read timing waveform (Burst access mode)  
DC Characteristics  
(VCC = 6.25 V ± 0.25 V, VPP = 12.5 V ± 0.3 V,Ta = 25 ˚C ± 5˚C)  
Change of note2  
24  
配单直通车
HN27C4096AHG-85产品参数
型号:HN27C4096AHG-85
生命周期:Obsolete
IHS 制造商:RENESAS TECHNOLOGY CORP
零件包装代码:DIP
包装说明:WDIP,
针数:40
Reach Compliance Code:unknown
ECCN代码:EAR99
HTS代码:8542.32.00.61
风险等级:5.69
最长访问时间:85 ns
JESD-30 代码:R-GDIP-T40
长度:52.07 mm
内存密度:4194304 bit
内存集成电路类型:UVPROM
内存宽度:16
功能数量:1
端子数量:40
字数:262144 words
字数代码:256000
工作模式:ASYNCHRONOUS
最高工作温度:70 °C
最低工作温度:
组织:256KX16
封装主体材料:CERAMIC, GLASS-SEALED
封装代码:WDIP
封装形状:RECTANGULAR
封装形式:IN-LINE, WINDOW
并行/串行:PARALLEL
认证状态:Not Qualified
座面最大高度:6.3 mm
最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V
表面贴装:NO
技术:CMOS
温度等级:COMMERCIAL
端子形式:THROUGH-HOLE
端子节距:2.54 mm
端子位置:DUAL
宽度:15.24 mm
Base Number Matches:1
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