TMS320DM648ZUT原装现货

1 Features 1• Additional Instructions to SUPPORT • High-Performance DIGITAL Media ProcessorComplex Multiplies – 720-MHz, 800-MHz, 900-MHz, 1.1-GHzC64x+™ Clock Rates • C64x+ L1/L2 MEMORY Architecture– 1.39 ns (-720), 1.25 ns (-800), 1.11 ns (-900), – 256K-bit (32K-byte) L1P Program RAM/Cache0.91 ns [Direct Mapped] (-1100) Instruction Cycle Time– 5760, 6400, 7200, 8800 MIPS – 256K-bit (32K-byte) L1D Data RAM/Cache[2-Way Set-Associative] – Eight 32-Bit C64x+ Instructions/Cycle– 2M-bit/256K-byte (DM647) or – Fully Software-Compatible With C64x/Debug4M-Bit/512K-byte) (DM648) L2 Unified– Commercial Temperature Ranges (-720, -900, Mapped RAM/Cache [Flexible Allocation] and -1100 only)• Supports Little Endian Mode Only– Extended Temperature Ranges (-800 only)• Five Configurable Video Ports– Industrial Temperature Ranges (-720, -900,– Providing a Glueless I/F to COMMON Video and -1100 only)Decoder and Encoder Devices• VelociTI.2™ Extensions to VelociTI™Advanced – Supports Multiple Resolutions/Video Very-Long-Instruction-Word (VLIW)Standards TMS320C64x+™ DSP Core• VCXO Interpolated Control Port (VIC) – Eight Highly Independent Functional UnitsWith VelociTI.2 Extensions: – Supports Audio/Video Synchronization• External Memory Interfaces (EMIFs) • Six ALUs (32-/40-Bit), Each SupportsSingle 32-bit, Dual 16-bit, or Quad 8-bit – 32-Bit DDR2 SDRAM Memory Controller WithArithmetic per Clock Cycle 512M-Byte(1) Address Space (1.8-V I/O)• Two Multipliers Support Four 16 x 16-bit – Asynchronous 16-Bit Wide EMIF (EMIFA)Multiplies (32-bit Results) per Clock Cycle • Up to 128M-Byte Total Address Reachor Eight 8 x 8-bit Multiplies (16-Bit • 64M-Byte Address Reach per CE SpaceResults) per Clock Cycle– Glueless Interface to Asynchronous– Load-Store Architecture With Non-Aligned Memories (SRAM, Flash, and EEPROM)Support– Synchronous Memories (SBSRAM and ZBT– 64 32-bit General-Purpose Registers SRAM)– Instruction Packing Reduces Code Size – Supports Interface to Standard Sync Devices– All Instructions Conditional and Custom Logic (FPGA, CPLD, ASICs,– Additional C64x+™ Enhancements etc.)• Protected Mode Operation • Enhanced Direct-Memory-Access (EDMA)Controller (64 Independent Channels) • Exceptions Support for Error Detectionand Program Redirection • 3-Port Gigabit Ethernet Switch Subsystem• Hardware Support for Modulo Loop • Four 64-Bit General-Purpose Timers (EachAuto-Focus Module Operation Configurable as Two 32-Bit Timers)• C64x+ Instruction Set Features • One UART (With RTS and CTS Flow Control)– Byte-Addressable (8-/16-/32-/64-bit Data) • One 4-wire Serial Port Interface (SPI) With Two– 8-bit Overflow Protection Chip-Selects– Bit-Field Extract, Set, Clear • Master/Slave Inter-Integrated Circuit (I2CBus™) – Normalization, Saturation, Bit-Counting• Multichannel Audio Serial Port (McASP) – VelociTI.2 Increased Orthogonality– Ten Serializers and SPDIF (DIT) Mode – C64x+ Extensions• Compact 16-bit Instructions

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