HUF75344G3原理图各脚功能电路原理芯片引脚定义引脚图及功能-中国IC网-芯三七

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产品型号HUF75344G3的概述

芯片HUF75344G3概述 HUF75344G3是一款高驱动功率MOSFET，由国际知名半导体制造商设计并生产。它设计用于高效能的电源管理、开关电源、驱动电机以及其他需要高功率和高效率传输的应用。由于其极低的导通电阻和高电流承载能力，该芯片在现代电子设备中应用广泛，尤其是在电源转换、功率放大和图像处理等领域。芯片HUF75344G3的详细参数 HUF75344G3的主要参数包括： - 交易类型: N-channel MOSFET - 最大漏源电压 (VDS): 55V - 最大漏极电流 (ID): 50A - 导通电阻 (RDS(on)): 11 mΩ (在VGS=10V时) - 门源阈值电压 (VGS(th)): 2V 至 4V - 包络配置: TO-220 - 最大功耗 (PD): 94W - 工作温度范围: -55°C 至 170°C 这些参数使得HUF75344G3特别适合...

产品型号HUF75344G3的Datasheet PDF文件预览

HUF75344G3, HUF75344P3, HUF75344S3S

Data Sheet

December 2001

75A, 55V, 0.008 Ohm, N-Channel UltraFET

Power MOSFETs

Features

• 75A, 55V

These N-Channel power MOSFETs

are manufactured using the

innovative UltraFET process. This

• Simulation Models

- Temperature Compensated PSPICE and SABER™

Models

advanced process technology

achieves the lowest possible on-resistance per silicon area,

resulting in outstanding performance. This device is capable

of withstanding high energy in the avalanche mode and the

diode exhibits very low reverse recovery time and stored

charge. It was designed for use in applications where power

efficiency is important, such as switching regulators,

switching converters, motor drivers, relay drivers, low-

voltage bus switches, and power management in portable

and battery-operated products.

- Thermal Impedance PSPICE and SABER Models

Available on the web at: www.fairchildsemi.com

• Peak Current vs Pulse Width Curve

• UIS Rating Curve

• Related Literature

- TB334, “Guidelines for Soldering Surface Mount

Components to PC Boards”

Symbol

Formerly developmental type TA75344.

Ordering Information

PART NUMBER

PACKAGE

BRAND

75344G

HUF75344G3

TO-247

HUF75344P3

TO-220AB

TO-263AB

75344P

75344S

HUF75344S3S

NOTE: When ordering, use the entire part number. Add the suffix T to

obtain the TO-263AB variant in tape and reel, e.g., HUF75344S3ST.

Packaging

JEDEC STYLE TO-247

JEDEC TO-220AB

SOURCE

DRAIN

GATE

SOURCE

DRAIN

GATE

DRAIN

(FLANGE)

DRAIN

(TAB)

JEDEC TO-263AB

DRAIN

(FLANGE)

GATE

SOURCE

Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html

For severe environments, see our Automotive HUFA series.

All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.

HUF75344G3, HUF75344P3, HUF75344S3S Rev. B1

HUF75344G3, HUF75344P3, HUF75344S3S

Absolute Maximum Ratings

= 25 C, Unless Otherwise Specified

UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . V

DSS

DGR

Drain to Gate Voltage (R

= 20kΩ) (Note 1) . . . . . . . . . . . . . V

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

±20

Drain Current

Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Figure 4

Figure 6

285

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

Derate Above 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.90

W/ C

Operating and Storage Temperature . . . . . . . . . . . . . . . . . .T , T

-55 to 175

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . T

300

260

pkg

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. T = 25 C to 150 C.

Electrical Specifications

T = 25 C, Unless Otherwise Specified

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

OFF STATE SPECIFICATIONS

Drain to Source Breakdown Voltage

Zero Gate Voltage Drain Current

= 250µA, V

= 0V (Figure 11)

DSS

= 50V, V

= 45V, V

= ±20V

= 0V

= 0V, T = 150 C

µA

DSS

250

±100

Gate to Source Leakage Current

ON STATE SPECIFICATIONS

Gate to Source Threshold Voltage

Drain to Source On Resistance

THERMAL SPECIFICATIONS

GSS

= V , I = 250µA (Figure 10)

GS(TH)

= 75A, V

= 10V (Figure 9)

0.0065 0.008

Ω

DS(ON)

Thermal Resistance Junction to Case

Thermal Resistance Junction to Ambient

(Figure 3)

TO-247

0.52

C/W

θJC

C/W

θJA

TO-220, TO-263

C/W

SWITCHING SPECIFICATIONS (V

Turn-On Time

= 10V)

= 30V, I

75A,

= 10V,

112

195

= 0.4Ω, V

Turn-On Delay Time

Rise Time

d(ON)

= 3.0Ω

Turn-Off Delay Time

Fall Time

d(OFF)

Turn-Off Time

100

OFF

GATE CHARGE SPECIFICATIONS

Total Gate Charge

= 0V to 20V

= 0V to 10V

= 0V to 2V

= 30V,

75A,

175

210

108

7.0

g(TOT)

Gate Charge at 10V

g(10)

g(TH)

= 0.4Ω

Threshold Gate Charge

5.9

= 1.0mA

g(REF)

(Figure 13)

Gate to Source Gate Charge

Reverse Transfer Capacitance

CAPACITANCE SPECIFICATIONS

Input Capacitance

= 25V, V

= 0V,

3200

1170

310

ISS

f = 1MHz

(Figure 12)

Output Capacitance

OSS

RSS

Reverse Transfer Capacitance

HUF75344G3, HUF75344P3, HUF75344S3S Rev. B1

HUF75344G3, HUF75344P3, HUF75344S3S

Source to Drain Diode Specifications

PARAMETER

Source to Drain Diode Voltage

Reverse Recovery Time

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

1.25

105

UNITS

= 75A

= 75A, dI /dt = 100A/µs

Reverse Recovered Charge

= 75A, dI /dt = 100A/µs

210

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

100

125

150

175

100

125

150

175

, CASE TEMPERATURE ( C)

T , CASE TEMPERATURE ( C)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

DUTY CYCLE - DESCENDING ORDER

0.5

0.2

0.1

0.05

0.02

0.01

0.1

NOTES:

DUTY FACTOR: D = t /t

PEAK T = P

x Z

x R

+ T

θJC C

θJC

SINGLE PULSE

0.01

-5

-4

-3

-2

-1

t, RECTANGULAR PULSE DURATION (s)

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

HUF75344G3, HUF75344P3, HUF75344S3S Rev. B1

HUF75344G3, HUF75344P3, HUF75344S3S

Typical Performance Curves (Continued)

2000

1000

= 25 C

FOR TEMPERATURES

ABOVE 25 C DERATE PEAK

CURRENT AS FOLLOWS:

175 - T

150

I = I

= 20V

= 10V

TRANSCONDUCTANCE

MAY LIMIT CURRENT

IN THIS REGION

100

-5

-4

-3

-2

-1

t, PULSE WIDTH (s)

FIGURE 4. PEAK CURRENT CAPABILITY

1000

100

If R = 0

= MAX RATED

= (L)(I )/(1.3*RATED BV

- V

)

If R ≠ 0

= (L/R)ln[(I *R)/(1.3*RATED BV

DSS

= 25 C

- V ) +1]

DSS

100µs

100

STARTING T = 25 C

1ms

STARTING T = 150 C

OPERATION IN THIS

AREA MAY BE

10ms

LIMITED BY r

DS(ON)

= 55V

DSS(MAX)

0.01

0.1

100

200

, TIME IN AVALANCHE (ms)

, DRAIN TO SOURCE VOLTAGE (V)

NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.

FIGURE 5. FORWARD BIAS SAFE OPERATING AREA

FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY

150

120

150

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

= 20V

= 10V

= 15V

120

= 7V

= 6V

= 5V

25 C

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

-55 C

= 25 C

1.5

4.5

7.5

, DRAIN TO SOURCE VOLTAGE (V)

, GATE TO SOURCE VOLTAGE (V)

FIGURE 7. SATURATION CHARACTERISTICS

FIGURE 8. TRANSFER CHARACTERISTICS

HUF75344G3, HUF75344P3, HUF75344S3S Rev. B1

HUF75344G3, HUF75344P3, HUF75344S3S

Typical Performance Curves (Continued)

2.5

2.0

1.5

1.0

0.5

1.2

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

= V , I = 250µA

= 10V, I = 75A

1.0

0.8

0.6

0.4

-80

-40

120

160

200

-40

120

160

T , JUNCTION TEMPERATURE ( C)

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs

JUNCTION TEMPERATURE

1.2

4500

= 0V, f = 1MHz

= 250µA

= C

+ C

ISS

= C

RSS

OSS

ISS

≈

+ C

1.1

1.0

0.9

3000

OSS

1500

RSS

-80

-40

120

160

200

, DRAIN TO SOURCE VOLTAGE (V)

T , JUNCTION TEMPERATURE ( C)

FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

= 30V

WAVEFORMS IN

DESCENDING ORDER:

= 75A

= 55A

= 35A

= 20A

Q , GATE CHARGE (nC)

100

NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.

FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT

HUF75344G3, HUF75344P3, HUF75344S3S Rev. B1

HUF75344G3, HUF75344P3, HUF75344S3S

Test Circuits and Waveforms

DSS

VARY t TO OBTAIN

REQUIRED PEAK I

DUT

0.01Ω

FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT

FIGURE 15. UNCLAMPED ENERGY WAVEFORMS

g(TOT)

= 20V

g(10)

= 10V

DUT

= 2V

G(REF)

g(TH)

g(REF)

FIGURE 16. GATE CHARGE TEST CIRCUIT

FIGURE 17. GATE CHARGE WAVEFORM

OFF

d(OFF)

d(ON)

90%

10%

DUT

90%

50%

PULSE WIDTH

10%

FIGURE 18. SWITCHING TIME TEST CIRCUIT

FIGURE 19. RESISTIVE SWITCHING WAVEFORMS

HUF75344G3, HUF75344P3, HUF75344S3S Rev. B1

HUF75344G3, HUF75344P3, HUF75344S3S

PSPICE Electrical Model

.SUBCKT HUF75344P3 2 1 3 ;

rev 3 Feb 1999

CA 12 8 4.9e-9

CB 15 14 4.75e-9

CIN 6 8 2.85e-9

LDRAIN

DPLCAP

DRAIN

RLDRAIN

DBODY 7 5 DBODYMOD

DBREAK 5 11 DBREAKMOD

DPLCAP 10 5 DPLCAPMOD

RSLC1

DBREAK

RSLC2

ESLC

EBREAK 11 7 17 18 59.7

EDS 14 8 5 8 1

EGS 13 8 6 8 1

ESG 6 10 6 8 1

EVTHRES 6 21 19 8 1

DBODY

RDRAIN

EBREAK 18

ESG

EVTHRES

EVTEMP 20 6 18 22 1

MWEAK

LGATE

EVTEMP

RGATE

GATE

MMED

IT 8 17 1

MSTRO

RLGATE

LDRAIN 2 5 1e-9

LGATE 1 9 2.6e-9

LSOURCE 3 7 1.1e-9

LSOURCE

CIN

SOURCE

KGATE LSOURCE LGATE 0.0085

RSOURCE

RLSOURCE

MMED 16 6 8 8 MMEDMOD

MSTRO 16 6 8 8 MSTROMOD

MWEAK 16 21 8 8 MWEAKMOD

S1A

S2A

S2B

RBREAK

RBREAK 17 18 RBREAKMOD 1

RDRAIN 50 16 RDRAINMOD 1.94e-3

RGATE 9 20 0.36

RLDRAIN 2 5 10

RLGATE 1 9 26

RLSOURCE 3 7 11

RSLC1 5 51 RSLCMOD 1e-6

RSLC2 5 50 1e3

RSOURCE 8 7 RSOURCEMOD 3.5e-3

RVTHRES 22 8 RVTHRESMOD 1

RVTEMP 18 19 RVTEMPMOD 1

RVTEMP

S1B

VBAT

EGS

EDS

RVTHRES

S1A 6 12 13 8 S1AMOD

S1B 13 12 13 8 S1BMOD

S2A 6 15 14 13 S2AMOD

S2B 13 15 14 13 S2BMOD

VBAT 22 19 DC 1

ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*400),3))}

.MODEL DBODYMOD D (IS = 2.95e-12 RS = 2.6e-3 TRS1 = 1.05e-3 TRS2 = 5.0e-7 CJO = 5.19e-9 TT = 5.9e-8 M = 0.55)

.MODEL DBREAKMOD D (RS = 1.65e-1 IKF = 30 TRS1 = 1.15e-4 TRS2 = 2.27e-6)

.MODEL DPLCAPMOD D (CJO = 5.40e-9 IS = 1e-30 N=1 M = 0.88 )

.MODEL MMEDMOD NMOS (VTO = 3.29 KP = 5.5 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 0.36)

.MODEL MSTROMOD NMOS (VTO = 3.83 KP = 123 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)

.MODEL MWEAKMOD NMOS (VTO = 2.90 KP =0.04 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 3.6)

.MODEL RBREAKMOD RES (TC1 = 1.15e-3 TC2 = 2.0e-7)

.MODEL RDRAINMOD RES (TC1 = 1.37e-2 TC2 = 3.85e-5)

.MODEL RSLCMOD RES (TC1 = 1.45e-4 TC2 = 2.11e-6)

.MODEL RSOURCEMOD RES (TC1 = 0 TC2 = 0)

.MODEL RVTHRESMOD RES (TC1 = -3.7e-3 TC2 = -1.6e-5)

.MODEL RVTEMPMOD RES (TC1 = -2.4e-3 TC2 = 7e-7)

.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -6.9 VOFF= -3.9)

.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3.9 VOFF= -6.9)

.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.99 VOFF= 2.39)

.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 2.39 VOFF= -2.99)

.ENDS

NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global

Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.

HUF75344G3, HUF75344P3, HUF75344S3S Rev. B1

HUF75344G3, HUF75344P3, HUF75344S3S

SABER Electrical Model

REV 3 February 1999

template huf75344p3 n2, n1, n3

electrical n2, n1, n3

{

var i iscl

d..model dbodymod = (is = 2.95e-12, cjo = 5.19e-9, tt = 5.90e-8, m = 0.55)

d..model dbreakmod = ()

LDRAIN

RLDRAIN

RDBODY

DPLCAP

DRAIN

d..model dplcapmod = (cjo = 5.40e-9, is = 1e-30, n = 1, m = 0.88)

m..model mmedmod = (type=_n, vto = 3.29, kp = 5.5, is = 1e-30, tox = 1)

m..model mstrongmod = (type=_n, vto = 3.83, kp = 123, is = 1e-30, tox = 1)

m..model mweakmod = (type=_n, vto = 2.90, kp = 0.04, is = 1e-30, tox = 1)

sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -6.9, voff = -3.9)

sw_vcsp..model s1bmod = (ron = 1e-5, roff = 0.1, von = -3.9, voff = -6.9)

sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = -2.99, voff = 2.39)

sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = 2.39, voff = -2.99)

RSLC1

RDBREAK

DBREAK

RSLC2

ISCL

c.ca n12 n8 = 4.9e-9

c.cb n15 n14 = 4.75e-9

RDRAIN

ESG

c.cin n6 n8 = 2.85e-9

EVTHRES

MWEAK

LGATE

EVTEMP

d.dbody n7 n71 = model=dbodymod

d.dbreak n72 n11 = model=dbreakmod

d.dplcap n10 n5 = model=dplcapmod

DBODY

RGATE

GATE

EBREAK

MMED

MSTRO

RLGATE

i.it n8 n17 = 1

LSOURCE

CIN

SOURCE

l.ldrain n2 n5 = 1e-9

l.lgate n1 n9 = 2.6e-9

l.lsource n3 n7 = 1.1e-9

RSOURCE

RLSOURCE

k.kl i(l.lgate) i(l.lsource) = l(l.lgate), l(l.lsource), 0.0085

S1A

S2A

RBREAK

m.mmed n16 n6 n8 n8 = model=mmedmod, l = 1u, w = 1u

m.mstrong n16 n6 n8 n8 = model=mstrongmod, l = 1u, w = 1u

m.mweak n16 n21 n8 n8 = model=mweakmod, l = 1u, w = 1u

RVTEMP

S1B

S2B

res.rbreak n17 n18 = 1, tc1 = 1.15e-3, tc2 = 2e-7

res.rdbody n71 n5 = 2.6e-3, tc1 = 1.05e-3, tc2 = 5e-7

res.rdbreak n72 n5 = 1.65e-1, tc1 = 1.15e-4, tc2 = 2.27e-6

res.rdrain n50 n16 = 1.94e-3, tc1 = 1.37e-2, tc2 = 3.85e-5

res.rgate n9 n20 = 0.36

VBAT

EGS

EDS

res.rldrain n2 n5 = 10

RVTHRES

res.rlgate n1 n9 = 26

res.rlsource n3 n7 = 11

res.rslc1 n5 n51 = 1e-6, tc1 = 1.45e-4, tc2 = 2.11e-6

res.rslc2 n5 n50 = 1e3

res.rsource n8 n7 = 3.5e-3, tc1 = 0, tc2 = 0

res.rvtemp n18 n19 = 1, tc1 = -2.4e-3, tc2 = 7e-7

res.rvthres n22 n8 = 1, tc1 = -3.7e-3, tc2 = -1.6e-5

spe.ebreak n11 n7 n17 n18 = 59.7

spe.eds n14 n8 n5 n8 = 1

spe.egs n13 n8 n6 n8 = 1

spe.esg n6 n10 n6 n8 = 1

spe.evtemp n20 n6 n18 n22 = 1

spe.evthres n6 n21 n19 n8 = 1

sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod

sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod

sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod

sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod

v.vbat n22 n19 = dc = 1

equations {

i (n51->n50) + = iscl

iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/400))** 3))

}

HUF75344G3, HUF75344P3, HUF75344S3S Rev. B1

HUF75344G3, HUF75344P3, HUF75344S3S

SPICE Thermal Model

JUNCTION

REV 5 February 1999

HUF75344

RTHERM1

RTHERM2

RTHERM3

RTHERM4

RTHERM5

RTHERM6

CTHERM1

CTHERM2

CTHERM3

CTHERM4

CTHERM5

CTHERM6

CTHERM1 th 6 5.0e-3

CTHERM2 6 5 1.0e-2

CTHERM3 5 4 1.3e-2

CTHERM4 4 3 1.5e-2

CTHERM5 3 2 2.2e-2

CTHERM6 2 tl 8.5e-2

RTHERM1 th 6 6.0e-4

RTHERM2 6 5 3.5e-3

RTHERM3 5 4 2.5e-2

RTHERM4 4 3 4.8e-2

RTHERM5 3 2 1.6e-1

RTHERM6 2 tl 1.8e-1

SABER Thermal Model

SABER thermal model HUF75344

template thermal_model th tl

thermal_c th, tl

{

ctherm.ctherm1 th 6 = 5.0e-3

ctherm.ctherm2 6 5 = 1.0e-2

ctherm.ctherm3 5 4 = 1.3e-2

ctherm.ctherm4 4 3 = 1.5e-2

ctherm.ctherm5 3 2 = 2.2e-2

ctherm.ctherm6 2 tl = 8.5e-2

rtherm.rtherm1 th 6 = 6.0e-4

rtherm.rtherm2 6 5 = 3.5e-3

rtherm.rtherm3 5 4 = 2.5e-2

rtherm.rtherm4 4 3 = 4.8e-2

rtherm.rtherm5 3 2 = 1.6e-1

rtherm.rtherm6 2 tl = 1.8e-1

}

CASE

HUF75344G3, HUF75344P3, HUF75344S3S Rev. B1

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TinyLogic™

QS™

TruTranslation™

UHC™

QT Optoelectronics™

Quiet Series™

SILENTSWITCHER^â

UltraFET ^â

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD

DOES NOT ASSUME ANY LIABILITYARISING OUT OF THE APPLICATION OR USE OFANY PRODUCT

OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT

RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICESORSYSTEMSWITHOUTTHEEXPRESSWRITTENAPPROVALOFFAIRCHILDSEMICONDUCTORCORPORATION.

As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, or (c) whose

failure to perform when properly used in accordance

with instructions for use provided in the labeling, can be

reasonably expected to result in significant injury to the

user.

2. A critical component is any component of a life

support device or system whose failure to perform can

be reasonably expected to cause the failure of the life

support device or system, or to affect its safety or

effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or

In Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Rev. H7

HUF75344G3相关文章

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HUF75344G3产品参数

型号:	HUF75344G3
是否Rohs认证：	不符合
生命周期：	Transferred
IHS 制造商：	INTERSIL CORP
Reach Compliance Code：	not_compliant
ECCN代码：	EAR99
风险等级：	5.11
外壳连接：	DRAIN
配置：	SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压：	55 V
最大漏极电流 (Abs) (ID)：	75 A
最大漏极电流 (ID)：	75 A
最大漏源导通电阻：	0.008 Ω
FET 技术：	METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码：	TO-247
JESD-30 代码：	R-PSFM-T3
JESD-609代码：	e0
元件数量：	1
端子数量：	3
工作模式：	ENHANCEMENT MODE
最高工作温度：	175 °C
封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR
封装形式：	FLANGE MOUNT
峰值回流温度（摄氏度）：	NOT SPECIFIED
极性/信道类型：	N-CHANNEL
最大功率耗散 (Abs)：	175 W
认证状态：	Not Qualified
子类别：	FET General Purpose Power
表面贴装：	NO
端子面层：	Tin/Lead (Sn/Pb)
端子形式：	THROUGH-HOLE
端子位置：	SINGLE
处于峰值回流温度下的最长时间：	NOT SPECIFIED
晶体管应用：	SWITCHING
晶体管元件材料：	SILICON
Base Number Matches：	1

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