HUFA75333P3应用文章市场行情现货热卖使用介绍供应商报价-中国IC网-芯三七

HUFA75333G3, HUFA75333P3, HUFA75333S3S

Data Sheet

December 2001

66A, 55V, 0.016 Ohm. N-Channel UltraFET

Power MOSFETs

Features

• 66A, 55V

These N-Channel power MOSFETs

are manufactured using the

innovative UltraFET® process. This

• Simulation Models

- Temperature Compensated PSPICE® and SABER™

Models

advanced process technology

- SPICE and SABER Thermal Impedance Models

Available on the WEB at: www.fairchildsemi.com

achieves the lowest possible on-resistance per silicon area,

resulting in outstanding performance. This device is capable

of withstanding high energy in the avalanche mode and the

diode exhibits very low reverse recovery time and stored

charge. It was designed for use in applications where power

efficiency is important, such as switching regulators,

switching convertors, motor drivers, relay drivers, low-

voltage bus switches, and power management in portable

and battery-operated products.

• Peak Current vs Pulse Width Curve

• UIS Rating Curve

• Related Literature

- TB334, “Guidelines for Soldering Surface Mount

Components to PC Boards”

Symbol

Formerly developmental type TA75333.

D

Ordering Information

PART NUMBER

HUFA75333G3

HUFA75333P3

HUFA75333S3S

PACKAGE

BRAND

75333G

G

TO-247

TO-220AB

TO-263AB

75333P

75333S

S

NOTE: When ordering, use the entire part number. Add the suffix T to

obtain the TO-263AB variant in tape and reel, e.g., HUFA75333S3ST.

Packaging

JEDEC STYLE TO-247

JEDEC TO-220AB

SOURCE

DRAIN

GATE

SOURCE

DRAIN

GATE

DRAIN

(FLANGE)

DRAIN

(TAB)

JEDEC TO-263AB

GATE

DRAIN

(FLANGE)

SOURCE

This product has been designed to meet the extreme test conditions and environment demanded by the automotive industry. For a copy

of the requirements, see AEC Q101 at: http://www.aecouncil.com/

Reliability data can be found at: http://www.fairchildsemi.com/products/discrete/reliability/index.html.

All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.

HUFA75333G3, HUFA75333P3, HUFA75333S3S Rev. B

HUFA75333G3, HUFA75333P3, HUFA75333S3S

o

Absolute Maximum Ratings

T

= 25 C, Unless Otherwise Specified

C

UNITS

Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

55

V

DSS

DGR

Drain to Gate Voltage (R

= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

GS

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

±20

GS

Drain Current

Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

66

Figure 4

Figures 6, 14, 15

150

A

D

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

DM

Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

AS

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

W

D

o

Derate Above 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1

W/ C

o

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T , T

-55 to 175

C

J

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

o

300

260

C

L

o

pkg

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

o

1. T = 25 C to 150 C.

J

o

Electrical Specifications

T = 25 C, Unless Otherwise Specified

C

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

OFF STATE SPECIFICATIONS

Drain to Source Breakdown Voltage

Zero Gate Voltage Drain Current

BV

I

= 250µA, V

= 0V (Figure 11)

55

-

V

DSS

D

GS

I

V

= 50V, V

= 45V, V

= ±20V

= 0V

= 0V, T = 150 C

1

µA

nA

DSS

DS

GS

o

-

250

±100

C

Gate to Source Leakage Current

ON STATE SPECIFICATIONS

Gate to Source Threshold Voltage

Drain to Source On Resistance

THERMAL SPECIFICATIONS

I

-

GSS

V

= V , I = 250µA (Figure 10)

2

-

4

V

GS(TH)

GS

DS

D

r

I

= 66A, V

= 10V (Figure 9)

0.013

0.016

Ω

DS(ON)

D

GS

o

Thermal Resistance Junction to Case

Thermal Resistance Junction to Ambient

R

(Figure 3)

TO-247

-

1

C/W

θJC

o

30

62

C/W

θJA

o

TO-220, TO-263

C/W

SWITCHING SPECIFICATIONS (V

Turn-On Time

= 10V)

GS

t

V

R

= 30V, I

66A,

= 0.455Ω, V = 10V,

GS

-

100

ns

ON

DD

D

L

Turn-On Delay Time

Rise Time

t

12

55

11

25

-

d(ON)

= 6.8Ω

GS

t

r

Turn-Off Delay Time

Fall Time

t

-

d(OFF)

t

-

f

Turn-Off Time

t

55

OFF

GATE CHARGE SPECIFICATIONS

Total Gate Charge

Q

V

= 0V to 20V

= 0V to 10V

= 0V to 2V

V

DD

= 30V,

66A,

-

70

40

85

50

3.0

-

nC

g(TOT)

GS

I

D

Gate Charge at 10V

Q

g(10)

g(TH)

R

I

= 0.455Ω

L

= 1.0mA

Threshold Gate Charge

Q

2.5

6.2

16

g(REF)

(Figure 13)

Gate to Source Gate Charge

Gate to Drain “Miller” Charge

Q

gs

gd

Q

-

HUFA75333G3, HUFA75333P3, HUFA75333S3S Rev. B

HUFA75333G3, HUFA75333P3, HUFA75333S3S

o

Electrical Specifications

T

= 25 C, Unless Otherwise Specified

C

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

CAPACITANCE SPECIFICATIONS

Input Capacitance

C

V

= 25V, V = 0V,

GS

-

1300

480

-

pF

ISS

DS

f = 1MHz

(Figure 12)

Output Capacitance

C

OSS

RSS

Reverse Transfer Capacitance

C

115

Source to Drain Diode Specifications

PARAMETER

Source to Drain Diode Voltage

Reverse Recovery Time

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

1.25

75

UNITS

V

I

= 66A

-

SD

t

= 66A, dI /dt = 100A/µs

SD

ns

rr

Reverse Recovered Charge

Q

= 66A, dI /dt = 100A/µs

140

nC

RR

SD

Typical Performance Curves

1.2

1.0

0.8

70

60

50

40

30

20

10

0

0.6

0.4

0.2

0

25

50

75

100

125

150

175

0

25

50

75

100

125

o

150

175

o

T

, CASE TEMPERATURE ( C)

T , CASE TEMPERATURE ( C)

C

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

2

DUTY CYCLE - DESCENDING ORDER

0.5

1

0.2

0.1

0.05

0.02

0.01

P

DM

0.1

t

1

t

2

NOTES:

DUTY FACTOR: D = t /t

1

2

PEAK T = P

DM

x Z

x R + T

J

θJC

θJC C

SINGLE PULSE

0.01

-5

-4

-3

10

-2

10

-1

0

1

10

t, RECTANGULAR PULSE DURATION (s)

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

HUFA75333G3, HUFA75333P3, HUFA75333S3S Rev. B

HUFA75333G3, HUFA75333P3, HUFA75333S3S

Typical Performance Curves ^(Continued)

1000

o

T

= 25 C

FOR TEMPERATURES

C

o

ABOVE 25 C DERATE PEAK

CURRENT AS FOLLOWS:

175 - T

150

C

I = I

25

V

= 10V

GS

100

50

TRANSCONDUCTANCE

MAY LIMIT CURRENT

IN THIS REGION

-5

-4

-3

10

-2

10

-1

0

1

10

t, PULSE WIDTH (s)

FIGURE 4. PEAK CURRENT CAPABILITY

500

T

= MAX RATED

J

If R = 0

= (L)(I )/(1.3*RATED BV

o

t

- V

)

T

= 25 C

AV

If R ≠ 0

= (L/R)ln[(I *R)/(1.3*RATED BV

AS

DSS

DD

C

t

- V ) +1]

DD

AV

AS

DSS

100

10

100µs

100

o

STARTING T = 25 C

J

1ms

OPERATION IN THIS

AREA MAY BE

10ms

LIMITED BY r

DS(ON)

= 55V

o

STARTING T = 150 C

J

V

DSS(MAX)

1

10

0.001

10

, DRAIN TO SOURCE VOLTAGE (V)

100

200

1

0.01

0.1

1

10

V

DS

t

, TIME IN AVALANCHE (ms)

AV

NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.

FIGURE 5. FORWARD BIAS SAFE OPERATING AREA

FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY

150

PULSE DURATION = 80µs

V

= 20V

= 10V

GS

DUTY CYCLE = 0.5% MAX

o

GS

-55 C

V

= 15V

DD

120

90

60

30

0

120

90

60

30

0

V

= 7V

= 6V

GS

o

V

GS

25 C

o

175 C

V

= 5V

GS

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

o

T

= 25 C

C

0

1.5

3.0

4.5

6.0

7.5

0

1.5

3.0

4.5

6.0

7.5

V

, DRAIN TO SOURCE VOLTAGE (V)

DS

V , GATE TO SOURCE VOLTAGE (V)

GS

FIGURE 7. SATURATION CHARACTERISTICS

FIGURE 8. TRANSFER CHARACTERISTICS

HUFA75333G3, HUFA75333P3, HUFA75333S3S Rev. B

HUFA75333G3, HUFA75333P3, HUFA75333S3S

Typical Performance Curves ^(Continued)

2.5

2.0

1.5

1.0

1.2

1.0

0.8

0.6

0.4

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

V

= V , I = 250µA

DS D

GS

V

= 10V, I = 66A

GS

D

0.5

-80

-40

0

40

80

120

160

200

-80

-40

0

40

80

120

160

200

o

T , JUNCTION TEMPERATURE ( C)

J

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs

JUNCTION TEMPERATURE

RESISTANCE vs JUNCTION TEMPERATURE

1.2

1.1

1.0

0.9

0.8

2000

I

= 250µA

D

V

= 0V, f = 1MHz

GS

ISS

C

= C

GS

+ C

GD

= C

≈ C + C

RSS

OSS

GD

DS

1500

1000

500

GD

C

ISS

C

OSS

RSS

0

-80

-40

0

40

80

120

160

200

0

10

V

20

30

40

50

60

o

T , JUNCTION TEMPERATURE ( C)

, DRAIN TO SOURCE VOLTAGE (V)

DS

J

FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

10

V

= 30V

DD

8

6

4

2

0

WAVEFORMS IN

DESCENDING ORDER:

I

= 66A

= 50A

= 33A

= 16A

D

0

10

20

Q , GATE CHARGE (nC)

30

40

g

NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.

FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT

HUFA75333G3, HUFA75333P3, HUFA75333S3S Rev. B

HUFA75333G3, HUFA75333P3, HUFA75333S3S

Test Circuits and Waveforms

V

DS

BV

DSS

L

t

P

V

DS

I

VARY t TO OBTAIN

P

AS

+

-

V

DD

R

REQUIRED PEAK I

G

AS

V

DD

V

GS

DUT

t

P

I

AS

0V

0

0.01Ω

t

AV

FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT

FIGURE 15. UNCLAMPED ENERGY WAVEFORMS

V

DS

V

Q

DD

R

g(TOT)

L

V

DS

V

= 20V

GS

V

Q

GS

g(10)

+

-

V

DD

V

= 10V

V

GS

DUT

V

= 2V

GS

I

0

G(REF)

Q

g(TH)

Q

gd

gs

I

g(REF)

0

FIGURE 16. GATE CHARGE TEST CIRCUIT

FIGURE 17. GATE CHARGE WAVEFORM

V

t

DS

ON

OFF

t

d(OFF)

t

d(ON)

t

f

R

L

r

V

DS

90%

+

V

GS

V

DD

10%

0

-

DUT

90%

50%

R

GS

V

GS

50%

PULSE WIDTH

10%

V

GS

0

FIGURE 18. SWITCHING TIME TEST CIRCUIT

FIGURE 19. RESISTIVE SWITCHING WAVEFORMS

HUFA75333G3, HUFA75333P3, HUFA75333S3S Rev. B

HUFA75333G3, HUFA75333P3, HUFA75333S3S

PSPICE Electrical Model

.SUBCKT HUFA75333 2 1 3 ;

rev 02/24/99

CA 12 8 1.8e-9

CB 15 14 1.73e-9

CIN 6 8 1.19e-9

LDRAIN

DPLCAP

DRAIN

2

5

10

RLDRAIN

DBODY 7 5 DBODYMOD

DBREAK 5 11 DBREAKMOD

DPLCAP 10 5 DPLCAPMOD

RSLC1

51

DBREAK

+

RSLC2

5

ESLC

11

51

-

50

EBREAK 11 7 17 18 58.85

EDS 14 8 5 8 1

EGS 13 8 6 8 1

ESG 6 10 6 8 1

EVTHRES 6 21 19 8 1

+

-

17

DBODY

RDRAIN

6

8

EBREAK 18

ESG

-

EVTHRES

+

16

21

+

-

EVTEMP 20 6 18 22 1

19

MWEAK

LGATE

EVTEMP

+

8

RGATE

GATE

1

6

-

18

22

MMED

IT 8 17 1

9

20

MSTRO

8

RLGATE

LDRAIN 2 5 1e-9

LGATE 1 9 1e-9

LSOURCE 3 7 1e-9

LSOURCE

CIN

SOURCE

3

7

K1 LSOURCE LGATE 0.0085

RSOURCE

RLSOURCE

MMED 16 6 8 8 MMEDMOD

MSTRO 16 6 8 8 MSTROMOD

MWEAK 16 21 8 8 MWEAKMOD

S1A

S2A

RBREAK

12

15

13

8

14

13

17

18

RBREAK 17 18 RBREAKMOD 1

RDRAIN 50 16 RDRAINMOD 4.50e-3

RGATE 9 20 1

RLDRAIN 2 5 10

RLGATE 3 7 10

RLSOURCE 3 7 11

RSLC1 5 51 RSLCMOD 1e-6

RSLC2 5 50 1e3

RSOURCE 8 7 RSOURCEMOD 5.95e-3

RVTHRES 22 8 RVTHRESMOD 1

RVTEMP 18 19 RVTEMPMOD 1

RVTEMP

19

-

S1B

S2B

13

CB

CA

IT

14

+

VBAT

6

8

5

8

EGS

EDS

+

-

8

22

RVTHRES

S1A 6 12 13 8 S1AMOD

S1B 13 12 13 8 S1BMOD

S2A 6 15 14 13 S2AMOD

S2B 13 15 14 13 S2BMOD

VBAT 22 19 DC 1

ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*180),4))}

.MODEL DBODYMOD D (IS = 1.3e-12 RS =0.003 TRS1 = 2.7e-3 TRS2 = 7e-7 CJO = 1.7e-9 TT = 40e-8 M = 0.45 IKF= 20 XTI= 6)

.MODEL DBREAKMOD D (RS = 0.1e- 1TRS1 = -4e- 4TRS2 = 1.55e-5 IKF= 1e-5)

.MODEL DPLCAPMOD D (CJO = 1.8e- 9IS = 1e-3 0N = 1 M = 0.9 vj= 1.45)

.MODEL MMEDMOD NMOS (VTO = 3.183 KP = 2 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 1)

.MODEL MSTROMOD NMOS (VTO = 3.66 KP = 51.5 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)

.MODEL MWEAKMOD NMOS (VTO = 2.703 KP = 0.008 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 10 )

.MODEL RBREAKMOD RES (TC1 = 1.05e- 3TC2 = 4.5e-7)

.MODEL RDRAINMOD RES (TC1 = 1.16e-2 TC2 = 1.7e-5)

.MODEL RSLCMOD RES (TC1 = 3.96e-3 TC2 = 2.7e-6)

.MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 1e-5)

.MODEL RVTHRESMOD RES (TC = -2.8e-3 TC2 = -1.0e-6)

.MODEL RVTEMPMOD RES (TC1 = -2.75e- 3TC2 = 0.5e-6)

.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -8 VOFF= -3)

.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3 VOFF= -8)

.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0 VOFF= 0.5)

.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.5 VOFF= 0)

.ENDS

NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global

Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.

HUFA75333G3, HUFA75333P3, HUFA75333S3S Rev. B

HUFA75333G3, HUFA75333P3, HUFA75333S3S

SABER Electrical Model

REV August 1997

template HUFA75333 n2, n1, n3

electrical n2, n1, n3

{

var i iscl

d..model dbodymod = (is = 1.3e-12, xti = 6, cjo = 1.7e-9, tt = 40e-8, n = 1, m = 0.45, vj=0.75)

d..model dbreakmod = ()

d..model dplcapmod = (cjo = 1.8e-9, is = 1e-30, n = 1, m = 0.9, vj = 1.45, fc=0.5)

m..model mmedmod = (type=_n, vto = 3.183, kp = 2, is = 1e-30, tox = 1)

LDRAIN

RLDRAIN

RDBODY

m..model mstrongmod = (type=_n, vto = 3.66, kp = 51.5, is = 1e-30, tox = 1)

m..model mweakmod = (type=_n, vto = 2.703, kp = 8e-3, is = 1e-30, tox = 1)

sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -8, voff = -3)

sw_vcsp..model s1bmod = (ron = 1e-5, roff = 0.1, von = -3, voff = -8)

sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = 0, voff = .5)

sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = .5, voff = 0)

DPLCAP

DRAIN

2

5

10

RSLC1

51

RDBREAK

72

DBREAK

11

RSLC2

ISCL

c.ca n12 n8 = 1.8e-9

c.cb n15 n14 = 1.73e-9

c.cin n6 n8 = 1.19e-9

50

-

71

RDRAIN

6

8

ESG

d.dbody n7 n71 = model=dbodymod

d.dbreak n72 n11 = model=dbreakmod

d.dplcap n10 n5 = model=dplcapmod

EVTHRES

+

16

21

-

19

8

MWEAK

LGATE

EVTEMP

+

DBODY

RGATE

GATE

1

6

-

18

22

EBREAK

+

MMED

i.it n8 n17 = 1

9

20

MSTRO

8

17

18

-

RLGATE

l.ldrain n2 n5 = 1e-9

l.lgate n1 n9 = 1e-9

l.lsource n3 n7 = 1e-9

LSOURCE

CIN

SOURCE

3

7

RSOURCE

m.mmed n16 n6 n8 n8 = model=mmedmod, l = 1u, w = 1u

m.mstrong n16 n6 n8 n8 = model=mstrongmod, l = 1u, w = 1u

m.mweak n16 n21 n8 n8 = model=mweakmod, l = 1u, w = 1u

RLSOURCE

S1A

S2A

14

13

S2B

RBREAK

12

15

13

17

18

8

res.rbreak n17 n18 = 1, tc1 = 1.07e-3, tc2 = 4.5e-7

res.rdbody n71 n5 = 3e-3, tc1 = 2.7e-3, tc2 = 7e-7

res.rdbreak n72 n5 = 1.1e-1, tc1 = -4e-4, tc2 = -1.55e-5

res.rdrain n50 n16 = 4.5e-3, tc1 = 1.16e-2, tc2 = 1.7e-5

res.rgate n9 n20 = 1

res.rldrain n2 n5 = 10

res.rlgate n1 n9 = 10

res.rlsource n3 n7 = 10

res.rslc1 n5 n51 = 1e-6, tc1 = 3.96e-3, tc2 = 2.7e-6

res.rslc2 n5 n50 = 1e3

RVTEMP

19

S1B

13

CB

CA

IT

14

-

+

VBAT

6

8

5

8

EGS

EDS

+

-

8

22

RVTHRES

res.rsource n8 n7 = 5.95e-3, tc1 = 1e-3, tc2 = 1e-5

res.rvtemp n18 n19 = 1, tc1 = -2.75e-3, tc2 = 0.5e-6

res.rvthres n22 n8 = 1, tc1 = -2.8e-3, tc2 = -1e-6

spe.ebreak n11 n7 n17 n18 = 58.85

spe.eds n14 n8 n5 n8 = 1

spe.egs n13 n8 n6 n8 = 1

spe.esg n6 n10 n6 n8 = 1

spe.evtemp n20 n6 n18 n22 = 1

spe.evthres n6 n21 n19 n8 = 1

sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod

sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod

sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod

sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod

v.vbat n22 n19 = dc = 1

equations {

i (n51->n50) + = iscl

iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/180))** 4))

}

HUFA75333G3, HUFA75333P3, HUFA75333S3S Rev. B

HUFA75333G3, HUFA75333P3, HUFA75333S3S

SPICE Thermal Model

JUNCTION

th

REV January 1999

HUFA75333

CTHERM1 th 6 4.9e-4

CTHERM2 6 5 4.5e-3

CTHERM3 5 4 6.0e-3

CTHERM4 4 3 8.5e-3

CTHERM5 3 2 1.0e-2

CTHERM6 2 tl 5.0e-2

RTHERM1

RTHERM2

RTHERM3

RTHERM4

RTHERM5

RTHERM6

CTHERM1

CTHERM2

CTHERM3

CTHERM4

CTHERM5

CTHERM6

6

RTHERM1 th 6 6.0e-4

RTHERM2 6 5 6.8e-3

RTHERM3 5 4 3.3e-2

RTHERM4 4 3 9.7e-2

RTHERM5 3 2 3.3e-1

RTHERM6 2 tl 3.6e-1

5

SABER Thermal Model

SABER thermal model HUFA75333

template thermal_model th tl

thermal_c th, tl

{

ctherm.ctherm1 th 6 = 4.9e-4

ctherm.ctherm2 6 5 = 4.5e-3

ctherm.ctherm3 5 4 = 6.0e-3

ctherm.ctherm4 4 3 = 8.5e-3

ctherm.ctherm5 3 2 = 1.0e-2

ctherm.ctherm6 2 tl = 5.0e-2

4

3

2

rtherm.rtherm1 th 6 = 6.0e-4

rtherm.rtherm2 6 5 = 6.8e-3

rtherm.rtherm3 5 4 = 3.3e-2

rtherm.rtherm4 4 3 = 9.7e-2

rtherm.rtherm5 3 2 = 3.3e-1

rtherm.rtherm6 2 tl = 3.6e-1

}

tl

CASE

HUFA75333G3, HUFA75333P3, HUFA75333S3S Rev. B

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is

not intended to be an exhaustive list of all such trademarks.

â

SMART START™

STAR*POWER™

Stealth™

VCX™

FAST

ACEx™

Bottomless™

CoolFET™

OPTOLOGIC™

OPTOPLANAR™

PACMAN™

FASTr™

FRFET™

SuperSOT™-3

SuperSOT™-6

SuperSOT™-8

SyncFET™

GlobalOptoisolator™

GTO™

HiSeC™

ISOPLANAR™

LittleFET™

MicroFET™

MicroPak™

MICROWIRE™

CROSSVOLT™

DenseTrench™

DOME™

POP™

Power247™

PowerTrench^â

QFET™

EcoSPARK™

E²CMOS^TM

TinyLogic™

QS™

EnSigna^TM

TruTranslation™

UHC™

QT Optoelectronics™

Quiet Series™

SILENTSWITCHER^â

FACT™

FACT Quiet Series™

UltraFET^â

STAR*POWER is used under license

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD

DOES NOT ASSUME ANY LIABILITYARISING OUT OF THE APPLICATION OR USE OFANY PRODUCT

OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT

RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICESORSYSTEMSWITHOUTTHEEXPRESSWRITTENAPPROVALOFFAIRCHILDSEMICONDUCTORCORPORATION.

As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, or (c) whose

failure to perform when properly used in accordance

with instructions for use provided in the labeling, can be

reasonably expected to result in significant injury to the

user.

2. A critical component is any component of a life

support device or system whose failure to perform can

be reasonably expected to cause the failure of the life

support device or system, or to affect its safety or

effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or

In Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Rev. H4

型号:	HUFA75333P3
生命周期：	Transferred
包装说明：	FLANGE MOUNT, R-PSFM-T3
Reach Compliance Code：	unknown
ECCN代码：	EAR99
风险等级：	5.25
外壳连接：	DRAIN
配置：	SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压：	55 V
最大漏极电流 (ID)：	66 A
最大漏源导通电阻：	0.016 Ω
FET 技术：	METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码：	TO-220AB
JESD-30 代码：	R-PSFM-T3
元件数量：	1
端子数量：	3
工作模式：	ENHANCEMENT MODE
封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR
封装形式：	FLANGE MOUNT
极性/信道类型：	N-CHANNEL
认证状态：	Not Qualified
表面贴装：	NO
端子形式：	THROUGH-HOLE
端子位置：	SINGLE
晶体管应用：	SWITCHING
晶体管元件材料：	SILICON
Base Number Matches：	1

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