X51638
CPU Supervisor with 16Kb SPI EEPROM
FEATURES
• Extended Power-On Reset (800ms Nominal)
• Selectable Watchdog Timer
• Low Vcc Detection and Reset Assertion
—Five Standard Reset Threshold Voltages
—Re-program Low Vcc Reset Threshold Voltage
using special programming sequence
—Reset Signal Valid to Vcc=1V
• Determine Watchdog or Low Voltage Reset with
a Volatile Flag bit
• Long Battery Life With Low Power Consumption
—<50
m
A Max Standby Current, Watchdog On
—<1
m
A Max Standby Current, Watchdog Off
—<400
m
A Max Active Current during Read
• 16Kbits of EEPROM
• Built-in Inadvertent Write Protection
—Power-Up/Power-Down Protection Circuitry
—Protect 0, 1/4, 1/2 or all of EEPROM Array with
Block Lock
TM
Protection
—In Circuit Programmable ROM Mode
• 2MHz SPI Interface Modes (0,0 & 1,1)
• Minimize EEPROM Programming Time
—32 Byte Page Write Mode
—Self-Timed Write Cycle
—5ms Write Cycle Time (Typical)
• 1.8V to 3.6V, 2.7V to 5.5V and 4.5V to 5.5V Power
Supply Operation
• Available Packages
—14-Lead TSSOP, 8-Lead SOIC
BLOCK DIAGRAM
WATCHDOG TRANSITION
DETECTOR
WATCHDOG
TIMER RESET
DESCRIPTION
This device combines four popular functions, Power-on
Reset Control, Watchdog Timer, Supply Voltage Supervi-
sion, and Block Lock™ Protect Serial EEPROM in one
package. This combination lowers system cost, reduces
board space requirements, and increases reliability.
Applying power to the device activates a power on reset
circuit which holds RESET active for a period of time.
This allows the power supply and oscillator to stabilize
before the processor can execute code. This device
allows 800ms before releasing the controller.
The Watchdog Timer provides an independent protection
mechanism for microcontrollers. When the microcontrol-
ler fails to restart a timer within a selectable time-out
interval, the device activates the RESET signal. The user
selects the interval from three preset values. Once
selected, the interval does not change, even after cycling
the power.
The X51638 low Vcc detection circuitry protects the
user’s system from low voltage conditions, resetting the
system when Vcc falls below the minimum Vcc trip point.
RESET is asserted until Vcc returns to proper operating
level and stabilizes. Five industry standard V
TRIP
thresh-
olds are available, however, Xicor’s unique circuits allow
the thresold to be reprogrammed to meet custom
requirements or to fine-tune the threshold for applications
requiring higher precision.
WP
SI
SO
SCK
CS/WDI
DATA
REGISTER
COMMAND
CONTROL
LOGIC
VCC THRESHOLD
RESET LOGIC
PROTECT LOGIC
RESET
STATUS
REGISTER
RESET &
WATCHDOG
TIMEBASE
4K BITS
8K BITS
EEPROM ARRAY
DECODE &
4K BITS
V
CC
V
TRIP
+
-
POWER ON AND
LOW VOLTAGE
RESET
GENERATION
Ó
Xicor, Inc. 1999 Patents Pending
9900-3002.10 2/12/99 T0/C0/D0
1
Characteristics subject to change without notice
ETC [ ETC ]
