Real time clock module
Register table
Address
Switching characteristic
Data
Remarks
b
2
16 Hz
b
1
32 Hz
b
0
64 Hz
Measuring condition
Input pulse level: 0.8 to 2.4V
Input rise time, fall time: 5 nsec.
IN/OUT timing pulse level: 1.5V
Out put load: 1 TTL Gate +100pF
b
7
∗
0
1
2
3
4
5
6
7
8
9
A
B
C
D
b
6
1 Hz
b
5
2 Hz
b
4
4 Hz
b
3
8 Hz
10-sec. digit
10-min. digit
10-hour digit
∗
∗
∗
10-day digit
10-month
∗
digit
10-year digit
2 Hz
4 Hz
1 Hz
10-sec. digit
10-min. digit
∗
10-hour digit
∗
10-day digit
∗
∗
ENB
1-sec. digit
1-min. digit
1-hour digit
Day-of-week digit
1-day digit
1-month digit
1-year digit
8 Hz 16 Hz 32 Hz 64 Hz
1-sec. digit
1-min. digit
1-hour digit
Day-of-week digit
1-day digit
∗
Alarm
flag
Counter
Read mode
Item
Read cycle time
Alarm
register
Address access time
Chip select access time
Output enable access time
Output hold time
Control
register
Chip select / output set time
Output enable / output set time
Chip deselect / output floating
Output disable / output floating
t
RC
Address
Symbol
t
RC
t
AA
t
ACS
t
OE
t
OH
t
CLZ
t
OLZ
t
CHZ
t
OHZ
Min.
85
Max.
—
85
Unit
—
45
10
—
5
0
35
ns
E
Carry
flag
Carry
Alarm
interruption interruption
enable
enable
F
∗1
S.START
RAM7 RAM6 RAM5 RAM4 TEST
30-sec.
RESET
adjustment
/STOP
∗1
Be sure to enter “O” to TEST bit.
Supplement
Bit name
∗
mark
Description
Empty bit and unwriteable
Recognized as “0” while reading
Only for 24H mode
Read only (unwriteable)
Used as binary code data
t
AA
t
OH
OE
V
OL
V
OL
10-hour digit (b
5
)
Under-sec.
counter
Under-sec.
alarm register
Sec.to year
Day of week
t
OE
t
OLZ
CS
V
OL
V
OL
t
OH
t
OHZ
t
OHZ
Used as binary code data
Both counter and alarm register use BCD code
Coded data is used
EX: 0…Sunday
1…Monday
4…Thursday 5…Friday
D
OUT
t
ACS
t
CHZ
Data valid
2…Tuesday 3…Wednesday
6…Saturday
Write mode
Item
Write cycle time
Chip select time
Symbol
t
WC
t
CW
t
AW
t
AS
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OHZ
t
OW
t
WC
Address
Note: Do not enter erroneous data for clock. This may result in time keeping error.
Min.
85
75
0
60
10
0
40
0
Max.
Unit
Block diagram
OSC
32.768 KH
Z
16 KHz
2 KHz
32 Hz
8 KHz
1 KHz
16 Hz
4 KHz
512 Hz
8 KHz
256 Hz
4 Hz
128 Hz
2 Hz
64 Hz
1 Hz
1 Hz
Address valid time
Address setup time
Write pulse time
—
ns
H • START / STOP
64 Hz register / counter
Sec. register / counter
Min. register / counter
Hour register / counter
Day-of-week register / counter
Day register / counter
Month register / counter
Year register / counter
Alarm comparison circuit
Address holding time
___
WE output floating
Input data set time
Input data hold time
Output disable / output floating
___
WE output set time
IRQ
35
—
35
5
—
64 Hz alarm. register
Sec. alarm. register
Min. alarm. register
Hour alarm. register
Day-of-week alarm. register
Day alarm. register
t
W-R
OE
Control register A
Control register B
Write
Read
Bus interface circuit
t
CW
CS
WE
t
AS
t
AW
t
OHZ
D
OUT
I/0
1
to I/0
3
Data bus
A
0
to A
3
Address bus
CS
OE
WE
t
WP
t
DW
t
DH
D
IN
70
ETC [ ETC ]
