RTL8201CP
Datasheet
6.10. Register 18 RX_ER Counter (REC)
Address
18:15~0
Name
RXERCNT
Table 18. Register 18 RX_ER Counter (REC)
Description
This 16-bit counter increments by 1 for each valid packet received.
Mode
RW
Default
H’[0000]
6.11. Register 19 SNR Display Register
Address
19:15~4
19:3~0
Name
Reserved
SNR
Table 19. Register 19 SNR Display Register
Description
Realtek Test Mode Internal use. Do not change this field without
Realtek’s approval.
These 4-bits show the Signal to Noise Ratio value.
Mode
Default
RW
0000
6.12. Register 25 Test Register
Address
25:15~12
25:11~7
25:6~2
25:1
25:0
Name
Test
PHYAD[4:0]
Test
LINK10
LINK100
Table 20. Register 25 Test Register
Description
Reserved for internal testing.
Reflects the PHY address defined by external PHY address
configuration pins.
Reserved for internal testing.
1: 10Base-T link established
0: No 10Base-T link established
1: 100Base-FX or 100Base-TX link established
0: No 100Base link established
Mode
RW
RO
RO
RO
RO
Default
00001
0
0
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
13
Track ID: JATR-1076-21 Rev. 1.21
ETC [ ETC ]
