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SY100EP210UTI 参数 Datasheet PDF下载

SY100EP210UTI图片预览
型号: SY100EP210UTI
PDF下载: 下载PDF文件 查看货源
内容描述: 10个分发输出时钟驱动器| ECL100 | TQFP | 32引脚|塑料\n [TEN DISTRIBUTED-OUTPUT CLOCK DRIVER|ECL100|TQFP|32PIN|PLASTIC ]
分类和应用: 时钟驱动器输出元件
文件页数/大小: 8 页 / 93 K
品牌: ETC [ ETC ]
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2.5V/3.3V DUAL 1:5 DIFFERENTIAL
LVECL/LVPECL/HSTL
CLOCK DRIVER
FEATURES
s
2.5V and 3.3V power supply options
s
Guaranteed AC parameters over temperature:
• f
MAX
> 3.0GHz
• < 35ps within-device skew
• < 350ps t
r
/ t
f
• < 490ps propagation delay (differential)
s
Wide temperature range: –40
°
C to +85
°
C
ClockWorks™
SY100EP210U
DESCRIPTION
The SY100EP210U is a high-speed, precision low skew
1-to-5 dual differential clock driver. HSTL inputs can be
used when the EP210U is operating in PECL mode.
The EP210U specifically guarantees critical AC
parameters over temperature and voltage. Optimal design,
layout, and processing minimize skew within device and
from device-to-device.
The SY100EP210U, as with most other ECL devices,
can be operated from a positive V
CC
supply in PECL mode.
This allows the EP210U to be used for high performance
clock distribution in +3.3V or +2.5V systems. Single-ended
input operation is limited to a V
CC
3.0V in PECL mode, or
V
EE
–3.0V in ECL mode.
Designers can take advantage of the EP210U’s
performance to distribute low skew clocks across the
backplane or to multiple points on a board.
s
Differential design
s
V
BB
output
s
Fully compatible with industry standard 100K I/O
levels
s
Available in 32-pin TQFP Package
BLOCK DIAGRAM
Qa0
/Qa0
Qa1
CLKa
75kΩ
V
EE
Qb0
/Qb0
Qb1
CLKb
/CLKb
75kΩ
V
EE
/Qa1
Qa2
/Qb1
Qb2
/CLKa
75kΩ
V
EE
V
CC
75kΩ
75kΩ
V
CC
V
EE
75kΩ
/Qa2
Qa3
/Qa3
Qa4
/Qa4
/Qb2
Qb3
/Qb3
Qb4
VBB
/Qb4
Rev.: A
Amendment: /2
1
Issue Date: August 2001