MITSUBISHI MICROCOMPUTERS
4250 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
(5) Port F (F
0
, F
1
)
2-bit I/O port.
For input use, set the latch of the specified bit to “1.” The output
structure is the N-channel open-drain.
(6) Port S (S
0
–S
3
)
4-bit I/O port.
Port S has the logic operation (LGOP) function. For input (logic
operation included) use, set the latch of the specified bit to
“1.” The output structure is the N-channel open-drain. When
performing the logic operation, select the logic operation
function with the logic operation selection register LO. Set the
contents of register LO through register A with the TLOA
instruction.
When the LGOP instruction is executed, the logic operation
selected with the register LO is performed between the
contents of register A and the contents of port S, and its result
is stored in register A.
Logic operation selection register
Logic operation selection register LO
LO
1
Logic operation function selection bits
LO
0
Note: “W” represents write enabled.
at reset : 00
2
LO
1
LO
0
0 XOR operation
0
1 OR operation
0
1
1
0 AND operation
1 Not available
at RAM back-up : 00
2
Functions
W
8
ETC [ ETC ]
