The circuit shows how a 0 to 5 V logic signal can be level
shifted to a -15 to 0 V signal. This circuit can safely be
used for level shifting up to
±800
V. The circuit uses an
open collector output logic gate, the 74LS405, to drive the
LED of the HCPL-4502/3 optocoupler. The HCPL-4502/3 also
has an open-collector output. The designer chooses RIN
to agree with the equation shown in the schematic. This
equation sets the value of the optocoupler LED forward
current. The output of the HCPL-4502/3 requires a pull-up
resistor, RL. The current-transfer ratio (CTR) of the
optocoupler determines the maximum amount of current
the optocoupler output can sink while maintaining the
output voltage (between pins 5 and 6) of 0.5 V or less.
The benefits of the application is that it reduces transient
immunity problem and is a convenient way of replacing
pulse transformer for high-voltage level shifting.
Typical applications include:
• High Speed Logic Ground Isolation
• Replace slow Phototransistor Isolators
• Replace Pulse Transformers
• Line Receivers
• Analog Signal Ground Isolation
Typical Level Shifting/TTL Interface Block Diagram
+5 V
HCPL-4502/3
R
IN
I
F
V
IN
74LS05
1
8
2
7
I
O
R
L
I
IL
V
OUT
V
OL
I
O
(min) = I
F
• CTR (min)
R
L
(min) = 15 – V
OL
O
I(min) + I
IL
3
6
4
R
IN
= 5 - V
F
I
F
5
-15 V
NOTE: FOR BEST CMR PERFORMANCE, CONNECT PIN 7 TO PIN 8.
ETC [ ETC ]
