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产品型号LT1249CS8的概述

LT1249CS8芯片概述 LT1249CS8是一款由Linear Technology（现在已被Analog Devices收购）生产的高性能运算放大器，广泛应用于各种模拟信号处理的场合。该芯片专为低噪声、高频率和高电源供电范围所设计，适合用于精密仪器、数据采集、音频应用等多个领域。 LT1249CS8的设计特点在于其高增益带宽积、低输入失调电压和非常低的噪声特性。运算放大器的核心功能在于对输入信号进行放大，而LT1249CS8的高增益和出色的线性特性，使其适合高精度的信号处理任务。 LT1249CS8的详细参数 LT1249CS8的详细电气参数如下： - 最大供电电压(VCC)：±2V至±15V - 增益带宽积 (GBP)：25 MHz - 最大输出电流：50 mA - 输入失调电压：100 µV - 输入失调电流：10 nA - 共模拒绝比 (CMRR)：110 dB - 功率带...

产品型号LT1249CS8的Datasheet PDF文件预览

LT1249

Power Factor Controller

FEATURES

DESCRIPTIO

The 8-pin LT^®1249 provides active power factor correc-

tion for universal offline power systems with very few

externalparts.ByusingfixedhighfrequencyPWMcurrent

averaging without the need for slope compensation, the

LT1249 achieves far lower line current distortion, with a

smallermagneticelementthansystemsthatuseeitherpeak

current detection or zero current switching approach, in

both continuous and discontinuous modes of operation.

■

Standard 8-Pin Packages

■

High Power Factor Over Wide Load Range

with Line Current Averaging

■

International Operation Without Switches

■

Instantaneous Overvoltage Protection

■

Minimal Line Current Dead Zone

■

Typical 250µA Start-Up Supply Current

■

Rejects Line Switching Noise

■

Synchronization Capability

The LT1249 uses a multiplier containing a square gain

function from the voltage amplifier to reduce the AC gain

at light output load and thus maintains low line current

distortion and high system stability. The LT1249 also

provides filtering capability to reject line switching noise

which can cause instability when fed into the multiplier.

Line current dead zone is minimized with low bias voltage

at the current input to the multiplier.

■

Low Quiescent Current: 9mA

■

Fast 1.5A Peak Current Gate Driver

APPLICATIO S

■

Universal Power Factor Corrected Power Supplies

Preregulators up to 1500W

■

The LT1249 provides many protection features including

peak current limiting and overvoltage protection. The

switching frequency is internally set at 100kHz.

While the LT1249 simplifies PFC design with minimal

parts count, the LT1248 provides flexibilities in switching

frequency, overvoltage and current limit.

, LTC and LT are registered trademarks of Linear Technology Corporation.

BLOCK DIAGRA

GND

OUT

7.5V

REF

MOUT

–

7.5V

SENSE

–

RUN

250µA MAX

16V/10V

MULTIPLIER

²I

32k

200µA²

–

GTDR

15µA

= 1/3k

RUN

0.7V

–

OSC

–

SYNC

16V

44µA

22µA

20µA

35pF

1249 BD

LT1249

W W U W

W U

ABSOLUTE MAXIMUM RATINGS

PACKAGE/ORDER INFORMATION

Supply Voltage ....................................................... 27V

GTDR Current Continuous ..................................... 0.5A

GTDR Output Energy (Per Cycle) ............................. 5µJ

ORDER PART

NUMBER

TOP VIEW

GND

GTDR

LT1249CN8

LT1249IN8

LT1249CS8

LT1249IS8

I_ACInput Current ................................................. 20mA

OUT

V_SENSEInput Voltage ............................................ V_MAX

M_OUTInput Current.............................................. ±5mA

Operating Junction Temperature Range

SENSE

OUT

N8 PACKAGE

8-LEAD PDIP

LT1249C................................................ 0°C to 100°C

LT1249I ........................................... –40°C to 125°C

Thermal Resistance (Junction-to-Ambient)

N8 Package ................................................ 100°C/W

S8 Package................................................. 120°C/W

Storage Temperature Range ..................–65°C to 150°C

Lead Temperature (Soldering, 10 sec)................. 300°C

S8 PART

MARKING

S8 PACKAGE

8-LEAD PLASTIC SO

T_JMAX= 125°C, θ_JA= 100°C/W (N8)

_JMAX= 125°C, θ_JA= 120°C/W (S8)

1249

1249I

Consult factory for Military grade parts.

The ● denotes specifications which apply over the operating temperature

ELECTRICAL CHARACTERISTICS

range, otherwise specifications are at T_A= 25°C. Maximum operating voltage (V_MAX) = 25V, V_CC= 18V, I_AC= 100µA, CA_OUT= 3.5V,

VA_OUT= 5V, no load on any outputs, unless otherwise noted.

PARAMETER

Overall

CONDITIONS

MIN

TYP

MAX

UNITS

Supply Current (V in Undervoltage Lockout)

Supply Current, On

= Lockout Voltage – 0.2V

●

0.25

16.5

10.5

0.45

17.5

11.5

11.5V ≤ V ≤ V

, CA

= 1V

MAX

OUT

Turn-On Threshold

Turn-Off Threshold

15.5

9.5

Voltage Amplifier

Bias Current

Voltage Amp Gain

Voltage Amp Unity-Gain Bandwidth

Voltage Amp Output High

Voltage Amp Output Low

Voltage Amp Source Current

Voltage Amp Sink Current Threshold

Voltage Amp Sink Current Hysteresis

Current Amplifier

= 0V to 7V

SENSE

●

–25

100

1.5

0.1

260

–250

MHz

SENSE

0 ≤ Source Current ≤ 50µA

0 ≤ Sink Current ≤ 5µA

●

0.4

450

130

µA

Linear Operation, 2V < VA

2V < VA

< 10V

OUT

< 10V

22.5

OUT

Current Amp Offset Voltage

Current Amp Transconductance

Current Amp Voltage Gain

Current Amp Source Current

Current Amp Sink Current

Current Amp Output High

Current Amp Output Low

●

±2

320

1000

145

±15

550

µmho

V/V

µA

∆I

2.5V ≤ V

= ±40µA

150

500

100

CAOUT

≤ 7.5V

CAOUT

= 1V, I = 0µV

220

125

MOUT

= –0.3V, I = 0µA

µA

7.4

8.1

1.2

LT1249

The ● denotes specifications which apply over the operating temperature

ELECTRICAL CHARACTERISTICS

range, otherwise specifications are at T_A= 25°C. Maximum operating voltage (V_MAX) = 25V, V_CC= 18V, I_AC= 100µA, CA_OUT= 3.5V,

VA_OUT= 5V, no load on any outputs, unless otherwise noted.

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Reference

Reference Output Voltage

Reference Output Voltage Worst Case

Reference Output Voltage Line Regulation

Multiplier

T = 25°C, Measured at V

All Line, Temperature

7.39

7.32

–20

7.5

7.6

7.68

SENSE

●

< V < V

LOCKOUT

MAX

Multiplier Output Current

Multiplier Output Current Offset

Multiplier Max Output Current (I

Multiplier Max Output Voltage (I

= 100µA, VA

= 5V

OUT

µA

kΩ

= 1M from I to GND

●

–0.05

–250

–1.1

0.035

–0.5

–150

–0.96

)

= 450µA, VA

= 7V (Note 2)

– 375

–1.25

M(MAX)

OUT

• R

)

M(MAX)

MOUT

–2

Multiplier Gain Constant (Note 3)

Input Resistance

from 50µA to 1mA

Oscillator

Oscillator Frequency

●

1.3

127

100

1.8

125

2.3

160

kHz

Control Pin (CA ) Threshold

Duty Cycle = 0

Synchronizing Pulse Low ≤ 0.35V on CA

OUT

Synchronization Frequency Range

Gate Driver

OUT

Max GTDR Output Voltage

GTDR Output High

GTDR Output Low (Device Unpowered)

GTDR Output Low (Device Active)

Peak GTDR Current

0mA Load, 18V < V < V

–200mA Load, 11.5V ≤ V ≤ 15V

(Note 4)

●

– 3.0

17.5

MAX

= 0V, 50mA Load (Sinking)

0.9

0.5

1.5

200mA Load (Sinking)

10nF from GTDR to GND

1nF from GTDR to GND

GTDR Rise and Fall Time

GTDR Max Duty Cycle

Note 3: Multiplier Gain Constant: K =

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

(VA

– 1.5)²

OUT

Note 4: Maximum GTDR output voltage is internally clamped for higher

voltages.

Note 2: Current amplifier is in linear mode with 0V input common mode.

TYPICAL PERFORMANCE CHARACTERISTICS

Voltage Amplifier Open-Loop

Transconductance of

Current Amplifier

Gain and Phase

100

400

350

300

250

200

150

100

–20

–40

–60

–80

–100

–120

–20

–40

–60

–80

–100

–120

–140

GAIN

PHASE

–20

10k 100k

10M

10k

100k

10M

100

FREQUENCY (Hz)

1249 G01

1249 G02

LT1249

TYPICAL PERFORMANCE CHARACTERISTICS

Reference Voltage vs

Temperature

Multiplier Current

7.536

7.524

7.512

7.500

7.488

7.476

7.464

7.452

7.440

7.428

300

150

= 5V

= 6.5V

OUT

= 6V

OUT

= 5.5V

= 4.5V

= 4V

OUT

= 3.5V

= 3V

OUT

= 2.5V

= 2V

OUT

125

150

250

(µA)

500

–75 –50

25 50

100

–25

JUNCTION TEMPERATURE (°C)

1249 G04

1249 G03

Supply Current vs Supply Voltage

GTDR Source Current

GTDR Sink Current

18.5

18.0

17.5

17.0

16.5

16.0

15.5

15.0

14.5

14.0

13.5

13.0

1.1

= –55°C

= 25°C

= 18V

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

= 125°C

T = 125°C

= –55°C

T = 25°C

T = –55°C

= 25°C

= 125°C

–120

–180

–240

–300

–60

10 12 14 16 18 20 22 24 26 28 30

120

180

240

300

SOURCE CURRENT (mA)

SUPPLY VOLTAGE (V)

SINK CURRENT (mA)

1249 G06

1249 G07

1249 G05

Start-Up Supply Current vs

Supply Voltage

GTDR Rise and Fall Time

Switching Frequency

400

300

200

100

550

500

450

400

350

300

250

200

150

100

140

130

120

110

100

FALL TIME

RISE TIME

–55°C

25°C

125°C

NOTE: GTDR SLEWS

BETWEEN 1V AND 16V

12 14 16 18 20

–50 –25

25 50

100 125

–75

LOAD CAPACITANCE (nF)

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

1249 G08

1249 G09

1249 G10

LT1249

TYPICAL PERFORMANCE CHARACTERISTICS

Synchronization Threshold

at CA_OUT

Transconductance of Current

Amplifier Over Temperature

M_OUTPin Characteristics

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

1.2

1.0

400

350

300

250

200

150

100

125°C

25°C

0.8

–50°C

0.6

0.4

0.2

–0.2

–0.4

–0.6

–0.8

–1.0

–50

–50 –25

125

–2.4

2.4

–1.2

–25

125

100

1.2

100

TEMPERATURE (°C)

VOLTAGE (V)

TEMPERATURE (°C)

OUT

1249 G12

1249 G11

1249 G13

Voltage Amp Sink Current Limits

(Threshold)

Maximum Multiplier Output

Voltage (I_M(MAX)• R_MOUT

)

Maximum Duty Cycle

100

–1.30

–1.25

–1.20

–1.15

–1.10

–1.05

–1.00

–0.95

–0.90

UP THRESHOLD

DOWN THRESHOLD

–75 –50 –25

25 50

100 125

–50 –25

125

–75 –50 –25

25 50

100 125

100

TEMPERATURE (°C)

NOTE: THESE SINK CURRENT THRESHOLDS ARE

FOR OVERVOLTAGE PROTECTION FUNCTION.

1249 G16

1249 G15

1249 G14

PIN FUNCTIONS

is normally at negative potential and only AC signals

appear at the noninverting input of the current amplifier.

GND (Pin 1): Ground.

CA_OUT(Pin 2): This is the output of the current amplifier

that senses and forces the line current to follow the

reference signal that comes from the multiplier by com-

manding the pulse width modulator. When CA_OUTis low,

the modulator has zero duty cycle.

I_AC(Pin 4): This is the AC line voltage sensing input to the

multiplier. It is a current input that is biased at 2V to

minimize the crossover dead zone caused by low line

voltage. A 32k resistor is in series with the current input,

so that a small external capacitor can be used to filter out

the switching noise from the high impedance lines.

M_OUT(Pin 3): The multiplier current goes out of this pin

through the 4k resistor R_MOUT. The voltage developed

across R_MOUTis the reference voltage of the current loop

and it is limited to 1.1V. The noninverting input of the

current amplifier is also tied to R_MOUT. In operation, M_OUT

VA_OUT(Pin 5): This is the output of the voltage error

amplifier. The output is clamped at 12V. When the output

goes below 1.5V, the multiplier output current is zero.

LT1249

PIN FUNCTIONS

V_SENSE(Pin 6): This is the inverting input to the voltage

amplifier.

capacitor in parallel with a low ESR electrolytic capacitor,

56µF or higher is required in close proximity to IC GND.

_CC(Pin 7): This is the supply of the chip. The LT1249 has

GTDR(Pin8):TheMOSFETgatedriverisa1.5Afasttotem

pole output. It is clamped at 15V. Capacitive loads like

MOSFET gates may cause overshoot. A gate series resis-

tor of at least 5Ω will prevent the overshoot.

a very fast gate driver required to fast charge high power

MOSFET gate capacitance. High current spikes occur

during charging. For good supply bypass, a 0.1µF ceramic

W U U

APPLICATIONS INFORMATION

Multiplier

Error Amplifier

The multiplier is a current multiplier with high noise

immunity in a high power switching environment. The

current gain is:

Theerroramplifierhasa100dBDCgainand1.5MHzunity-

gain frequency. It is internally clamped at 12V. The nonin-

verting input is tied to the 7.5V reference.

I_M= (I_AC)(I_EA²)/(200µA)², and

I_EA= (VA_OUT– 1.5V)/25k

Current Amplifier

The multiplier output current I_Mflows out of the M_OUTpin

through the 4k resistor R_MOUTand develops the reference

signal to the current loop that is controlled by the current

amplifier. Current gain is the ratio of R_MOUTto line current

senseresistor.Thecurrentamplifierisatransconductance

amplifier. Typical g_mis 320µmho and gain is 60dB with no

load. The inverting input is internally tied to GND. The

noninverting input is tied to the multiplier output. The

output is internally clamped at 8V. Output resistance is

about 4M; DC loading should be avoided because it will

lower the gain and introduce offset voltage at the inputs

which becomes a false reference signal to the current loop

and can distort line current. Note that in the current

averaging operation, high gain at twice the line frequency

is necessary to minimize line current distortion. Because

CA_OUTmayneedtoswing5Voveronelinecycleathighline

condition, 11mVwillbepresentattheinputsofthecurrent

amplifier if gain is rolled off to 450 at 120Hz (1nF in series

with10katCA_OUT). Atlightload, when(I_M)(R_MOUT)canbe

less than 100mV, lower gain will distort the current loop

reference signal and line current. If signal gain at the

100kHz switching frequency is too high, the system

behaves more like a current mode system and can cause

subharmonic oscillation. Therefore, the current amplifier

should be compensated to have a gain of less than 15 at

100kHz and more than 300 at 120Hz.

With a square function, because of the lower gain at light

power load, system stability is maintained and line current

distortion caused by the AC ripple fed back to the error

amplifier is minimized. Note that switching ripple on the

highimpedancelinescouldgetintothemultiplierfromthe

I_ACpin and cause instability. The LT1249 provides an

internal 25k resistor in series with the low impedance

multiplier current input so that only a capacitor from the

I_ACpin to GND is needed to filter out the noise. Maximum

multiplier output current is limited to 250µA. Figure 1

shows the multiplier transfer curves.

300

= 5V

= 6.5V

OUT

= 6V

OUT

= 5.5V

= 4.5V

= 4V

OUT

150

= 3.5V

= 3V

OUT

500

= 2.5V

= 2V

OUT

250

(µA)

1249 G04

Figure 1. Multiplier Current I_Mvs I_ACand VA_OUT

LT1249

W U U

APPLICATIONS INFORMATION

Line Current Limiting

With ts = 30ns, fs = 130kHz, V_C= 3V and R2 = 10k, offset

voltage shift is ≈5mV. Note that this offset voltage will add

slight distortion to line current at light load.

Maximum voltage across R_MOUTis internally limited to

1.1V. Therefore, line current limit is 1.1V divided by the

sense resistor R_S. With a 0.2Ω sense resistor R_Sline

current limit is 5.5A. As a general rule, R_Sis chosen

according

OUT

10k

1N5712

80pF

)(R

)(V

)

M(MAX)

MOUT LINE(MIN)

10k

2N2369

R =

K(1.414)P

OUT(MAX)

1nF

1249 F02

where P_OUT(MAX)is the maximum power output and K is

usually between 1.1 and 1.3 depending on efficiency and

resistor tolerance. When the output is overloaded and line

currentreacheslimit,outputvoltageV_OUTwilldroptokeep

line current constant. System stability is still maintained

by the current loop which is controlled by the current

amplifier. Further load current increase results in further

V_OUTdrop and clipping of the line current, which degrades

power factor.

Figure 2. Synchronizing the LT1249

Overvoltage Protection

In Figure 3, R1 and R2 set the regulator output DC level:

V_OUT= V_REF[(R1 + R2)/R2]. With R1 = 1M and R2 = 20k,

V_OUTis 382V.

Because of the slow loop response necessary for power

factorcorrection,outputovershootcanoccurwithsudden

load removal or reduction. To protect the power compo-

nents and output load, the LT1249 voltage error amplifier

sensestheoutputvoltageandquicklyshutsoffthecurrent

switch when overvoltage occurs. When overshoot occurs

on V_OUT, the overcurrent from R1 will go through VA_OUT

because amplifier feedback keeps V_SENSElocked at 7.5V.

When this overcurrent reaches 44µA amplifier sinking

limit, theamplifierlosesfeedbackanditsoutputsnapslow

to turn the multiplier off.

Synchronization

The LT1249 can be externally synchronized in a frequency

range of 127kHz to 160kHz. Figure 2 shows the synchro-

nizing circuit. Synchronizing occurs when CA_OUTpin is

pulledbelow0.5VwithanexternaltransistorandaSchottky

diode. The Schottky diode and the 10k pull-up resistor are

necessary for the required fast slewing back up to the

normal operating voltage on CA_OUTafter the transistor is

turned off. Positive slewing on CA_OUTshould be faster

than the oscillator ramp rate of 0.5V/µs.

Overvoltage trip level: ∆V_OUT= (44µA)(R1)

The width of the synchronizing pulse should be under

60ns. The synchronizing pulses introduce an offset volt-

age on the current amplifier inputs, according to:

0.047µF

OUT

0.47µF

330k

V − 0.5

(ts)(fs) I +

∆V =

SENSE

OUT

–

ts = pulse width

fs = pulse frequency

I_C= CA_OUTsource current (≈ 150µA)

V_C= CA_OUToperating voltage (1.8V to 6.8V)

R2 = resistorfor the midfrequency “zero” in the current loop

g_m= current amplifier transconductance (≈ 320µmho)

20k

44µA

22µA

MULTIPLIER

LT1249

REF

7.5V

1249 F03

Figure 3. Overvoltage Protection

LT1249

W U U

APPLICATIONS INFORMATION

LINE

MAIN INDUCTOR

The Figure 3 circuit therefore has 382V on V_OUT, and an

overvoltage level = (V_OUT+ 44V), or 426V. With a 22µA

hysteresis, V_OUTthen has to drop 22V to 404V before

feedback recovers and the switch turns back on.

90k

_OUTis a high impedance current output. In the current

2µF

390µF

56µF

loop, offset line current is determined by multiplier offset

current and input offset voltage of the current amplifier.

A negative 4mV current amplifier V_OStranslates into

20mA line current and 5W input power for 250V line if

0.2Ω sense resistor is used. Under no load or when the

loadpowerislessthanthisoffsetinputpower, V_OUTwould

slowly charge up to an overvoltage state because the

overvoltage comparator can only reduce multiplier output

current to zero. This does not guarantee zero output

currentifthecurrentamplifierhasoffset.Toregulate V_OUT

under this condition, the amplifier M1 (see Block Dia-

gram), becomes active in the current loop when VA_OUT

goes down to 1V. The M1 can put out up to 15µA to the 4k

resistor at the inverting input to cancel the current ampli-

fier negative V_OSand keep V_OUTerror to within 2V.

2µF

1249 F04

ALL CAPACITORS ARE RATED 35V

Figure 4. Power Supply for LT1249

1000pF

450V

MAIN INDUCTOR

LINE

90k

390µF

35V

18V

56µF

35V

1249 F05

Undervoltage Lockout

Figure 5. Power Supply for LT1249

The LT1249 turns on when V_CCis higher than 16V and

remains on until V_CCfalls below 10V, whereupon the chip

enters the lockout state. In the lockout state, the LT1249

only draws 250µA, the oscillator is off, the V_REFand the

GTDR pins remain low to keep the power MOSFET off.

auxiliary winding determines V_CCaccording to: V_OUT/(V_CC

– 2V) = N_P/N_S. For 382V V_OUTand 18V V_CC, N_P/N_S≈ 19.

In Figure 5 a new technique for supply voltage eliminates

the need for an extra inductor winding. It uses capacitor

charge transfer to generate a constant current source

which feeds a Zener diode. Current to the Zener is equal to

(V_OUT– V_Z)(C)(f), where V_Zis Zener voltage and f is

switching frequency. For V_OUT= 382V, V_Z= 18V, C =

1000pF and f = 100kHz, Zener current will be 36mA. This

is enough to operate the LT1249, including the FET gate

drive.

Start-Up and Supply Voltage

The LT1249 draws only 250µA before the chip starts at

16V on V_CC. To trickle start, a 90k resistor from the power

linetoV_CCsuppliesthetricklecurrentandC4holdstheV_CC

up while switching starts (see Figure 4). Then the auxiliary

winding takes over and supplies the operating current.

Note that D3 and the large value C3, in both Figures 4 and

5, are only necessary for systems that have sudden large

load variation down to minimum load and/or very light

load conditions. Under these conditions, the loop may

exhibitastart/restartmodebecauseswitchingremainsoff

long enough for C4 to discharge below 10V. The C3 will

hold V_CCup until switching resumes. For less severe load

variations, D3 is replaced with a short and C3 is omitted.

The turns ratio between the primary winding and the

Output Capacitor

The peak-to-peak 120Hz output ripple is determined by:

_P-P= (2)(I_LOADDC)(Z)

where I_LOADDC: DC load current

Z: capacitor impedance at 120Hz

For 180µF at 300W load, I_LOADDC = 300W/385V = 0.78A,

LT1249

W U U

APPLICATIONS INFORMATION

V_P-P= (2)(0.78A)(7.4Ω) = 11.5V. If less ripple is desired,

The 120Hz ripple current rating at 105°C ambient is 0.95A

forthe180µFKMH400Vcapacitor.Theexpectedlifeofthe

output capacitor may be calculated from the thermal

stress analysis:

higher capacitance should be used.

The selection of the output capacitor should also be based

on the operating ripple current through the capacitor.

(105°C+∆T )–(T

+∆T )

The ripple current can be divided into three major compo-

nents. The first is at 120Hz whose RMS value is related to

the DC load current as follows:

AMB

L = (L )(2)

where

L = expected life time

I_1RMS≈ (0.71)(I_LOADDC)

The second component contains the PF switching fre-

quency ripple current and its harmonics. Analysis of this

rippleiscomplicatedbecauseitismodulatedwitha120Hz

signal.However,computernumericalintegrationandFou-

rier analysis approximate the RMS value reasonably close

to the bench measurements. The RMS value is about

0.82A at a typical condition of 120VAC, 200W load. This

ripple is line voltage dependent, and the worst case is at

low line.

L_O= hours of load life at rated ripple current and rated

ambient temperature

∆T_K= capacitor internal temperature rise at rated condi-

tion. ∆T_K= (I²R)/(KA), where I is the rated current, R is

capacitor ESR, and KA is a volume constant.

T_AMB= operating ambient temperature

∆T_O= capacitor internal temperature rise at operating

condition

I_2RMS= 0.82A at 120VAC, 200W

In our example, L_O= 2000 hours and ∆T_K= 10°C at rated

0.95A. ∆T_Ocan then be calculated from:

The third component is the switching ripple from the load,

if the load is a switching regulator.

0.77A

0.95A

RMS

∆T =

(∆T ) =

(10°C) = 6.6°C

I_3RMS≈ I_LOADDC

0.95A

For United Chemicon KMH 400V capacitor series, ripple

current multiplier for currents at 100kHz is 1.43. The

equivalent 120Hz ripple current can then be found:

Assuming the operating ambient temperature is 60°C, the

approximate life time is:

(105°C+10°C)–(60°C+6.6°C)

L ≈ (2000)(2)

)

I_2RMS

1.43

I_3RMS

1.43

≈ 57,000 Hrs.

I_RMS= I

(

1RMS

For longer life, capacitor with higher ripple current rating

or parallel capacitors should be used.

For a typical system that runs at an average load of 200W

and 385V output:

Protection Against Abnormal Current Surge

Conditions

I_LOADDC = 0.52A

I_1RMS≈ (0.71)(0.52A) = 0.37A

I_2RMS≈ 0.82A at 120VAC

I_3RMS≈ I_LOADDC = 0.52A

The LT1249 has an upper limit on the allowed voltage

across the current sense resistor. The voltage into the

_OUTpin connected to this resistor must not exceed –6V

while the chip is running and –12V under any conditions.

The LT1249 gate drive will malfunction if the M_OUTpin

voltage exceeds –6V while V_CCis powered, destroying the

power FET. The 12V absolute limit is imposed by ESD

clamps on the M_OUTpin. Large currents will flow at

)

0.82A

1.43

0.52A

1.43

I_RMS

0.37A +

= 0.77A

(

LT1249

W U U

APPLICATIONS INFORMATION

voltages above 8V and the 12V limit is only for surge

resistor, the standard LT1249 application will not be

affectedbecausethechipisnotyetpowered.Problemsare

only created if the V_CCpin is powered from some external

housekeeping supply that remains powered when bridge

power is switched off.

conditions.

In normal operation, the voltage into M_OUTdoes not

exceed 1.1V, but under surge conditions, the voltage

could temporarily go higher. To date, no field failures due

to surges have been reported for normal LT1249 configu-

rations, but if the possibility exists for extremely large

current surges, please read the following discussion.

A huge line voltage surge, beyond the normal worst-case

limits, can also create a large current surge. The peak of

the line voltage must significantly exceed the storage

capacitorvoltage(typically380V)forthistooccur,sopeak

line voltage would probably have to exceed 450V. Such

excessive surges might occur if a very large mains load

was suddenly removed, with a resulting line “kickback”. If

the surge results in voltage at the M_OUTpin greater than

6V, it must also last more than 30µs (three switch cycles)

to cause FET problems.

Offline switching power supplies can create large current

surges because of the high value storage capacitor used.

The surge can be the result of closing the line switch near

the peak of the AC line voltage, or because of a large

transient in the line itself. These surges are well known in

the power supply business, and are normally controlled

with a negative temperature coefficient thermistor in

series with the rectifier bridge. When power is switched

on, the thermistor is cold (high resistance) and surges are

limited. Currentflowinthethermistorcausesittoheatand

resistance drops to the point where overall efficiency loss

in the resistor is acceptable.

External Clamp

The external clamp shown in Figure 6 will protect the

LT1249 M_OUTpin against extremely large line current

surges (see above). Protection is provided for all V_CC

power methods. The 100Ω resistor and three diodes limit

the peak negative voltage into M_OUTto less than 3V.

Current sense gain is attenuated by only 100Ω/4000Ω =

2.5%. Three diodes are used because the peak negative

voltage into M_OUTin normal operation could go as high as

–1.1V and the diodes should not conduct more than a few

microamps under this condition.

This basic protection mechanism can be partially defeated

if the power supply is switched off for a few seconds, then

turned back on. The thermistor has not had time to cool

significantly and if the subsequent turn-on catches the AC

line near its peak, the resulting surge is much higher than

normal. Even if this surge current generates a voltage

greater than 6V (but less than 12V) across the sense

THERMISTOR

STORAGE

CAPACITOR

BRIDGE

SURGE PATH

–

100Ω

OUT

LT1249

Figure 6. Protecting M_OUTfrom Extremely High Current Surges

LT1249

PACKAGE DESCRIPTION

Dimensions in inches (millimeters) unless otherwise noted.

N8 Package

8-Lead PDIP (Narrow 0.300)

(LTC DWG # 05-08-1510)

0.400*

(10.160)

MAX

0.255 ± 0.015*

(6.477 ± 0.381)

0.130 ± 0.005

0.300 – 0.325

0.045 – 0.065

(3.302 ± 0.127)

(1.143 – 1.651)

(7.620 – 8.255)

0.065

(1.651)

TYP

0.009 – 0.015

(0.229 – 0.381)

0.125

0.020

(0.508)

MIN

(3.175)

MIN

+0.035

0.325

–0.015

0.018 ± 0.003

(0.457 ± 0.076)

0.100

(2.54)

BSC

+0.889

8.255

(

)

N8 1098

–0.381

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)

S8 Package

8-Lead Plastic Small Outline (Narrow 0.150)

(LTC DWG # 05-08-1610)

0.189 – 0.197*

(4.801 – 5.004)

0.150 – 0.157**

(3.810 – 3.988)

0.228 – 0.244

(5.791 – 6.197)

0.010 – 0.020

(0.254 – 0.508)

× 45°

0.053 – 0.069

(1.346 – 1.752)

0.004 – 0.010

(0.101 – 0.254)

0.008 – 0.010

(0.203 – 0.254)

0°– 8° TYP

0.016 – 0.050

(0.406 – 1.270)

0.050

(1.270)

BSC

0.014 – 0.019

(0.355 – 0.483)

TYP

*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

SO8 1298

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.

LT1249

TYPICAL APPLICATION

MURH860

750µH*

OUT

90V

270V

EMI

FILTER

–

IRF840

100pF

180µF

0.047µF

0.47µF

20k

0.2Ω

1nF

10k

10Ω

330k

†

GND

OUT

7.5V

REF

MOUT

7.5V

–

RUN

–

MAX

250µA

SENSE

MULTIPLIER

²I

16V/10V

–

200µA²

–

32k

GTDR

RUN

OSC

= 1/3k

15µA

0.7V

–

SYNC

4.7nF

16V

44µA

22µA

1N5819

20µA

35pF

1249 TA01

1. COILTRONICS CTX02-12236 (TYPE 52 CORE)

AIR MOVEMENT NEEDED AT POWER LEVEL GREATER THAN 250W.

2. COILTRONICS CTX02-12295 (MAGNETICS Kool Mµ^®77930 CORE)

THIS SCHOTTKY DIODE IS TO CLAMP GTDR WHEN MOS SWITCH TURNS OFF.

PARASITIC INDUCTANCE AND GATE CAPACITANCE MAY TURN ON CHIP SUBSTRATE

DIODE AND CAUSE ERRATIC OPERATIONS IF GTDR IS NOT CLAMPED.

† SEE APPLICATIONS INFORMATION SECTION FOR CIRCUITRY TO SUPPLY POWER TO V

RELATED PARTS

PART NUMBER

LT1103

DESCRIPTION

COMMENTS

Off-Line Switching Regulator

Universal Off-Line Inputs with Outputs to 100W

Provides All Features in 16-Lead Package

Simplified PFC Design

LT1248

LT1508

LT1509

Full Feature Average Current Mode Power Factor Controller

Power Factor and PWM Controller

Complete Solution for Universal Off-Line Switching Power Supplies

Kool Mµ is a registered trademark of Magnetics, Inc.

1249fb LT/TP 0799 2K REV B • PRINTED IN USA

LINEAR TECHNOLOGY CORPORATION 1994

12 ^{LinearTechnology Corporation}

1630 McCarthy Blvd., Milpitas, CA 95035-7417

●

(408)432-1900 FAX:(408)434-0507 www.linear-tech.com

LT1249CS8相关文章

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LT1249CS8产品参数

型号:	LT1249CS8
是否Rohs认证：	不符合
生命周期：	Active
IHS 制造商：	ANALOG DEVICES INC
包装说明：	SOP,
Reach Compliance Code：	not_compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
风险等级：	5.12
模拟集成电路 - 其他类型：	POWER FACTOR CONTROLLER
控制模式：	CURRENT-MODE
控制技术：	PULSE WIDTH MODULATION
最大输入电压：	25 V
最小输入电压：	11.5 V
JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e0
长度：	4.9 mm
湿度敏感等级：	1
功能数量：	1
端子数量：	8
最大输出电流：	1.5 A
标称输出电压：	7.5 V
封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	235
认证状态：	Not Qualified
座面最大高度：	1.75 mm
最大供电电流 (Isup)：	12 mA
表面贴装：	YES
切换器配置：	SINGLE
最大切换频率：	100 kHz
技术：	BIPOLAR
端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING
端子节距：	1.27 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	20
宽度：	3.9 mm
Base Number Matches：	1

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