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产品型号LTC2634CMSE-LMX8的Datasheet PDF文件预览

LTC2634  
Quad 12-/10-/8-Bit  
Rail-to-Rail DACs with  
10ppm/°C Reference  
FEATURES  
DESCRIPTION  
The LTC®2634 is a family of quad 12-, 10- and 8-bit volt-  
age output DACs with an integrated, high accuracy, low  
drift 10ppm/°C reference in 16-lead QFN and 10-lead  
MSOP packages. It has rail-to-rail output buffers and is  
guaranteed monotonic. The LTC2634-L has a full-scale  
output of 2.5V, and operates from a single 2.7V to 5.5V  
supply. The LTC2634-H has a full-scale output of 4.096V,  
and operates from a 4.5V to 5.5V supply. Each DAC can  
also operate with an external reference, which sets the  
full-scale output to the external reference voltage.  
n
Integrated Precision Reference  
2.5V Full-Scale 10ppm/°C (LTC2634-L)  
4.096V Full-Scale 10ppm/°C (LTC2634-H)  
n
Maximum INL Error: 2.5 LSꢀ (LTC2634-12)  
n
Low Noise: 0.75mV 0.1Hz to 200KHz  
P-P  
n
Guaranteed Monotonic over –40°C to 125°C  
Temperature Range  
n
n
n
n
n
n
n
Selectable Internal or External Reference  
2.7V to 5.5V Supply Range (LTC2634-L)  
Ultralow Crosstalk ꢀetween DACs (2.4nV•s)  
Low Power: 0.6mA at 3V  
Power-On Reset to Zero-Scale/Mid-Scale  
Double ꢀuffered Data Latches  
TheseDACscommunicateviaanSPI/MICROWIREcompat-  
ible 3-wire serial interface which operates at clock rates  
up to 50MHz. Serial data output (SDO), a hardware clear  
(CLR),andanasynchronousDACupdate(LDAC)capability  
areavailableintheQFNpackage.TheLTC2634incorporates  
a power-on reset circuit. Options are available for reset  
to zero-scale or reset to mid-scale in internal reference  
mode, or reset to mid-scale in external reference mode  
after power-up.  
Tiny 16-Lead 3mm × 3mm QFN and 10-Lead  
MSOP Packages  
APPLICATIONS  
n
Mobile Communications  
n
Process Control and Industrial Automation  
n
Automatic Test Equipment  
Portable Equipment  
Automotive  
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear  
Technology Corporation. All other trademarks are the property of their respective owners.  
Protected by U.S. Patents including 5396245, 5859606, 6891433, 6937178, 7414561.  
n
n
BLOCK DIAGRAM  
REF  
INTERNAL  
REFERENCE  
GND  
SWITCH  
Integral Nonlinearity  
V
REF  
(LTC2634-LZ12)  
V
(REFLO)  
CC  
2
V
= 3V  
CC  
INTERNAL REF  
V
V
OUTA  
OUTD  
DAC A  
DAC ꢀ  
DAC D  
DAC C  
1
0
V
V
REF  
REF  
V
V
OUTC  
OUTꢀ  
SDI  
CS/LD  
–1  
–2  
CONTROL  
LOGIC  
DECODE  
0
2048  
3072  
4095  
1024  
SCK  
POWER-ON  
RESET  
32-ꢀIT SHIFT REGISTER  
(CLR)  
CODE  
(SDO)  
2634 TA01  
(LDAC)  
2634 ꢀD  
( ) QFN PACKAGE ONLY  
2634fb  
1
LTC2634  
(Notes 1, 2)  
ABSOLUTE MAXIMUM RATINGS  
Supply Voltage (V ) ................................... –0.3V to 6V  
Maximum Junction Temperature........................... 150°C  
Storage Temperature Range................... –65°C to 150°C  
Lead Temperature (Soldering, 10 sec)  
CC  
CS/LD, SCK, SDI, LDAC, CLR, SDO, REFLO.. –0.3V to 6V  
V
-V  
.................... –0.3V to Min (V + 0.3V, 6V)  
OUTA OUTD CC  
REF .................................. –0.3V to Min (V + 0.3V, 6V)  
MSOP ............................................................... 300°C  
CC  
Operating Temperature Range  
LTC2634C ................................................ 0°C to 70°C  
LTC2634I.............................................. –40°C to 85°C  
LTC2634H (Note 3) ............................ –40°C to 125°C  
PIN CONFIGURATION  
TOP VIEW  
16 15 14 13  
TOP VIEW  
V
1
2
3
4
12  
11  
10  
9
V
V
V
1
2
3
4
5
10 GND  
OUTA  
OUTD  
OUTC  
CC  
OUTA  
V
V
9
8
7
6
V
V
REF  
SDI  
OUTD  
OUTC  
V
OUTꢀ  
11  
17  
OUTꢀ  
LDAC  
REF  
CS/LD  
SCK  
CS/LD  
CLR  
MSE PACKAGE  
10-LEAD PLASTIC MSOP  
5
6
7
8
T
= 125°C, θ = 35°C/W  
JA  
JMAX  
EXPOSED PAD (PIN 11) IS GND, MUST ꢀE SOLDERED TO PCꢀ  
UD PACKAGE  
16-LEAD (3mm s 3mm) PLASTIC QFN  
T
= 125°C, θ = 68°C/W  
JA  
JMAX  
EXPOSED PAD (PIN 17) IS GND, MUST ꢀE SOLDERED TO PCꢀ  
2634fb  
2
LTC2634  
ORDER INFORMATION  
LTC2634  
C
UD -L  
Z
12  
#TR  
PBF  
LEAD FREE DESIGNATOR  
PꢀF = Lead Free  
TAPE AND REEL  
TR = 2,500-Piece Tape and Reel  
RESOLUTION  
12 = 12-ꢀit  
10 = 10-ꢀit  
8 = 8-ꢀit  
POWER-ON RESET  
MI = Reset to Mid-Scale in Internal Reference Mode  
MX = Reset to Mid-Scale in External Reference Mode  
Z = Reset to Zero-Scale in Internal Reference Mode  
FULL-SCALE VOLTAGE, INTERNAL REFERENCE MODE  
L = 2.5V  
H = 4.096V  
PACKAGE TYPE  
UD = 16-Lead QFN  
MSE = 10-Lead MSOP  
TEMPERATURE GRADE  
C = Commercial Temperature Range (0°C to 70°C)  
I = Industrial Temperature Range (–40°C to 85°C)  
H = Automotive Temperature Range (–40°C to 125°C)  
PRODUCT PART NUMBER  
Consult LTC Marketing for information on non-standard lead based finish parts.  
For more information on lead free part marking, go to: http://www.linear.com/leadfree/  
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/  
2634fb  
3
LTC2634  
PRODUCT SELECTION GUIDE  
POWER-ON  
REFERENCE  
MODE  
PART MARKING*  
V
WITH INTERNAL  
REFERENCE  
POWER-ON  
RESET TO CODE  
FS  
PART NUMBER  
QFN  
MSOP  
RESOLUTION  
V
MAXIMUM INL  
CC  
LTC2634-LMI12  
LTC2634-LMI10  
LTC2634-LMI8  
LDQX  
LDRF  
LTDRV  
LTDSC  
2.5V • (4095/4096)  
2.5V • (1023/1024)  
2.5V • (255/256)  
Mid-Scale  
Mid-Scale  
Mid-Scale  
Internal  
Internal  
Internal  
12-ꢀit  
10-ꢀit  
8-ꢀit  
2.7V to 5.5V  
2.7V to 5.5V  
2.7V to 5.5V  
2.5LSꢀ  
1LSꢀ  
0.5LSꢀ  
LDRN LTDSK  
LTC2634-LMX12  
LTC2634-LMX10  
LTC2634-LMX8  
LDQW LTDRT  
LDRD LTDSꢀ  
LDRM LTDSJ  
2.5V • (4095/4096)  
2.5V • (1023/1024)  
2.5V • (255/256)  
Mid-Scale  
Mid-Scale  
Mid-Scale  
External  
External  
External  
12-ꢀit  
10-ꢀit  
8-ꢀit  
2.7V to 5.5V  
2.7V to 5.5V  
2.7V to 5.5V  
2.5LSꢀ  
1LSꢀ  
0.5LSꢀ  
LTC2634-LZ12  
LTC2634-LZ10  
LTC2634-LZ8  
LDQV LTDRS  
2.5V • (4095/4096)  
2.5V • (1023/1024)  
2.5V • (255/256)  
Zero-Scale  
Zero-Scale  
Zero-Scale  
Internal  
Internal  
Internal  
12-ꢀit  
10-ꢀit  
8-ꢀit  
2.7V to 5.5V  
2.7V to 5.5V  
2.7V to 5.5V  
2.5LSꢀ  
1LSꢀ  
0.5LSꢀ  
LDRC  
LTDRZ  
LDRK LTDSH  
LTC2634-HMI12  
LTC2634-HMI10  
LTC2634-HMI8  
LDRꢀ  
LDRJ  
LTDRY 4.096V • (4095/4096)  
LTDSG 4.096V • (1023/1024)  
Mid-Scale  
Mid-Scale  
Mid-Scale  
Internal  
Internal  
Internal  
12-ꢀit  
10-ꢀit  
8-ꢀit  
4.5V to 5.5V  
4.5V to 5.5V  
4.5V to 5.5V  
2.5LSꢀ  
1LSꢀ  
0.5LSꢀ  
LDRR LTDSP  
4.096V • (255/256)  
LTC2634-HMX12  
LTC2634-HMX10  
LTC2634-HMX8  
LDQZ  
LDRH  
LTDRX 4.096V • (4095/4096)  
LTDSF 4.096V • (1023/1024)  
Mid-Scale  
Mid-Scale  
Mid-Scale  
External  
External  
External  
12-ꢀit  
10-ꢀit  
8-ꢀit  
4.5V to 5.5V  
4.5V to 5.5V  
4.5V to 5.5V  
2.5LSꢀ  
1LSꢀ  
0.5LSꢀ  
LDRQ LTDSN  
4.096V • (255/256)  
LTC2634-HZ12  
LTC2634-HZ10  
LTC2634-HZ8  
LDQY LTDRW 4.096V • (4095/4096)  
LDRG LTDSD 4.096V • (1023/1024)  
Zero-Scale  
Zero-Scale  
Zero-Scale  
Internal  
Internal  
Internal  
12-ꢀit  
10-ꢀit  
8-ꢀit  
4.5V to 5.5V  
4.5V to 5.5V  
4.5V to 5.5V  
2.5LSꢀ  
1LSꢀ  
0.5LSꢀ  
LDRP LTDSM  
4.096V • (255/256)  
*Above options are available in a 16-lead QFN package (LTC2634-UD) or 10-lead MSOP package (LTC2634-MSE).  
2634fb  
4
LTC2634  
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 5.5V, VOUT unloaded unless otherwise specified.  
LTC2634-LMI12/-LMI10/-LMI8/-LMX12/-LMX10/-LMX8/-LZ12/-LZ10/-LZ8 (VFS = 2.5V)  
LTC2634-8  
LTC2634-10  
LTC2634-12  
SYMBOL PARAMETER  
DC Performance  
Resolution  
CONDITIONS  
MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS  
l
l
l
l
l
l
8
8
10  
10  
12  
12  
ꢀits  
ꢀits  
Monotonicity  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 3V, Internal Ref. (Note 4)  
= 3V, Internal Ref. (Note 4)  
= 3V, Internal Ref. (Note 4)  
= 3V, Internal Ref., Code = 0  
= 3V, Internal Ref. (Note 5)  
= 3V, Internal Ref.  
DNL  
INL  
Differential Nonlinearity  
0.5  
0.5  
1
1
2.5  
5
LSꢀ  
LSꢀ  
mV  
Integral Nonlinearity  
Zero-Scale Error  
Offset Error  
0.05 0.5  
0.2  
0.5  
0.5  
10  
1
0.5  
0.5  
10  
ZSE  
0.5  
0.5  
10  
5
5
V
V
5
5
5
mV  
OS  
V
Temperature  
OS  
μV/°C  
OSTC  
Coefficient  
l
GE  
GE  
Gain Error  
V
V
= 3V, Internal Ref.  
0.2 0.8  
0.2 0.8  
0.2  
0.8  
%FSR  
CC  
Gain Temperature  
Coefficient  
= 3V, Internal Ref. (Note 10)  
TC  
CC  
C-Grade  
I-Grade  
H-Grade  
10  
10  
10  
10  
10  
10  
10  
10  
10  
ppm/°C  
ppm/°C  
ppm/°C  
Load Regulation  
Internal Ref., Mid-Scale  
= 3V 10%, –5mA ꢁ I  
l
l
l
l
V
ꢁ 5mA  
OUT  
0.009 0.016  
0.009 0.016  
0.09 0.156  
0.09 0.156  
0.035 0.064  
0.035 0.064  
0.09 0.156  
0.09 0.156  
0.14 0.256 LSꢀ/mA  
0.14 0.256 LSꢀ/mA  
CC  
Internal Ref., Mid-Scale  
= 5V 10%, –10mA ꢁ I  
V
ꢁ 10mA  
OUT  
CC  
R
OUT  
DC Output Impedance  
Internal Ref., Mid-Scale  
= 3V 10%, –5mA ꢁ I  
V
ꢁ 5mA  
OUT  
0.09 0.156  
0.09 0.156  
Ω
Ω
CC  
Internal Ref., Mid-Scale  
= 5V 10%, –10mA ꢁ I  
V
ꢁ 10mA  
OUT  
CC  
SYMBOL PARAMETER  
CONDITIONS  
MIN  
TYP  
0 to V  
MAX  
UNITS  
V
DAC Output Span  
External Reference  
Internal Reference  
V
V
OUT  
REF  
0 to 2.5  
PSR  
Power Supply Rejection  
V
V
= 3V 10% or 5V 10%  
–80  
dꢀ  
CC  
I
SC  
Short-Circuit Output Current (Note 6)  
Sinking  
Sourcing  
= V = 5.5V  
CC  
FS  
l
Zero-Scale; V  
Shorted to V  
Shorted to GND  
27  
–27  
48  
–48  
mA  
mA  
OUT  
CC  
l
Full-Scale; V  
OUT  
Power Supply  
l
V
Positive Supply Voltage  
Supply Current (Note 7)  
For Specified Performance  
2.7  
5.5  
V
CC  
l
l
l
l
I
V
CC  
V
CC  
V
CC  
V
CC  
= 3V, V = 2.5V, External Reference  
0.5  
0.6  
0.6  
0.7  
0.7  
0.8  
0.8  
0.9  
mA  
mA  
mA  
mA  
CC  
REF  
= 3V, Internal Reference  
= 5V V = 2.5V, External Reference  
REF  
= 5V, Internal Reference  
l
l
I
SD  
Supply Current in Power-Down Mode (Note 7)  
V
CC  
V
CC  
= 5V, C-Grade, I-Grade  
= 5V, H-Grade  
0.5  
0.5  
20  
30  
μA  
μA  
2634fb  
5
LTC2634  
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 5.5V, VOUT unloaded unless otherwise specified.  
LTC2634-LMI12/-LMI10/-LMI8/-LMX12/-LMX10/-LMX8/-LZ12/-LZ10/-LZ8 (VFS = 2.5V)  
SYMBOL PARAMETER  
Reference Input  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
l
l
V
Input Voltage Range  
Resistance  
1
V
V
kΩ  
pF  
REF  
CC  
120  
160  
14  
200  
Capacitance  
l
l
I
Reference Current, Power-Down Mode  
DAC Powered Down  
0.005  
1.5  
μA  
REF  
Reference Output  
Output Voltage  
1.24  
1.25  
10  
1.26  
V
ppm/°C  
kΩ  
Reference Temperature Coefficient  
Output Impedance  
0.5  
10  
Capacitive Load Driving  
Short-Circuit Current  
μF  
V
CC  
= 5.5V, REF Shorted to GND  
2.5  
mA  
Digital I/O  
l
l
V
Digital Input High Voltage  
Digital Input Low Voltage  
V
V
= 3.6V to 5.5V  
= 2.7V to 3.6V  
2.4  
2.0  
V
V
IH  
CC  
CC  
l
l
V
V
CC  
V
CC  
= 4.5V to 5.5V  
= 2.7V to 4.5V  
0.8  
0.6  
V
V
IL  
l
l
l
l
V
V
Digital Output High Voltage  
Digital Output Low Voltage  
Digital Input Leakage  
Load Current = –100μA  
Load Current = 100μA  
V
CC  
– 0.4  
V
V
OH  
0.4  
1
OL  
I
LK  
V
IN  
= GND to V  
CC  
μA  
pF  
C
IN  
Digital Input Capacitance  
(Note 8)  
2.5  
AC Performance  
t
S
Settling Time  
V
CC  
= 3V (Note 9)  
0.39% ( 1LSꢀ at 8 ꢀits)  
0.098% ( 1LSꢀ at 10 ꢀits)  
0.024% ( 1LSꢀ at 12 ꢀits)  
3.3  
3.8  
4.2  
μs  
μs  
μs  
Voltage Output Slew Rate  
Capacitive Load Driving  
Glitch Impulse  
1.0  
500  
2.1  
2.1  
320  
V/μs  
pF  
At Mid-Scale Transition  
nV•s  
nV•s  
kHz  
DAC-to-DAC Crosstalk  
Multiplying ꢀandwidth  
Output Voltage Noise Density  
1 DAC Held at FS, 1 DAC Switch 0 – FS  
External Reference  
e
n
At f = 1kHz, External Reference  
At f = 10kHz, External Reference  
At f = 1kHz, Internal Reference  
At f = 10kHz, Internal Reference  
180  
160  
200  
180  
nV/√Hz  
nV/√Hz  
nV/√Hz  
nV/√Hz  
Output Voltage Noise  
0.1Hz to 10Hz, External Reference  
0.1Hz to 10Hz, Internal Reference  
0.1Hz to 200kHz, External Reference  
0.1Hz to 200kHz, Internal Reference  
35  
40  
680  
730  
μV  
μV  
μV  
μV  
P-P  
P-P  
P-P  
P-P  
C
= 0.1μF  
REF  
2634fb  
6
LTC2634  
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 5.5V, VOUT unloaded unless otherwise specified.  
LTC2634-LMI12/-LMI10/-LMI8/-LMX12/-LMX10/-LMX8/-LZ12/-LZ10/-LZ8 (VFS = 2.5V)  
SYMBOL PARAMETER  
CONDITIONS  
MIN  
4
TYP  
MAX  
UNITS  
ns  
l
l
l
l
l
l
l
l
l
l
l
l
t
t
t
t
t
t
t
t
t
t
SDI Valid to SCK Setup  
SDI Valid to SCK Hold  
1
4
ns  
2
SCK High Time  
9
ns  
3
SCK Low Time  
9
ns  
4
CS/LD Pulse Width  
10  
7
ns  
5
LSꢀ SCK High to CS/LD High  
CS/LD Low to SCK High  
CLR Pulse Width  
ns  
6
7
ns  
7
20  
15  
7
ns  
8
LDAC Pulse Width  
ns  
9
CS/LD High to SCK Positive Edge  
SCK Frequency  
ns  
10  
50% Duty Cycle  
50  
MHz  
ns  
t
t
CS/LD High to LDAC High or Low Transition  
SDO Propagation Delay from SCK Falling Edge  
200  
11  
C
= 10pF  
= 4.5V to 5.5V  
= 2.7V to 5.5V  
12  
LOAD  
l
l
V
V
20  
45  
ns  
ns  
CC  
CC  
2634fb  
7
LTC2634  
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VCC = 4.5V to 5.5V, VOUT unloaded unless otherwise specified.  
LTC2634-HMI12/-HMI10/-HMI8/-HMX12/-HMX10/-HMX8/-HZ12/-HZ10/-HZ8 (VFS = 4.096V)  
LTC2634-8  
LTC2634-10  
LTC2634-12  
SYMBOL PARAMETER  
DC Performance  
Resolution  
CONDITIONS  
MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS  
l
l
l
l
l
l
8
8
10  
10  
12  
12  
ꢀits  
ꢀits  
Monotonicity  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 5V, Internal Ref. (Note 4)  
= 5V, Internal Ref. (Note 4)  
= 5V, Internal Ref. (Note 4)  
= 5V, Internal Ref., Code = 0  
= 5V, Internal Ref. (Note 5)  
= 5V, Internal Ref.  
DNL  
INL  
Differential Nonlinearity  
0.5  
0.5  
1
1
2.5  
5
LSꢀ  
LSꢀ  
mV  
Integral Nonlinearity  
Zero-Scale Error  
Offset Error  
0.05 0.5  
0.2  
0.5  
0.5  
10  
1
0.5  
0.5  
10  
ZSE  
0.5  
0.5  
10  
5
5
V
V
5
5
5
mV  
OS  
V
Temperature  
OS  
μV/°C  
OSTC  
Coefficient  
l
GE  
GE  
Gain Error  
V
V
= 5V, Internal Ref.  
0.2 0.8  
0.2 0.8  
0.2  
0.8  
%FSR  
CC  
CC  
Gain Temperature  
Coefficient  
= 5V, Internal Ref. (Note 10)  
TC  
C-Grade  
I-Grade  
H-Grade  
10  
10  
10  
10  
10  
10  
10  
10  
10  
ppm/°C  
ppm/°C  
ppm/°C  
Load Regulation  
V
= 5V 10%, Internal Ref., Mid-Scale,  
CC  
l
l
–10mA ꢁ I  
ꢁ 10mA  
0.006 0.01  
0.09 0.156  
0.022 0.04  
0.09 0.156  
0.09 0.16 LSꢀ/mA  
OUT  
R
OUT  
DC Output Impedance  
V
CC  
= 5V 10%, Internal Ref., Mid-Scale,  
–10mA ꢁ I  
ꢁ 10mA  
0.09 0.156  
Ω
OUT  
SYMBOL PARAMETER  
CONDITIONS  
MIN  
TYP  
0 to V  
MAX  
UNITS  
V
DAC Output Span  
External Reference  
Internal Reference  
V
V
OUT  
REF  
0 to 4.096  
PSR  
Power Supply Rejection  
V
V
= 5V 10%  
–80  
dꢀ  
CC  
I
SC  
Short-Circuit Output Current (Note 6)  
Sinking  
Sourcing  
= V = 5.5V  
CC  
FS  
l
l
Zero-Scale; V  
Shorted to V  
27  
–27  
48  
–48  
mA  
mA  
OUT  
CC  
Full-Scale; V  
Shorted to GND  
OUT  
Power Supply  
l
l
V
Positive Supply Voltage  
Supply Current (Note 7)  
For Specified Performance  
4.5  
5.5  
V
CC  
I
V
CC  
V
CC  
= 5V, V = 4.096V, External Reference  
0.6  
0.7  
0.8  
0.9  
mA  
mA  
CC  
REF  
l
= 5V, Internal Reference  
l
l
I
SD  
Supply Current in Power-Down Mode  
(Note 7)  
V
CC  
V
CC  
= 5V, C-Grade, I-Grade  
= 5V, H-Grade  
0.5  
0.5  
20  
30  
μA  
μA  
2634fb  
8
LTC2634  
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VCC = 4.5V to 5.5V, VOUT unloaded unless otherwise specified.  
LTC2634-HMI12/-HMI10/-HMI8/-HMX12/-HMX10/-HMX8/-HZ12/-HZ10/-HZ8 (VFS = 4.096V)  
SYMBOL PARAMETER  
Reference Input  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
l
l
V
Input Voltage Range  
Resistance  
1
V
V
kΩ  
pF  
REF  
CC  
120  
160  
14  
200  
Capacitance  
l
l
I
Reference Current, Power-Down Mode  
DAC Powered Down  
0.005  
1.5  
μA  
REF  
Reference Output  
Output Voltage  
2.032  
2.048  
10  
2.064  
V
ppm/°C  
kΩ  
Reference Temperature Coefficient  
Output Impedance  
0.5  
10  
Capacitive Load Driving  
Short-Circuit Current  
μF  
V
CC  
= 5.5V, REF Shorted to GND  
4
mA  
Digital I/O  
l
l
l
l
l
l
V
V
V
V
Digital Input High Voltage  
Digital Input Low Voltage  
Digital Output High Voltage  
Digital Output Low Voltage  
Digital Input Leakage  
2.4  
V
V
IH  
0.8  
IL  
Load Current = –100μA  
Load Current = 100μA  
V
– 0.4  
CC  
V
OH  
OL  
0.4  
1
V
I
LK  
V
IN  
= GND to V  
CC  
μA  
pF  
C
Digital Input Capacitance  
(Note 8)  
2.5  
IN  
AC Performance  
t
S
Settling Time  
V
= 5V (Note 9)  
CC  
0.39% ( 1LSꢀ at 8 ꢀits)  
0.098% ( 1LSꢀ at 10 ꢀits)  
0.024% ( 1LSꢀ at 12 ꢀits)  
3.8  
4.2  
4.8  
μs  
μs  
μs  
Voltage Output Slew Rate  
Capacitive Load Driving  
Glitch Impulse  
1.0  
500  
3.0  
2.4  
320  
V/μs  
pF  
At Mid-Scale Transition  
nV•s  
nV•s  
kHz  
DAC-to-DAC Crosstalk  
Multiplying ꢀandwidth  
Output Voltage Noise Density  
1 DAC Held at FS, 1 DAC Switch 0 – FS  
External Reference  
e
n
At f = 1kHz, External Reference  
At f = 10kHz, External Reference  
At f = 1kHz, Internal Reference  
At f = 10kHz, Internal Reference  
180  
160  
250  
230  
nV/√Hz  
nV/√Hz  
nV/√Hz  
nV/√Hz  
Output Voltage Noise  
0.1Hz to 10Hz, External Reference  
0.1Hz to 10Hz, Internal Reference  
0.1Hz to 200kHz, External Reference  
0.1Hz to 200kHz, Internal Reference  
35  
50  
680  
750  
μV  
P-P  
μV  
P-P  
μV  
P-P  
μV  
P-P  
C
= 0.1μF  
REF  
2634fb  
9
LTC2634  
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VCC = 4.5V to 5.5V, VOUT unloaded unless otherwise specified.  
LTC2634-HMI12/-HMI10/-HMI8/-HMX12/-HMX10/-HMX8/-HZ12/-HZ10/-HZ8 (VFS = 4.096V)  
SYMBOL PARAMETER  
CONDITIONS  
MIN  
4
TYP  
MAX  
UNITS  
ns  
l
l
l
l
l
l
l
l
l
l
l
l
t
t
t
t
t
t
t
t
t
t
SDI Valid to SCK Setup  
SDI Valid to SCK Hold  
1
4
ns  
2
SCK High Time  
9
ns  
3
SCK Low Time  
9
ns  
4
CS/LD Pulse Width  
10  
7
ns  
5
LSꢀ SCK High to CS/LD High  
CS/LD Low to SCK High  
CLR Pulse Width  
ns  
6
7
ns  
7
20  
15  
7
ns  
8
LDAC Pulse Width  
ns  
9
CS/LD High to SCK Positive Edge  
SCK Frequency  
ns  
10  
50% Duty Cycle  
50  
20  
MHz  
ns  
t
t
CS/LD High to LDAC High or Low Transition  
SDO Propagation Delay from SCK Falling Edge  
200  
11  
C
= 10pF  
= 4.5V to 5.5V  
12  
LOAD  
CC  
l
V
ns  
Note 6: This IC includes current limiting that is intended to protect the  
device during momentary overload conditions. Junction temperature can  
exceed the rated maximum during current limiting. Continuous operation  
above the specified maximum operating junction temperature may impair  
device reliability.  
Note 1: Stresses beyond those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. Exposure to any Absolute  
Maximum Rating condition for extended periods may affect device  
reliability and lifetime.  
Note 2: All voltages are with respect to GND.  
Note 3: High temperatures degrade operating lifetimes. Operating lifetime  
Note 7: Digital inputs at 0V or V  
.
CC  
Note 8: Guaranteed by design and not production tested.  
is derated at temperatures greater than 105°C.  
Note 9: Internal Reference mode. DAC is stepped 1/4 scale to 3/4 scale  
and 3/4 scale to 1/4 scale. Load is 2kΩ in parallel with 100pF to GND.  
Note 4: Linearity and monotonicity are defined from code k to code  
L
N
N
2 – 1, where N is the resolution and k is given by k = 0.016 • (2 / V ),  
L
L
FS  
rounded to the nearest whole code. For V = 2.5V and N = 12, k = 26  
Note 10: Temperature coefficient is calculated by dividing the maximum  
change in output voltage by the specified temperature range.  
FS  
L
and linearity is defined from code 26 to code 4,095. For V = 4.096V and  
FS  
N = 12, k = 16 and linearity is defined from code 16 to code 4,095.  
L
Note 5: Inferred from measurement at code 16 (LTC2634-12), code 4  
(LTC2634-10) or code 1 (LTC2634-8), and at full-scale.  
2634fb  
10  
LTC2634  
TYPICAL PERFORMANCE CHARACTERISTICS  
TA = 25°C, unless otherwise noted. LTC2634-L12 (Internal Reference, VFS = 2.5V)  
Integral Nonlinearity (INL)  
Differential Nonlinearity (DNL)  
1.0  
0.5  
1.0  
V
= 3V  
V
= 3V  
CC  
CC  
0.5  
0
0
–0.5  
–1.0  
–0.5  
–1.0  
0
1024  
2048  
3072  
4095  
0
1024  
2048  
3072  
4095  
CODE  
CODE  
2634 G01  
2634 G02  
Reference Output Voltage  
vs Temperature  
INL vs Temperature  
DNL vs Temperature  
1.0  
1.0  
0.5  
1.260  
1.255  
1.250  
1.245  
1.240  
V
= 3V  
V
= 3V  
V
= 3V  
CC  
CC  
CC  
0.5  
0
INL (POS)  
DNL (POS)  
DNL (NEG)  
0
–0.5  
–0.5  
INL (NEG)  
–1.0  
–1.0  
–50 –25  
0
25 50 75 100 125 150  
–50 –25  
0
25 50 75 100 125 150  
–50 –25  
0
25 50 75 100 125 150  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
2634 G04  
2634 G03  
2634 G05  
Settling to 1LSB Rising  
Settling to 1LSB Falling  
3/4 SCALE TO  
1/4 SCALE STEP  
CS/LD  
5V/DIV  
V
= 3V, V = 2.5V  
CC  
FS  
V
R
= 2k, C = 100pF  
L
OUT  
L
1LSꢀ/DIV  
AVERAGE OF 256  
EVENTS  
3.1μs  
4.2μs  
1/4 SCALE TO  
3/4 SCALE STEP  
= 3V, V = 2.5V  
V
OUT  
1LSꢀ/DIV  
V
CC  
FS  
CS/LD  
5V/DIV  
R
= 2k, C = 100pF  
L
L
AVERAGE OF 256  
EVENTS  
2μs/DIV  
2μs/DIV  
2634 G07  
2634 G06  
2634fb  
11  
LTC2634  
TYPICAL PERFORMANCE CHARACTERISTICS  
TA = 25°C, unless otherwise noted. LTC2634-H12 (Internal Reference, VFS = 4.096V)  
Integral Nonlinearity (INL)  
Differential Nonlinearity (DNL)  
1.0  
0.5  
1.0  
0.5  
V
= 5V  
V
= 5V  
CC  
CC  
0
0
–0.5  
–1.0  
–0.5  
–1.0  
0
1024  
2048  
3072  
4095  
0
1024  
2048  
3072  
4095  
CODE  
CODE  
2634 G08  
2634 G09  
Reference Output Voltage  
vs Temperature  
INL vs Temperature  
DNL vs Temperature  
1.0  
0.5  
1.0  
2.068  
2.058  
2.048  
2.038  
2.028  
V
= 5V  
V
= 5V  
CC  
V
= 5V  
CC  
CC  
INL (POS)  
0.5  
0
DNL (POS)  
DNL (NEG)  
0
INL (NEG)  
–0.5  
–0.5  
–1.0  
–1.0  
–50 –25  
0
25 50 75 100 125 150  
–50 –25  
0
25 50 75 100 125 150  
–50 –25  
0
25 50 75 100 125 150  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
2634 G10  
2634 G11  
2634 G12  
Settling to 1LSB Rising  
Settling to 1LSB Falling  
1/4 SCALE TO  
3/4 SCALE STEP  
CS/LD  
5V/DIV  
V
= 5V, V = 4.095V  
CC  
FS  
V
R
= 2k, C = 100pF  
L
OUT  
L
1LSꢀ/DIV  
AVERAGE OF 256  
EVENTS  
4.8μs  
3.8μs  
1/4 SCALE TO  
3/4 SCALE STEP  
= 5V, V = 4.095V  
V
OUT  
1LSꢀ/DIV  
V
CS/LD  
5V/DIV  
CC  
FS  
R
= 2k, C = 100pF  
L
L
AVERAGE OF 256  
EVENTS  
2μs/DIV  
2μs/DIV  
2634 G14  
2634 G13  
2634fb  
12  
LTC2634  
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted  
LTC2634-10  
Integral Nonlinearity (INL)  
Differential Nonlinearity (DNL)  
1.0  
0.5  
1.0  
0.5  
V
CC  
V
FS  
= 3V  
= 2.5V  
V
CC  
V
FS  
= 3V  
= 2.5V  
INTERNAL REF  
INTERNAL REF  
0
0
–0.5  
–1.0  
–0.5  
–1.0  
0
256  
512  
768  
1023  
0
256  
512  
768  
1023  
CODE  
CODE  
2634 G15  
2634 G16  
LTC2634-8  
Integral Nonlinearity (INL)  
Differential Nonlinearity (DNL)  
0.50  
0.25  
0
0.50  
0.25  
0
V
CC  
V
FS  
= 3V  
= 2.5V  
V
CC  
V
FS  
= 3V  
= 2.5V  
INTERNAL REF  
INTERNAL REF  
–0.25  
–0.50  
–0.25  
–0.50  
0
64  
128  
192  
255  
0
64  
128  
192  
255  
CODE  
CODE  
2634 G17  
2634 G18  
LTC2634  
Load Regulation  
Current Limiting  
Offset Error vs Temperature  
0.20  
0.15  
0.10  
0.05  
0
3
2
10  
V
CC  
V
CC  
V
CC  
= 5V (LTC2634-H)  
= 5V (LTC2634-L)  
= 3V (LTC2634-L)  
V
CC  
V
CC  
V
CC  
= 5V (LTC2634-H)  
= 5V (LTC2634-L)  
= 3V (LTC2634-L)  
8
6
4
1
2
0
0
–2  
–4  
–6  
–8  
–10  
–0.05  
–0.01  
–0.15  
–0.20  
–1  
–2  
–3  
INTERNAL REF.  
CODE = MID-SCALE  
INTERNAL REF.  
CODE = MID-SCALE  
–30  
–20  
–10  
0
10 20 30  
–50 –25  
0
25 50 75 100 125 150  
–30  
–20  
–10  
0
10 20 30  
I
(mA)  
TEMPERATURE (°C)  
I
(mA)  
OUT  
OUT  
2634 G20  
2634 G21  
2634 G19  
2634fb  
13  
LTC2634  
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted  
LTC2634  
Large-Signal Response  
Mid-Scale Glitch Impulse  
Power-On Reset Glitch  
LTC2634-L  
V
CS/LD  
5V/DIV  
CC  
2V/DIV  
V
OUT  
LTC2634-H12, V = 5V  
CC  
3.0nV•s TYP  
0.5V/DIV  
ZERO SCALE  
V
V
OUT  
5mV/DIV  
OUT  
5mV/DIV  
LTC2634-L12, V = 3V  
CC  
2.1nV•s TYP  
V
= V = 5V  
CC  
FS  
1/4 SCALE to 3/4 SCALE  
2μs/DIV  
2μs/DIV  
200μs/DIV  
2634 G22  
2634 G23  
2636 G24  
Headroom at Rails  
vs Output Current  
Exiting Power-Down to Mid-Scale  
Power-On Reset to Mid-Scale  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
LTC2634-H  
5V SOURCING  
V
= 5V  
CC  
V
CC  
INTERNAL REF  
2V/DIV  
CS/LD  
3V (LTC2634-L) SOURCING  
LTC2634-H  
2V/DIV  
DACs A-C IN  
POWER-DOWN  
MODE  
V
OUT  
0.5V/DIV  
LTC2634-L  
V
5V SINKING  
3V (LTC2634-L) SINKING  
OUT  
0.5V/DIV  
5μs/DIV  
200μs/DIV  
0
1
2
3
4
5
6
7
8
9
10  
2634 G26  
2634 G27  
I
(mA)  
OUT  
2634 G25  
Supply Current vs Logic Voltage  
Hardware CLR  
Hardware CLR to Mid-Scale  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
V
V
= 5V  
REF  
CODE = FULL-SCALE  
SWEEP SCK, SDI, CS/LD  
V
V
= 5V  
REF  
CODE = FULL-SCALE  
CC  
CC  
= 4.096V  
ꢀETWEEN 0V AND V  
= 4.096V  
CC  
V
OUT  
1V/DIV  
V
OUT  
1V/DIV  
V
= 5V  
CC  
V
= 3V  
CC  
CLR  
5V/DIV  
CLR  
5V/DIV  
(LTC2634-L)  
1μs/DIV  
1μs/DIV  
0
1
2
3
4
5
2634 G29  
2634 G30  
LOGIC VOLTAGE (V)  
2634 G28  
2634fb  
14  
LTC2634  
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted  
LTC2634  
Mulitplying Bandwidth  
Noise Voltage vs Frequency  
Gain Error vs Reference Input  
2
0
1.0  
0.8  
500  
400  
300  
200  
100  
0
V
= 5V  
CC  
V
= 5.5V  
CC  
CODE = MID-SCALE  
INTERNAL REF  
GAIN ERROR OF 4 CHANNELS  
–2  
0.6  
–4  
0.4  
–6  
0.2  
0
–8  
LTC2634-H  
–0.2  
–0.4  
–0.6  
–0.8  
–1.0  
–10  
–12  
–14  
–16  
–18  
LTC2634-L  
V
V
V
= 5V  
REF(DC)  
REF(AC)  
CODE = FULL-SCALE  
CC  
= 2V  
= 0.2V  
P-P  
1k  
10k  
100k  
1M  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
5.5  
100  
1k  
10k  
100k  
1M  
FREQUENCY (Hz)  
REFERENCE VOLTAGE (V)  
FREQUENCY (Hz)  
2636 G31  
2634 G33  
2636 G32  
0.1Hz to 10Hz Voltage Noise  
DAC-to-DAC Crosstalk (Dynamic)  
Gain Error vs Temperature  
1.0  
0.5  
V
= 5V, V = 2.5V  
FS  
CC  
CODE = MID-SCALE  
INTERNAL REF  
CS/LD  
5V/DIV  
1 DAC  
SWITCH 0-FS  
2V/DIV  
10μV/DIV  
0
V
OUT  
–0.5  
1mV/DIV  
LTC2634-H12, V = 5V  
CC  
2.4nV•s TYP  
C
REF  
= 0.1μF  
–1.0  
1s/DIV  
2μs/DIV  
–50 –25  
0
25 50 75 100 125 150  
2634 G34  
2634 G35  
TEMPERATURE (°C)  
2634 G36  
2634fb  
15  
LTC2634  
PIN FUNCTIONS (QFN/MSOP)  
V
to V  
(Pins 1-2, 11-12/Pins 2-3, 8-9): DAC  
SDI (Pin 8/Pin 6): Serial Interface Data Input. Data on  
SDI is clocked into the DAC on the rising edge of SCK.  
The LTC2634 accepts input word lengths of either 24 or  
32 bits.  
OUTA  
OUTD  
Analog Voltage Outputs.  
LDAC (Pin 3, QFN Only): Asynchronous DAC Update  
Pin. If CS/LD is high, a falling edge on LDAC immediately  
updates the DAC registers with the contents of the input  
registers (similar to a software update). If CS/LD is low  
when LDAC goes low, the DAC registers are updated after  
CS/LD returns high. A low on the LDAC pin powers up  
the DACs. A software power-down command is ignored  
if LDAC is low.  
CLR (Pin 9, QFN Only): Asynchronous Clear Input. A  
logic low at this level-triggered input clears all registers  
and causes the DAC voltage output to reset to zero  
(LTC2634-Z) or mid-scale (LTC2634-MI/-MX). CMOS and  
TTL compatible.  
REF (Pin 10/Pin 7): Reference Voltage Input or Output.  
CS/LD (Pin 4/Pin 4): Serial Interface Chip Select/Load  
Input. When CS/LD is low, SCK is enabled for shifting  
data on SDI into the 32-bit shift register. When CS/LD is  
taken high, SCK is disabled and the specified command  
(see Table 1) is executed.  
When external reference mode is selected, REF is an input  
(1V ꢁ V  
ꢁ V ) where the voltage supplied sets the  
REF  
CC  
full-scale DAC output voltage. When internal reference  
is selected, the 10ppm/°C 1.25V (LTC2634-L) or 2.048V  
(LTC2634-H)internalreference(halffull-scale)isavailable  
at REF. This output may be bypassed to GND with up to  
10μF and must be buffered when driving external DC load  
current.  
SCK (Pin 5/Pin 5): Serial Interface Clock Input. CMOS  
and TTL compatible.  
DNC (Pins 6, 15, QFN Only): Do not connect these  
pins.  
REFLO(Pin13,QFNonly):ReferenceLowPin.Thevoltage  
at this pin sets the zero-scale voltage of all DACs. This pin  
must be tied to GND.  
SDO (Pin 7, QFN Only): Serial Interface Data Output. The  
serial output of the 32-bit shift register appears at the SDO  
pin. The data transferred to the device via the SDI pin is  
delayed 32 SCK rising edges before being output at the  
next falling edge. This pin is used for daisy-chain opera-  
tion, it is always driven and never goes high impedance,  
even when CS/LD is high. See the Daisy-Chain Operation  
section.  
GND (Pin 14/Pin 10): Ground.  
V
(Pin 16/Pin 1): Supply Voltage Input. 2.7V ꢁ V  
CC  
CC  
5.5V (LTC2634-L) or 4.5V ꢁ V ꢁ 5.5V (LTC2634-H).  
CC  
ꢀypass to GND with a 0.1μF capacitor.  
Exposed Pad (Pin 17/Pin 11): Ground. Must be soldered  
to PCꢀ ground.  
2634fb  
16  
LTC2634  
BLOCK DIAGRAM  
REF  
INTERNAL  
REFERENCE  
GND  
SWITCH  
V
REF  
V
(REFLO)  
CC  
V
V
OUTA  
OUTD  
DAC A  
DAC ꢀ  
DAC D  
DAC C  
V
V
REF  
REF  
V
V
OUTC  
OUTꢀ  
SDI  
CS/LD  
CONTROL  
LOGIC  
DECODE  
SCK  
POWER-ON  
RESET  
32-ꢀIT SHIFT REGISTER  
(CLR)  
(SDO)  
(LDAC)  
2634 ꢀD  
( ) QFN PACKAGE ONLY  
2634fb  
17  
LTC2634  
TIMING DIAGRAMS  
t
1
t
t
t
t
4
6
2
3
SCK  
SDI  
1
2
3
23  
24  
t
10  
t
t
7
5
CS/LD  
t
12  
SDO  
t
t
9
11  
LDAC  
2634 F01a  
Figure 1a  
CS/LD  
t
11  
LDAC  
2634 F01b  
Figure 1b  
2634fb  
18  
LTC2634  
OPERATION  
The LTC2634 is a family of quad voltage output DACs in  
16-lead QFN and 10-lead MSOP packages. Each DAC can  
operate rail-to-rail using an external reference, or with its  
full-scale voltage set by an integrated reference. Eighteen  
combinations of accuracy (12-, 10- and 8-bit), power-on  
reset value (zero-scale, mid-scale in internal reference  
mode, or mid-scale in external reference mode), and full-  
scale voltage (2.5V or 4.096V) are available. The LTC2634  
is controlled using a 3-wire SPI/MICROWIRE compatible  
interface.  
Power Supply Sequencing  
The voltage at REF (Pin 10, QFN/Pin 7, MSOP) must be  
kept within the range –0.3V ꢁ V ꢁ V + 0.3V (see  
REF  
CC  
Absolute Maximum Ratings). Particular care should be  
taken to observe these limits during power supply turn-  
on and turn-off sequences, when the voltage at V is in  
CC  
transition.  
Transfer Function  
The digital-to-analog transfer function is:  
Power-On Reset  
k
VOUT(IDEAL) ⎜  
=
VREF VREFLO + V  
REFLO  
(
)
N
TheLTC2634-HZ/LTC2634-LZcleartheoutputtozero-scale  
when power is first applied, making system initialization  
consistent and repeatable.  
2
where k is the decimal equivalent of the binary DAC  
input code, N is the resolution, and V is either 2.5V  
REF  
For some applications, downstream circuits are active  
during DAC power-up, and may be sensitive to nonzero  
outputs from the DAC during this time. The LTC2634  
contains circuitry to reduce the power-on glitch: the  
analog output typically rises less than 5mV above zero-  
scale during power on. In general, the glitch amplitude  
decreases as the power supply ramp time is increased.  
See “Power-On Reset Glitch” in the Typical Performance  
Characteristics section.  
(LTC2634-LMI/LTC2634-LMX/LTC2634-LZ) or 4.096V  
(LTC2634-HMI/LTC2634-HMX/LTC2634-HZ) when in  
internal reference mode, and the voltage at REF when in  
external reference mode. The resulting DAC output span  
is 0V to V , as it is necessary to tie REFLO to GND.  
REF  
Serial Interface  
The CS/LD input is level-triggered. When this input is  
taken low, it acts as a chip-select signal, enabling the SDI  
and SCK buffers and the input shift register. Data (SDI  
input) is transferred at the next 24 rising SCK edges.  
The 4-bit command, C3-C0, is loaded first; then the 4-bit  
DAC address, A3-A0; and finally the 16-bit data word.  
The data word comprises the 12-, 10- or 8-bit input code,  
ordered MSꢀ to LSꢀ, followed by 4, 6 or 8 don’t-care  
bits (LTC2634-12/LTC2634-10/LTC2634-8 respectively;  
see Figure 2). Data can only be transferred to the device  
when the CS/LD signal is low, beginning on the first rising  
edge of SCK. SCK may be high or low at the falling edge  
The LTC2634-HMI/LTC2634-HMX/LTC2634-LMI/  
LTC2634-LMX provide an alternative reset, setting the  
output to mid-scale when power is first applied. The  
LTC2634-LMI and LTC2634-HMI power up in internal  
reference mode, with the output set to a mid-scale volt-  
age of 1.25V and 2.048V, respectively. The LTC2634-LMX  
and LTC2634-HMX power up in external reference mode,  
with the output set to mid-scale of the external reference.  
DefaultreferencemodeselectionisdescribedintheRefer-  
ence Modes section.  
2634fb  
19  
LTC2634  
OPERATION  
of CS/LD. The rising edge of CS/LD ends the data transfer  
and causes the device to execute the command specified  
in the 24-bit input sequence. The complete sequence is  
shown in Figure 3a.  
update operation copies the data word from the input  
register to the DAC register. Once copied into the DAC  
register, the data word becomes the active 12-, 10- or  
8-bit input code, and is converted to an analog voltage at  
the DAC output. Write to and update combines the first  
two commands. The update operation also powers up the  
DAC if it had been in power-down mode. The data path  
and registers are shown in the ꢀlock Diagram.  
The command (C3-C0) and address (A3-A0) assignments  
are shown in Tables 1 and 2. The first four commands  
in Table 1 consist of write and update operation. A write  
operation loads a 16-bit data word from the 24-bit shift  
register into the input register of the selected DAC, n. An  
Input Word (LTC2634-12)  
COMMAND  
ADDRESS  
DATA (12 ꢀITS + 4 DONT CARE ꢀITS)  
A3 A2  
A0  
A0  
A0  
D8  
D6  
D4  
D2  
X
X
C3  
C1  
C2  
A1  
D11 D10 D9  
MSꢀ  
D7 D6 D5 D4  
D1 D0  
LSꢀ  
X
X
X
X
X
X
X
X
X
D3  
C0  
Input Word (LTC2634-10)  
COMMAND  
ADDRESS  
DATA (10 ꢀITS + 6 DONT CARE ꢀITS)  
A3 A2  
D0  
C3  
C1  
A1  
D9 D8 D7  
MSꢀ  
D5 D4 D3 D2  
X
X
D1  
C2  
C0  
LSꢀ  
Input Word (LTC2634-8)  
COMMAND  
ADDRESS  
DATA (8 ꢀITS + 8 DONT CARE ꢀITS)  
A3 A2  
X
X
C3  
C1  
A1  
D7 D6 D5  
MSꢀ  
D3 D2 D1 D0  
LSꢀ  
X
X
X
C2  
C0  
2634 F02  
Figure 2. Command and Data Input Format  
Table 1. Command Codes  
COMMAND*  
Table 2. Address Codes  
ADDRESS (n)*  
C3 C2 C1 C0  
A3 A2 A1 A0  
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Write to Input Register n  
0
0
0
0
1
0
0
0
0
1
0
0
1
1
1
0
1
0
1
1
DAC A  
DAC ꢀ  
DAC C  
DAC D  
Update (Power Up) DAC Register n  
Write to Input Register n, Update (Power Up) All  
Write to and Update (Power Up) DAC Register n  
Power-Down DAC n  
All DACs  
* Address codes not shown are reserved and should not be used.  
Power-Down Chip (All DACs and Reference)  
Select Internal Reference (Power-Up Reference)  
Select External Reference (Power-Down Internal  
Reference)  
1
1
1
1
No Operation  
*Command codes not shown are reserved and should not be used.  
2634fb  
20  
LTC2634  
OPERATION  
While the minimum input sequence is 24 bits, it may  
optionally be extended to 32 bits to accommodate micro-  
processors that have a minimum word width of 16 bits  
(2 bytes). To use the 32-bit width, 8 don’t care bits  
must be transferred to the device first, followed by the  
24-bit sequence described. Figure 3b shows the 32-bit  
sequence.  
Reference Modes  
For applications where an accurate external reference is  
either not available, or not desirable due to limited space,  
the LTC2634 has a low noise, user-selectable, integrated  
reference. The integrated reference voltage is internally  
amplified by 2x to provide the full-scale DAC output volt-  
age range. The LTC2634-LMI/LTC2634-LMX/LTC2634-LZ  
provides a full-scale DAC output of 2.5V. The LTC2634-  
HMI/LTC2634-HMX/LTC2634-HZ provides a full-scale  
DAC output of 4.096V. The internal reference can be  
useful in applications where the supply voltage is poorly  
regulated. Internal Reference mode can be selected by  
using command 0110b, and is the power-on default for  
LTC2634-HZ/LTC2634-LZ, as well as for LTC2634-HMI/  
LTC2634-LMI.  
The 16-bit data word is ignored for all commands that do  
not include a write operation.  
Daisy-Chain Operation (QFN Package)  
The serial output of the shift register appears at the SDO  
pin on the QFN package. Data transferred to the device  
from the SDI input is delayed 32 SCK rising edges before  
being output at the next SCK falling edge, therefore, daisy  
chaining multiple LTC2634 DACs requires 32-bit data  
write cycles.  
The 10ppm/°C, 1.25V (LTC2634-LMI/LTC2634-LMX/  
LTC2634-LZ) or 2.048V (LTC2634-HMI/LTC2634-HMX/  
LTC2634-HZ) internal reference is available at the REF pin.  
Adding bypass capacitance to the REF pin will improve  
noiseperformance;0.1μFisrecommended,andupto10μF  
can be driven without oscillation. The REF output must be  
buffered when driving an external DC load current.  
TheSDOoutputcanbeusedtofacilitatecontrolofmultiple  
serial devices from a single 3-wire serial port (i.e., SCK,  
SDIandCS/LD). Suchadaisy-chainseriesisconfigured  
by connecting SDO of each upstream device to SDI of the  
next device in the chain. The shift registers of the devices  
are thus connected in series, effectively forming a single  
inputshiftregisterwhichextendsthroughtheentirechain.  
ꢀecauseofthis,thedevicescanbeaddressedandcontrolled  
individually by simply concatenating their input words;  
the first instruction addresses the last device in the chain  
and so forth. The SCK and CS/LD signals are common to  
all devices in the series. Figure 5 shows a block diagram  
for daisy-chain operation.  
Alternatively, the DAC can operate in external reference  
modeusingcommand0111b.Inthismode,aninputvoltage  
supplied externally to the REF pin provides the reference  
(1V ꢁ V ꢁ V ) and the supply current is reduced. The  
REF  
CC  
external reference voltage supplied sets the full-scale DAC  
output voltage. External reference mode is the power-on  
default for LTC2634-HMX/LTC2634-LMX.  
The reference mode of LTC2634-HZ/LTC2634-LZ/  
LTC2634-HMI/LTC2634-LMI(internalreferencepower-on  
default),canbechangedbysoftwarecommandafterpower  
up. The same is true for LTC2634-HMX/-LMX (external  
reference power-on default).  
In use, CS/LD is first taken low. Then the concatenated  
input data is transferred to the chain, using SDI of the  
first device as the data input. When the data transfer is  
complete, CS/LD is taken high, completing the instruction  
sequence for all devices simultaneously. A single device  
can be controlled by using the no-operation command  
(1111) for the other devices in the chain.  
The LTC2634’s QFN package offers a REFLO pin for the  
negative reference. REFLO must be connected to GND.  
2634fb  
21  
LTC2634  
OPERATION  
Power-Down Mode  
is12μs. Thepower-upoftheintegratedreferencedepends  
on the command that powered it down. If the reference is  
powered down using the select external reference com-  
mand (0111b), then it can only be powered back up using  
select internal reference command (0110b). However, if  
the reference was powered down using power-down chip  
command (0101b), then in addition to select internal  
reference command (0110b), any command (in software  
or using the LDAC pin) that powers up the DACs will also  
power up the integrated reference.  
Forpower-constrainedapplications,power-downmodecan  
be used to reduce the supply current whenever less than  
four DAC outputs are needed. When in power down, the  
buffer amplifiers, bias circuits, and integrated reference  
circuits are disabled, and draw essentially zero current.  
The DAC outputs are put into a high impedance state, and  
the output pins are passively pulled to ground through  
individual200kresistors.Input-andDAC-registercontents  
are not disturbed during power down.  
Voltage Output  
Any DAC channel or combination of channels can be put  
into power-down mode by using command 0100b in  
combination with the appropriate DAC address, (n). The  
supplycurrentisreducedapproximately20%foreachDAC  
powered down. The integrated reference is automatically  
powered down when external reference is selected using  
command 0111b. In addition, all the DAC channels and  
the integrated reference together can be put into power-  
down mode using power-down chip command 0101b.  
When the integrated reference and all DAC channels are  
in power-down mode, the REF pin becomes high imped-  
ance (typically > 1GΩ). For all power-down commands  
the 16-bit data word is ignored.  
The LTC2634’s integrated rail-to-rail amplifier has guaran-  
teed load regulation when sourcing or sinking up to 10mA  
at 5V, and 5mA at 3V.  
Load regulation is a measure of the amplifier’s ability to  
maintain the rated voltage accuracy over a wide range of  
load current. The measured change in output voltage per  
change in forced load current is expressed in LSꢀ/mA.  
DC output impedance is equivalent to load regulation, and  
may be derived from it by simply calculating a change in  
units from LSꢀ/mA to ohms. The amplifier’s DC output  
impedance is 0.1Ω when driving a load well away from  
the rails.  
Normal operation resumes after executing any command  
that includes a DAC update, (as shown in Table 1) or pull-  
ing the asynchronous LDAC pin low. The selected DAC  
is powered up as its voltage output is updated. When  
a DAC which is in a powered-down state is powered up  
and updated, normal settling is delayed. If less than four  
DACs are in a powered-down state prior to the update  
command, the power-up delay time is 10μs. However, if  
all four DACs and the integrated reference are powered  
down,thenthemainbiasgenerationcircuitblockhasbeen  
automatically shut down in addition to the DAC amplifiers  
andreferencebuffers.Inthiscase,thepower-updelaytime  
When drawing a load current from either rail, the output  
voltage headroom with respect to that rail is limited by  
the 50Ω typical channel resistance of the output devices  
(e.g., when sinking 1mA, the minimum output voltage is  
50Ω • 1mA, or 50mV). See the graph “Headroom at Rails  
vs Output Current” in the Typical Performance Character-  
istics section.  
The amplifier is stable driving capacitive loads of up to  
500pF.  
2634fb  
22  
LTC2634  
OPERATION  
Rail-to-Rail Output Considerations  
the LTC2634 GND pin to the ground plane should be as  
low as possible. Resistance here will add directly to the  
effective DC output impedance of the device (typically  
0.1Ω). Note that the LTC2634 is no more susceptible to  
this effect than any other parts of this type; on the con-  
trary, it allows layout-based performance improvements  
to shine rather than limiting attainable performance with  
excessive internal resistance.  
Inanyrail-to-railvoltageoutputdevice,theoutputislimited  
to voltages within the supply range.  
SincetheanalogoutputoftheDACcannotgobelowground,  
it may limit for the lowest codes as shown in Figure 4b.  
Similarly, limiting can occur near full-scale when the REF  
pin is tied to V . If V = V and the DAC full-scale error  
CC  
REF  
CC  
(FSE) is positive, the output for the highest codes limits  
Another technique for minimizing errors is to use a sepa-  
rate power ground return trace on another board layer.  
The trace should run between the point where the power  
supply is connected to the board and the DAC ground pin.  
Thus the DAC ground pin becomes the common point for  
analog ground, digital ground, and power ground. When  
the LTC2634 is sinking large currents, this current flows  
out the ground pin and directly to the power ground trace  
without affecting the analog ground plane voltage.  
at V , as shown in Figure 4c. No full-scale limiting can  
CC  
occur if V is less than V – FSE.  
REF  
CC  
Offset and linearity are defined and tested over the region  
of the DAC transfer function where no output limiting can  
occur.  
Board Layout  
ThePCboardshouldhaveseparateareasfortheanalogand  
digital sections of the circuit. A single, solid ground plane  
should be used, with analog and digital signals carefully  
routed over separate areas of the plane. This keeps digital  
signals away from sensitive analog signals and minimizes  
the interaction between digital ground currents and the  
analog section of the ground plane. The resistance from  
It is sometimes necessary to interrupt the ground plane  
to confine digital ground currents to the digital portion of  
the plane. When doing this, make the gap in the plane only  
as long as it needs to be to serve its purpose and ensure  
that no traces cross over the gap.  
2634fb  
23  
LTC2634  
OPERATION  
2634fb  
24  
LTC2634  
OPERATION  
POSITIVE  
FSE  
V
REF  
= V  
CC  
V
REF  
= V  
CC  
OUTPUT  
VOLTAGE  
OUTPUT  
VOLTAGE  
INPUT CODE  
2634 F04  
OUTPUT  
VOLTAGE  
(4c)  
0V  
0
2,048  
4,095  
INPUT CODE  
(4a)  
0V  
NEGATIVE  
OFFSET  
INPUT CODE  
(4b)  
Figure 4. Effects of Rail-to-Rail Operation on a DAC Transfer Curve (Shown in 12 Bits)  
(4a) Overall Transfer Function  
(4b) Effect of Negative Offset for Codes Near Zero  
(4c) Effect of Postitive Full-Scale Error for Codes Near Full-Scale  
SCK  
CS/LD  
4
5
6
4
5
6
4
5
6
CS/LD  
SCK  
SDI  
CS/LD  
SCK  
SDI  
CS/LD  
SCK  
SDI  
LTC2634UD  
LTC2634UD  
LTC2634UD  
7
7
7
SDO  
SDO  
SDO  
DATA OUTPUT  
SDI  
• • •  
2634 F05  
Figure 5. Daisy-Chain Operation (QFN Only)  
2634fb  
25  
LTC2634  
TYPICAL APPLICATION  
2634fb  
26  
LTC2634  
PACKAGE DESCRIPTION  
UD Package  
16-Lead Plastic QFN (3mm × 3mm)  
(Reference LTC DWG # 05-08-1691)  
0.70 p0.05  
3.50 p 0.05  
2.10 p 0.05  
1.45 p 0.05  
(4 SIDES)  
PACKAGE OUTLINE  
0.25 p0.05  
0.50 ꢀSC  
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS  
ꢀOTTOM VIEW—EXPOSED PAD  
PIN 1 NOTCH R = 0.20 TYP  
OR 0.25 s 45o CHAMFER  
R = 0.115  
TYP  
0.75 p 0.05  
3.00 p 0.10  
(4 SIDES)  
15 16  
PIN 1  
TOP MARK  
(NOTE 6)  
0.40 p 0.10  
1
2
1.45 p 0.10  
(4-SIDES)  
(UD16) QFN 0904  
0.200 REF  
0.25 p 0.05  
0.00 – 0.05  
0.50 ꢀSC  
NOTE:  
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)  
2. DRAWING NOT TO SCALE  
3. ALL DIMENSIONS ARE IN MILLIMETERS  
4. DIMENSIONS OF EXPOSED PAD ON ꢀOTTOM OF PACKAGE DO NOT INCLUDE  
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE  
5. EXPOSED PAD SHALL ꢀE SOLDER PLATED  
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION  
ON THE TOP AND ꢀOTTOM OF PACKAGE  
2634fb  
27  
LTC2634  
PACKAGE DESCRIPTION  
MSE Package  
10-Lead Plastic MSOP, Exposed Die Pad  
(Reference LTC DWG # 05-08-1664 Rev C)  
BOTTOM VIEW OF  
EXPOSED PAD OPTION  
2.06 p 0.102  
(.081 p .004)  
1.83 p 0.102  
(.072 p .004)  
2.794 p 0.102  
(.110 p .004)  
0.889 p 0.127  
(.035 p .005)  
1
0.29  
REF  
0.05 REF  
5.23  
(.206)  
MIN  
2.083 p 0.102 3.20 – 3.45  
(.082 p .004) (.126 – .136)  
DETAIL “ꢀ”  
CORNER TAIL IS PART OF  
THE LEADFRAME FEATURE.  
FOR REFERENCE ONLY  
NO MEASUREMENT PURPOSE  
DETAIL “ꢀ”  
10  
0.50  
(.0197)  
BSC  
0.305 p 0.038  
(.0120 p .0015)  
TYP  
3.00 p 0.102  
(.118 p .004)  
(NOTE 3)  
0.497 p 0.076  
(.0196 p .003)  
10 9  
8
7 6  
RECOMMENDED SOLDER PAD LAYOUT  
REF  
3.00 p 0.102  
(.118 p .004)  
(NOTE 4)  
4.90 p 0.152  
(.193 p .006)  
DETAIL “A”  
0.254  
(.010)  
0o – 6o TYP  
1
2
3
4 5  
GAUGE PLANE  
0.53 p 0.152  
(.021 p .006)  
0.86  
(.034)  
REF  
1.10  
(.043)  
MAX  
DETAIL “A”  
0.18  
(.007)  
SEATING  
PLANE  
0.17 – 0.27  
(.007 – .011)  
TYP  
0.1016 p 0.0508  
(.004 p .002)  
0.50  
(.0197)  
BSC  
MSOP (MSE) 0908 REV C  
NOTE:  
1. DIMENSIONS IN MILLIMETER/(INCH)  
2. DRAWING NOT TO SCALE  
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.  
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE  
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.  
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE  
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX  
2634fb  
28  
LTC2634  
REVISION HISTORY  
REV  
DATE  
DESCRIPTION  
PAGE NUMBER  
5, 6, 8, 9  
A
10/09 Changes to Electrical Characteristics Maximum Limits  
12/09 Change Pin Name to DNC  
2, 16  
2634fb  
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-  
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.  
29  
LTC2634  
RELATED PARTS  
PART NUMBER  
LTC1660/LTC1665  
LTC1663  
DESCRIPTION  
COMMENTS  
Octal 10/8-ꢀit V  
DACs in 16-Pin Narrow SSOP  
V
CC  
V
CC  
V
CC  
V
CC  
= 2.7V to 5.5V, Micropower, Rail-to-Rail Output  
= 2.7V to 5.5V, 60μA, Internal Reference, SMꢀus Interface  
= 2.7V to 5.5V, Micropower, Rail-to-Rail Output  
OUT  
Single 10-ꢀit V  
DAC in SOT-23  
OUT  
LTC1664  
Quad 10-ꢀit V  
DAC in 16-Pin Narrow SSOP  
OUT  
2
LTC1669  
Single 10-ꢀit V  
DAC in SOT-23  
= 2.7V to 5.5V, 60μA, Internal reference, I C Interface  
OUT  
LTC1821  
Parallel 16-ꢀit Voltage Output DAC  
DACs in 16-Lead Narrow  
Precision 16-ꢀit Settling in 2μs for 10V Step  
LTC2600/LTC2610/ Octal 16-/14-/12-ꢀit V  
LTC2620  
250μA per DAC, 2.5V to 5.5V Supply Range, Rail-to-Rail Output,  
SPI Serial Interface  
OUT  
SSOP  
LTC2601/LTC2611/ Single 16-/14-/12-ꢀit V  
LTC2621  
DACs in 10-Lead DFN  
300μA per DAC, 2.5V to 5.5V Supply Range, Rail-to-Rail Output,  
SPI Serial Interface  
OUT  
LTC2602/LTC2612/ Dual 16-/14-/12-ꢀit V  
LTC2622  
DACs in 8-Lead MSOP  
DACs in 16-Lead SSOP  
300μA per DAC, 2.5V to 5.5V Supply Range, Rail-to-Rail Output,  
SPI Serial Interface  
OUT  
LTC2604/LTC2614/ Quad 16-/14-/12-ꢀit V  
LTC2624  
250μA per DAC, 2.5V to 5.5V Supply Range, Rail-to-Rail Output,  
SPI Serial Interface  
OUT  
OUT  
2
LTC2605/LTC2615/ Octal 16-/14-/12-ꢀit V  
LTC2625  
DACs with I C Interface  
250μA per DAC, 2.7V to 5.5V Supply Range, Rail-to-Rail Output,  
2
I C Interface  
2
LTC2606/LTC2616/ Single 16-/14-/12-ꢀit V  
LTC2626  
DACs with I C Interface  
270μA per DAC, 2.7V to 5.5V Supply Range, Rail-to-Rail Output,  
OUT  
2
I C Interface  
2
LTC2609/LTC2619/ Quad 16-/14-/12-ꢀit V  
LTC2629  
DACs with I C Interface  
250μA per DAC, 2.7V to 5.5V Supply Range, Rail-to-Rail Output with  
OUT  
Separate V Pins for Each DAC  
REF  
LTC2630  
LTC2631  
LTC2636  
LTC2640  
Single 12-/10-/8-ꢀit V  
Reference in SC70  
DACs with 10ppm/°C  
180μA per DAC, 2.7V to 5.5V Supply Range, 10ppm/°C Reference,  
Rail-to-Rail Output, SPI Serial Interface  
OUT  
2
Single 12-/10-/8-ꢀit I C V  
DACs with 10ppm/°C  
180μA per DAC, 2.7V to 5.5V Supply Range, 10ppm/°C Reference,  
OUT  
2
Reference in ThinSOT  
External REF Mode, Rail-to-Rail Output, I C Interface  
Octal 12-/10-/8-ꢀit V  
Reference  
DACs with 10ppm/°C  
125μA per DAC, 2.7V to 5.5V Supply Range, 10ppm/°C Reference,  
External REF Mode, Rail-to-Rail Output, SPI Interface  
OUT  
Single 12-/10-/8-ꢀit V  
Reference in ThinSOT  
DACs with 10ppm/°C  
180μA per DAC, 2.7V to 5.5V Supply Range, 10ppm/°C Reference,  
External REF Mode, Rail-to-Rail Output, SPI Interface  
OUT  
ThinSOT is a trademark of Linear Technology Corporation  
2634fb  
LT 1209 REV B • PRINTED IN USA  
LinearTechnology Corporation  
1630 McCarthy ꢀlvd., Milpitas, CA 95035-7417  
30  
© LINEAR TECHNOLOGY CORPORATION 2009  
(408) 432-1900 FAX: (408) 434-0507 www.linear.com  
配单直通车
LTC2634CMSE-LMX8#PBF产品参数
型号:LTC2634CMSE-LMX8#PBF
Brand Name:Analog Devices Inc
是否无铅:含铅
是否Rohs认证:符合
生命周期:Active
IHS 制造商:ANALOG DEVICES INC
针数:10
制造商包装代码:05-08-1664
Reach Compliance Code:compliant
风险等级:5.56
Is Samacsys:N
转换器类型:D/A CONVERTER
输入位码:BINARY
JESD-30 代码:R-PDSO-G10
JESD-609代码:e3
最大线性误差 (EL):0.19%
湿度敏感等级:1
位数:8
功能数量:4
端子数量:10
最高工作温度:70 °C
最低工作温度:
封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP
封装等效代码:TSSOP10,.19,20
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源:3/5 V
认证状态:Not Qualified
子类别:Other Converters
最大压摆率:0.9 mA
表面贴装:YES
技术:CMOS
温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)
端子形式:GULL WING
端子节距:0.5 mm
端子位置:DUAL
Base Number Matches:1
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