LTC2634
OPERATION
While the minimum input sequence is 24 bits, it may
optionally be extended to 32 bits to accommodate micro-
processors that have a minimum word width of 16 bits
(2 bytes). To use the 32-bit width, 8 don’t care bits
must be transferred to the device first, followed by the
24-bit sequence described. Figure 3b shows the 32-bit
sequence.
Reference Modes
For applications where an accurate external reference is
either not available, or not desirable due to limited space,
the LTC2634 has a low noise, user-selectable, integrated
reference. The integrated reference voltage is internally
amplified by 2x to provide the full-scale DAC output volt-
age range. The LTC2634-LMI/LTC2634-LMX/LTC2634-LZ
provides a full-scale DAC output of 2.5V. The LTC2634-
HMI/LTC2634-HMX/LTC2634-HZ provides a full-scale
DAC output of 4.096V. The internal reference can be
useful in applications where the supply voltage is poorly
regulated. Internal Reference mode can be selected by
using command 0110b, and is the power-on default for
LTC2634-HZ/LTC2634-LZ, as well as for LTC2634-HMI/
LTC2634-LMI.
The 16-bit data word is ignored for all commands that do
not include a write operation.
Daisy-Chain Operation (QFN Package)
The serial output of the shift register appears at the SDO
pin on the QFN package. Data transferred to the device
from the SDI input is delayed 32 SCK rising edges before
being output at the next SCK falling edge, therefore, daisy
chaining multiple LTC2634 DACs requires 32-bit data
write cycles.
The 10ppm/°C, 1.25V (LTC2634-LMI/LTC2634-LMX/
LTC2634-LZ) or 2.048V (LTC2634-HMI/LTC2634-HMX/
LTC2634-HZ) internal reference is available at the REF pin.
Adding bypass capacitance to the REF pin will improve
noiseperformance;0.1μFisrecommended,andupto10μF
can be driven without oscillation. The REF output must be
buffered when driving an external DC load current.
TheSDOoutputcanbeusedtofacilitatecontrolofmultiple
serial devices from a single 3-wire serial port (i.e., SCK,
SDIandCS/LD). Sucha“daisy-chain”seriesisconfigured
by connecting SDO of each upstream device to SDI of the
next device in the chain. The shift registers of the devices
are thus connected in series, effectively forming a single
inputshiftregisterwhichextendsthroughtheentirechain.
ꢀecauseofthis,thedevicescanbeaddressedandcontrolled
individually by simply concatenating their input words;
the first instruction addresses the last device in the chain
and so forth. The SCK and CS/LD signals are common to
all devices in the series. Figure 5 shows a block diagram
for daisy-chain operation.
Alternatively, the DAC can operate in external reference
modeusingcommand0111b.Inthismode,aninputvoltage
supplied externally to the REF pin provides the reference
(1V ꢁ V ꢁ V ) and the supply current is reduced. The
REF
CC
external reference voltage supplied sets the full-scale DAC
output voltage. External reference mode is the power-on
default for LTC2634-HMX/LTC2634-LMX.
The reference mode of LTC2634-HZ/LTC2634-LZ/
LTC2634-HMI/LTC2634-LMI(internalreferencepower-on
default),canbechangedbysoftwarecommandafterpower
up. The same is true for LTC2634-HMX/-LMX (external
reference power-on default).
In use, CS/LD is first taken low. Then the concatenated
input data is transferred to the chain, using SDI of the
first device as the data input. When the data transfer is
complete, CS/LD is taken high, completing the instruction
sequence for all devices simultaneously. A single device
can be controlled by using the no-operation command
(1111) for the other devices in the chain.
The LTC2634’s QFN package offers a REFLO pin for the
negative reference. REFLO must be connected to GND.
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