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  • LTC4100EG图
  • 集好芯城

     该会员已使用本站13年以上
  • LTC4100EG 现货库存
  • 数量21626 
  • 厂家LINEAR(凌特) 
  • 封装 
  • 批号22+ 
  • 原装原厂现货
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  • 北京元坤伟业科技有限公司

     该会员已使用本站17年以上
  • LTC4100EG 现货库存
  • 数量5000 
  • 厂家LINEAR 
  • 封装SSOP24 
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  • 深圳市正信鑫科技有限公司

     该会员已使用本站12年以上
  • LTC4100EG#PBF 现货库存
  • 数量8002 
  • 厂家LT 
  • 封装原厂封装 
  • 批号22+ 
  • 原装正品★真实库存★价格优势★欢迎来电洽谈
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  • 深圳市广百利电子有限公司

     该会员已使用本站6年以上
  • LTC4100EG#TRPBF 现货库存
  • 数量15000 
  • 厂家ADI 
  • 封装SSOP24 
  • 批号22+ 
  • ★★全网低价,原装原包★★
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  • LTC4100EG图
  • 深圳市宗天技术开发有限公司

     该会员已使用本站10年以上
  • LTC4100EG 现货库存
  • 数量8000 
  • 厂家LINEAR(凌特) 
  • 封装 
  • 批号22+ 
  • 宗天技术 原装现货/假一赔十
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  • 深圳市芯脉实业有限公司

     该会员已使用本站11年以上
  • LTC4100EG#PBF 现货库存
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  • 封装24-Lead SSOP 
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  • 深圳市芯脉实业有限公司

     该会员已使用本站11年以上
  • LTC4100EG#PBF 现货库存
  • 数量8888 
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  • 全球渠道、原厂正品、信誉保障、闪电发货
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  • 深圳市宏世佳电子科技有限公司

     该会员已使用本站13年以上
  • LTC4100EG#TRPBF 现货热卖
  • 数量5216 
  • 厂家LINEAR 
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  • 深圳市拓森弘电子有限公司

     该会员已使用本站1年以上
  • LTC4100EG
  • 数量5300 
  • 厂家LINEAR(凌特) 
  • 封装 
  • 批号21+ 
  • 全新原装正品,现货库存欢迎咨询
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  • LTC4100EG图
  • 深圳市芯福林电子有限公司

     该会员已使用本站15年以上
  • LTC4100EG
  • 数量13880 
  • 厂家LINEAR/凌特 
  • 封装SOP 
  • 批号21+ 
  • 公司只售原装 支持实单
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  • 深圳市芯福林电子有限公司

     该会员已使用本站15年以上
  • LTC4100EG#PBF
  • 数量85000 
  • 厂家ADI/亚德诺 
  • 封装 
  • 批号23+ 
  • 真实库存全新原装正品!代理此型号
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  • LTC4100EG图
  • 深圳市龙腾新业科技有限公司

     该会员已使用本站17年以上
  • LTC4100EG
  • 数量14686 
  • 厂家LINEAR/凌特 
  • 封装SSOP 
  • 批号24+ 
  • 原装原厂 现货现卖
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  • LTC4100EG图
  • 深圳市恒达亿科技有限公司

     该会员已使用本站12年以上
  • LTC4100EG
  • 数量3000 
  • 厂家LT 
  • 封装SSOP24 
  • 批号25+ 
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  • LTC4100EG图
  • 深圳市欧立现代科技有限公司

     该会员已使用本站12年以上
  • LTC4100EG
  • 数量5321 
  • 厂家LT 
  • 封装SSOP24 
  • 批号24+ 
  • 全新原装现货,欢迎询购!
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  • LTC4100EG图
  • 深圳市欧立现代科技有限公司

     该会员已使用本站12年以上
  • LTC4100EG
  • 数量500 
  • 厂家LT 
  • 封装SSOP 
  • 批号24+ 
  • ★★专业IC现货,诚信经营,市场最优价★★
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  • LTC4100EG图
  • 深圳市恒达亿科技有限公司

     该会员已使用本站16年以上
  • LTC4100EG
  • 数量4500 
  • 厂家LT 
  • 封装SSOP-24 
  • 批号25+ 
  • 全新原装现货特价销售!
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  • LTC4100EG图
  • 深圳市恒达亿科技有限公司

     该会员已使用本站12年以上
  • LTC4100EG
  • 数量3000 
  • 厂家LT 
  • 封装SSOP 
  • 批号25+ 
  • 全新原装公司现货库存!
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  • LTC4100EG图
  • 深圳市晶美隆科技有限公司

     该会员已使用本站15年以上
  • LTC4100EG
  • 数量36500 
  • 厂家LINEAR/凌特 
  • 封装SSOP24 
  • 批号24+ 
  • 假一罚十,原装进口正品现货供应,价格优势。
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  • LTC4100EG图
  • 北京耐芯威科技有限公司

     该会员已使用本站13年以上
  • LTC4100EG
  • 数量5000 
  • 厂家LT 
  • 封装 
  • 批号21+ 
  • 原装正品,公司现货
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  • LTC4100EG图
  • 北京耐芯威科技有限公司

     该会员已使用本站12年以上
  • LTC4100EG
  • 数量3500 
  • 厂家LT 
  • 封装 
  • 批号21+ 
  • 原装正品,公司现货
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  • 深圳市得捷芯城科技有限公司

     该会员已使用本站11年以上
  • LTC4100EG
  • 数量1200 
  • 厂家LINEAR/凌特 
  • 封装NA/ 
  • 批号23+ 
  • 优势代理渠道,原装正品,可全系列订货开增值税票
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  • LTC4100EG图
  • 集好芯城

     该会员已使用本站13年以上
  • LTC4100EG
  • 数量14686 
  • 厂家LINEAR/凌特 
  • 封装SSOP 
  • 批号最新批次 
  • 原装原厂 现货现卖
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  • LTC4100EG图
  • 深圳市晶美隆科技有限公司

     该会员已使用本站14年以上
  • LTC4100EG
  • 数量11531 
  • 厂家LT 
  • 封装SSOP 
  • 批号23+ 
  • 全新原装正品现货特价
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  • 深圳市宏世佳电子科技有限公司

     该会员已使用本站13年以上
  • LTC4100EG#PBF
  • 数量3665 
  • 厂家ADI/LT 
  • 封装24-SSOP(0.209,5.30mm 宽) 
  • 批号2023+ 
  • 全新原厂原装产品、公司现货销售
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  • 深圳市得捷芯城科技有限公司

     该会员已使用本站11年以上
  • LTC4100EG#PBF
  • 数量7118 
  • 厂家ADI(亚德诺) 
  • 封装24SSOP 
  • 批号23+ 
  • 原厂可订货,技术支持,直接渠道。可签保供合同
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  • 首天国际(深圳)集团有限公司

     该会员已使用本站17年以上
  • LTC4100EG#PBF
  • 数量5000 
  • 厂家LINEAR 
  • 封装SSOP24 
  • 批号2024+ 
  • 百分百原装正品,现货库存
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  • 深圳市硅诺电子科技有限公司

     该会员已使用本站8年以上
  • LTC4100EG#PBF
  • 数量43736 
  • 厂家LINEAR 
  • 封装SSOP24 
  • 批号17+ 
  • 原厂指定分销商,有意请来电或QQ洽谈
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  • 深圳市集创讯科技有限公司

     该会员已使用本站5年以上
  • LTC4100EG#PBF
  • 数量13500 
  • 厂家ADI/亚德诺 
  • 封装SSOP-24 
  • 批号24+ 
  • 原装进口正品现货,假一罚十价格优势
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  • 深圳市宏捷佳电子科技有限公司

     该会员已使用本站6年以上
  • LTC4100EG#PBF
  • 数量15300 
  • 厂家Analog Devices Inc. 
  • 封装24-SSOP(0.209,5.30mm 宽) 
  • 批号24+ 
  • 只做原装★真实库存★含13点增值税票!
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  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
  • LTC4100EG#PBF
  • 数量12500 
  • 厂家ADI/亚德诺 
  • 封装SSOP-24 
  • 批号2023+ 
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  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
  • LTC4100EG
  • 数量72396 
  • 厂家LT 
  • 封装SSOP24 
  • 批号2023+ 
  • 绝对原装正品现货,全新深圳原装进口现货
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  • 深圳市羿芯诚电子有限公司

     该会员已使用本站7年以上
  • LTC4100EG#TRPBF
  • 数量8800 
  • 厂家ADI/亚德诺 
  • 封装原厂封装 
  • 批号新年份 
  • 羿芯诚只做原装,原厂渠道,价格优势可谈!
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  • 北京元坤伟业科技有限公司

     该会员已使用本站17年以上
  • LTC4100EG
  • 数量5000 
  • 厂家LINEAR 
  • 封装SSOP24 
  • 批号2024+ 
  • 百分百原装正品,现货库存
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  • 深圳市宏诺德电子科技有限公司

     该会员已使用本站8年以上
  • LTC4100EG
  • 数量68000 
  • 厂家LINEAR 
  • 封装SSOP24 
  • 批号22+ 
  • 全新进口原厂原装,优势现货库存,有需要联系电话:18818596997 QQ:84556259
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  • 深圳市惊羽科技有限公司

     该会员已使用本站11年以上
  • LTC4100EG#PBF
  • 数量2368 
  • 厂家ADI-亚德诺 
  • 封装TSSOP-24 
  • 批号▉▉:2年内 
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产品型号LTC4100EG的概述

LTC4100EG 概述 LTC4100EG 是一款由 Analog Devices(原 Linear Technology)推出的高性能电池管理芯片,专为锂离子电池应用设计,能够帮助实现智能电池充电和监测。该芯片具有集高精度电压和电流监控于一体的特点,广泛适用于电池组、移动电源及其他储能设备。以其优秀的电源管理能力和便利的使用, LTC4100EG 成为设计复杂电池供电系统的理想选择。 详细参数 LTC4100EG 的主要技术参数包括: - 输入电压范围:4.5V 至 28V,适合多种应用场景。 - 充电电流范围:最大可支持 6A 的充电电流,以满足大容量电池的充电需求。 - 充电电压精度:±1.5% 的电压精度,确保在充电过程中不会对电池造成损害。 - 电流监测精度:±1% 的电流监控精度,保证电池充电过程中对电流的精准控制,延长电池寿命。 - 电池温度监测:内置多个温度传感器接口...

产品型号LTC4100EG的Datasheet PDF文件预览

LTC4100  
Smart Battery  
Charger Controller  
U
July 2003  
DESCRIPTIO  
FEATURES  
The LTC®4100 Smart Battery Charger is a single chip  
charging solution that dramatically simplifies construc-  
tion of an SBS compliant system. The LTC4100 imple-  
ments a Level 2 charger function whereby the charger can  
beprogrammedbythebatteryorbythehost.ASafetySignal  
on the battery being charged is monitored for tempera-  
ture,connectivityandbatterytypeinformation.TheSMBus  
interface remains alive when the AC power adapter is  
removed and responds to all SMBus activity directed to  
it, including SafetySignal status (via the ChargerStatus  
command). The charger also provides an interrupt to the  
host whenever a status change is detected (e.g., battery  
removal, AC adapter connection).  
Single Chip Smart Battery Charger Controller  
100% Compliant (Rev. 1.1) SMBus Support allows  
for Operation with or without Host  
SMBus Accelerator Improves SMBus Timing*  
Wide Output Voltage Range: 6.4V to 26V  
Hardware Interrupt and SMBAlert Response  
Eliminate Interrupt Polling  
High Efficiency Synchronous Buck Charger  
0.5V Dropout Voltage; Maximum Duty Cycle > 98%  
AC Adapter Current Limit Maximizes Charge Rate  
±0.8% Voltage Accuracy; ±5% Current Accuracy  
Up to 4A Charging Current Capability  
10-Bit DAC for Charge Current Programming  
11-Bit DAC for Charger Voltage Programming  
Charging current and voltage are restricted to chemistry  
specific limits for improved system safety and reliability.  
Limits are programmable by two external resistors. Addi-  
tionally,themaximumaveragecurrentfromtheACadapter  
is programmable to avoid overloading the adapter when  
simultaneously supplying load current and charging  
current. When supplying system load current, charging  
current is automatically reduced to prevent adapter over-  
load.**  
User-Selectable Overvoltage and Overcurrent Limits  
High Noise Immunity SafetySignal Sensor  
Small 24-Pin Narrow (0.209") SSOP Package  
U
APPLICATIO S  
Portable Instruments and Computers  
Data Storage Systems and Battery Backup Servers  
, LTC and LT are registered trademarks of Linear Technology Corporation.  
*U.S. Patent No. 6,650,174 **U.S. Patent No. 5,723,970  
U
TYPICAL APPLICATIO  
DCIN  
0.1µF  
13.7k  
1.21k  
3V  
TO 5.5V  
0.1µF  
0.033Ω  
LTC4100  
17  
V
5
DCIN  
INFET  
CLP  
DD  
11  
4
5k  
DCDIV  
CHGEN  
ACP  
6
10  
7
24  
23  
1
CHGEN  
ACP  
20µF  
10µH  
SMART BATTERY  
CLN  
0.025Ω  
SMBALERT TGATE  
9
3
SCL  
SDA  
THB  
THA  
BGATE  
PGND  
CSP  
8
2
20µF  
15  
16  
13  
14  
20  
21  
22  
18  
19  
12  
BAT  
I
V
SET  
LIM  
1.13k  
100Ω  
V
LIM  
I
0.01µF  
0.1µF  
TH  
I
GND  
6.04k  
0.12µF  
10k  
DC  
0.0015µF  
54.9k  
0.082µF  
SafetySignal  
SMBALERT#  
SMBCLK  
SMBCLK  
SMBDAT  
SMBDAT  
4100 TA01  
Figure 1. 4A Smart Battery Charger  
sn4100 4100is  
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-  
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.  
1
LTC4100  
W W U W  
U
W
U
ABSOLUTE AXI U RATI GS  
PACKAGE/ORDER I FOR ATIO  
(Note 1)  
TOP VIEW  
ORDER PART  
NUMBER  
Voltage from VDD to GND ................................7V/–0.3V  
Voltage from CHGEN, DCDIV, SDA, SCL  
and SMBALERT to GND .............................. 7V/–0.3V  
Voltage from DCIN, CLP, CLN to GND ........... 32V/–0.3V  
PGND wrt. GND .................................................... ±0.3V  
CSP, BAT to GND..............................................28V/–5V  
Operating Ambient Temperature Range (Note 4)  
TGATE  
PGND  
1
2
3
4
5
6
7
8
9
CLP  
CLN  
BAT  
CSP  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
BGATE  
INFET  
LTC4100EG  
DCIN  
I
DC  
CHGEN  
SMBALERT  
SDA  
I
TH  
V
SET  
V
DD  
SCL  
THA  
THB  
ACP 10  
DCDIV 11  
GND 12  
........................................................... 40°C to 85°C  
Junction Temperature Range............... 40°C to 125°C  
Storage Temperature Range ................. 65°C to 150°C  
Lead Temperature (Soldering, 10 sec).................. 300°C  
V
LIM  
I
LIM  
G PACKAGE  
24-LEAD PLASTIC SSOP  
TJMAX = 125°C, θJA = 90°C/W  
Consult LTC Marketing for parts specified with wider operating temperature ranges.  
ELECTRICAL CHARACTERISTICS  
The denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VDCIN = 20V, VDD = 3.3V, VBAT = 12V unless otherwise noted. (Note 4)  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
28  
UNITS  
V
DCIN Operating Range  
DCIN Operating Current  
Charge Voltage Accuracy  
6
I
Charging  
(Note 2)  
3
5
mA  
DCIN  
V
–0.8  
–1  
0.8  
1
%
%
TOL  
I
Charge Current Accuracy (Note 3)  
V
I
– V  
= 0xFFFF  
Target = 102.3mV  
–3  
–5  
3
5
%
%
TOL  
CSP  
DAC  
BAT  
V
V
Operating Voltage  
0V V  
DCIN  
32V  
3
5.5  
V
DD  
DD  
Shutdown  
Battery Leakage Current  
DCIN = 0V, V  
= V  
= V  
= V  
BAT  
15  
30  
5.5  
3
µA  
V
CLP  
CLN  
CSP  
UVLO  
Undervoltage Lockout Threshold  
DCIN Rising, V  
= 0V  
4.2  
4.7  
BAT  
V
Power-Fail  
Part Held in Reset Until this V Present  
V
DD  
DD  
DCIN Current in Shutdown  
Current Sense Amplifier, CA1  
Input Bias Current into BAT Pin  
CA1/I Input Common Mode Low  
V
= 0V  
2
3
mA  
CHGEN  
11.66  
µA  
V
CMSL  
CMSH  
0
1
CA1/I Input Common Mode High  
V
28V  
V -0.2  
CLN  
V
1
DCIN  
sn4100 4100is  
2
LTC4100  
ELECTRICAL CHARACTERISTICS  
The denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VDCIN = 20V, VDD = 3.3V, VBAT = 12V unless otherwise noted. (Note 4)  
SYMBOL  
PARAMETER  
and I  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
Current Comparators I  
CMP  
REV  
I
I
Maximum Current Sense Threshold (V -V  
)
V = 2.4V  
ITH  
140  
165  
200  
mV  
mV  
TMAX  
TREV  
CSP BAT  
Reverse Current Threshold (V -V  
)
– 30  
CSP BAT  
Current Sense Amplifier, CA2  
Transconductance  
1
mmho  
µA  
Source Current  
Sink Current  
Measured at I , V = 1.4V  
–40  
40  
TH ITH  
Measured at I , V = 1.4V  
µA  
TH ITH  
Current Limit Amplifier  
Transconductance  
1.5  
100  
100  
mmho  
mV  
V
Current Limit Threshold  
CLP Input Bias Current  
93  
107  
110  
CLP  
I
nA  
CLP  
Voltage Error Amplifier, EA  
Transconductance  
Sink Current  
1
mmho  
µA  
Measured at I  
V
= 1.4V  
36  
TH, ITH  
OVSD  
Overvoltage Shutdown Threshold as a Percent  
of Programmed Charger Voltage  
102  
0.0  
107  
%
Input P-Channel FET Driver (INFET)  
DCIN DetectionThreshold (V  
-V  
)
DCIN Voltage Ramping Up  
from V -0.05V  
0.17  
0.25  
50  
V
DCIN CLP  
CLP  
Forward Regulation Voltage (V  
-V  
)
25  
–25  
5.8  
mV  
mV  
V
DCIN CLP  
Reverse Voltage Turn-Off Voltage (V  
-V  
)
–60  
5
DCIN CLP  
INFET “ON” Clamping Voltage (V  
-V  
)
I
I
= 1µA  
6.5  
DCIN INFET  
INFET  
INFET  
INFET “OFF” Clamping Voltage (V  
-V  
)
= –25µA  
0.25  
V
DCIN INFET  
Oscillator  
f
f
Regulator Switching Frequency  
255  
20  
300  
25  
345  
kHz  
kHz  
%
OSC  
MIN  
Regulator Switching Frequency in Drop Out  
Regulator Maximum Duty Cycle  
Duty Cycle 98%  
DC  
V
= V  
BAT  
98  
99  
MAX  
CSP  
Gate Drivers (TGATE, BGATE)  
V
V
V
V
High (V -V  
)
I
I
I
I
= –1mA  
= –1mA  
= 1mA  
= 1mA  
50  
10  
10  
50  
mV  
V
TGATE  
BGATE  
TGATE  
BGATE  
CLN TGATE  
TGATE  
BGATE  
TGATE  
BGATE  
High  
Low (V -V  
5.6  
5.6  
)
V
CLN TGATE  
Low  
mV  
TGATE Transition Time  
TGATE Rise Time  
TGATE Fall Time  
TGTR  
TGTF  
C
C
= 3000pF, 10% to 90%  
= 3000pF, 10% to 90%  
50  
50  
110  
100  
ns  
ns  
LOAD  
LOAD  
BGATE Transition Time  
BGATE Rise Time  
BGATE Fall Time  
BGTR  
BGTF  
C
C
= 3000pF, 10% to 90%  
= 3000pF, 10% to 90%  
40  
40  
90  
80  
ns  
ns  
LOAD  
LOAD  
V
V
at Shutdown (V -V  
)
I
I
= –1µA  
= 1µA  
100  
100  
mV  
mV  
TGATE  
BGATE  
CLN TGATE  
TGATE  
TGATE  
at Shutdown  
sn4100 4100is  
3
LTC4100  
ELECTRICAL CHARACTERISTICS  
The denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VDCIN = 20V, VDD = 3.3V, VBAT = 12V unless otherwise noted. (Note 4)  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
1.26  
1
UNITS  
AC Present Comparator  
V
DCDIV Threshold  
V
Rising from 1V to 1.4V  
1.14  
1.20  
25  
V
mV  
µA  
V
ACP  
DCDIV  
DCDIV Hysteresis  
DCDIV Input Bias Current  
V
= 1.2V  
–1  
2
DCDIV  
ACP V  
ACP V  
I
I
= –2mA  
OH  
OL  
ACP  
ACP  
= 1mA  
= 1.3V  
0.5  
10  
V
DCDIV to ACP Delay  
SafetySignal Decoder  
SafetySignal Trip (RES_COLD/RES_OR)  
V
µs  
DCDIV  
R
THA  
R
THB  
= 1130Ω ±1%, C = 1nF (Note 6)  
= 54.9Ω ±1%  
95  
100  
30  
105  
31.5  
3.15  
575  
kΩ  
kΩ  
kΩ  
TH  
SafetySignal Trip (RES_IDEAL/RES_COLD)  
SafetySignal Trip (RES_HOT/RES_IDEAL)  
SafetySignal Trip (RES_UR/RES_HOT)  
R
THA  
R
THB  
= 1130Ω ±1%, C = 1nF (Note 6)  
= 54.9Ω ±1%  
28.5  
2.85  
425  
TH  
R
THA  
R
THB  
= 1130Ω ±1%, C = 1nF (Note 6)  
= 54.9Ω ±1%  
3
TH  
R
THA  
R
THB  
= 1130Ω ±1%, C = 1nF (Note 6)  
= 54.9Ω ±1%  
500  
32  
TH  
Time Between SafetySignal Measurements DCDIV = 1.3V  
DCDIV = 1V  
ms  
ms  
250  
DACs  
Charging Current Resolution  
Charging Current Granularity  
Guaranteed Monotonic Above I  
/16  
MAX  
10  
Bits  
R
LIMIT  
R
LIMIT  
R
LIMIT  
R
LIMIT  
= 0  
1
2
4
4
mA  
mA  
mA  
mA  
= 10k ±1%  
= 33k ±1%  
= Open (or Short to V  
)
DD  
Wake-Up Charging Current (I  
)
All Values of R  
All Values of R  
80 (NOTE 5)  
mA  
mV  
mV  
mV  
mV  
WAKE-UP  
ILIM  
VLIM  
Charging Current Limit  
CSP – BAT  
R
LIMIT  
= 0 (0-1A)  
97.3  
97.3  
72.3  
97.3  
11  
107.3  
107.3  
82.3  
Charging Current = 0x03FF (0x0400 Note 7)  
R
= 10k ±1%, (0-2A)  
LIMIT  
Charging Current = 0x07FE (0x0800 Note 7)  
R
= 33k ±1% (0-3A)  
LIMIT  
Charging Current = 0x0BFC (0x0C00 Note 7)  
R
LIMIT  
= 0pen (or Short to V ) (0-4A)  
107.3  
DD  
Charging Current = 0x0FFC (0x1000 Note 7)  
Charging Voltage Resolution  
Charging Voltage Granularity  
Guaranteed Monotonic (2.9V V 28V)  
Bits  
mV  
BAT  
16  
sn4100 4100is  
4
LTC4100  
ELECTRICAL CHARACTERISTICS  
The denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VDCIN = 20V, VDD = 3.3V, VBAT = 12V unless otherwise noted. (Note 4)  
SYMBOL  
PARAMETER  
CONDITIONS  
= 0  
MIN  
TYP  
MAX  
UNITS  
Charging Voltage Limit  
R
8.730  
8.800  
8.870  
V
VLIM  
Charging Voltage = 0x2260 (Note 7)  
R
= 10k ±1%  
12.999 13.104 13.209  
17.269 17.408 17.547  
21.538 21.712 21.886  
27.781 28.006 28.231  
V
V
V
V
VLIM  
Charging Voltage = 0x3330 (Note 7)  
R
VLIM  
= 33k ±1%  
Charging Voltage = 0x4400 (Note 7)  
R
VLIM  
= 100k ±1%  
Charging Voltage = 0x5400 DCIN 22V (Note 7)  
R
VLIM  
= 0pen (or Short to V  
)
DD  
Charging Voltage = 0x6D60 DCIN 29V (Note 7)  
Logic Levels  
V
V
V
SCL/SDA Input Low Voltage  
SCL/SDA Input High Voltage  
SDA Output Low Voltage  
0.8  
V
V
IL  
2.1  
IH  
OL  
I
= 350µA  
0.4  
V
PULL-UP  
I
I
SCL/SDA Input Current  
V
V
, V  
= V  
= V  
–1  
–1  
1
µA  
µA  
V
IL  
IH  
SDA SCL  
IL  
SCL/SDA Input Current  
, V  
SDA SCL  
1
IH  
V
SMBALERT Output Low Voltage  
SMBALERT Output Pull-Up Current  
CHGEN Output Low Voltage  
CHGEN Output Pull-Up Current  
CHGEN Input Low Voltage  
I
= 500µA  
PULL-UP  
0.5  
–3.5  
0.4  
–3.5  
0.9  
OL  
V
= V  
–17.5  
–17.5  
–10  
–10  
µA  
V
SMBALERT  
OL  
V
I
= 100µA  
OL  
OL  
V
= V  
µA  
CHGEN  
OL  
V
V
V
V
IL  
CHGEN Input High Voltage  
Power-On Reset Duration  
V
V
= 3V  
= 5.5V  
2.5  
V
V
IH  
DD  
DD  
3.9  
V
Ramp from 0V to >3V in <5µs  
100  
µs  
DD  
SMBus Timing (Refer to System Management Bus Specification, Revision 1.1, Section 2.1 for Timing Diagrams)  
t
t
t
t
t
t
t
SCL Serial Clock High Period  
SCL Serial Clock Low Period  
SDA/SCL Rise Time  
I
I
= 350µA, C  
= 350µA, C  
= 250pF, R = 9.31k  
4
µs  
µs  
ns  
ns  
µs  
µs  
ns  
HIGH  
LOW  
R
PULL-UP  
PULL-UP  
LOAD  
LOAD  
PU  
= 250pF, R = 9.31k  
4.7  
15000  
1000  
300  
PU  
C
C
= 250pF, R = 9.31k  
PU  
LOAD  
LOAD  
SDA/SCL Fall Time  
= 250pF, R = 9.31k  
PU  
F
Start Condition Setup Time  
StartCondition Hold Time  
4.7  
4
SU:STA  
HD:STA  
HD:DAT  
SDA to SCL Falling-Edge Hold Time,  
Slave Clocking in Data  
300  
t
Time Between Receiving Valid  
ChargingCurrent() and  
140  
175  
210  
sec  
TIMEOUT  
ChargingVoltage() Commands  
Note 1: Absolute Maximum Ratings are those values beyond which the life  
of a device may be impaired.  
Note 5: Current accuracy dependent upon circuit compensation and sense  
resistor.  
Note 2: See Test Circuit.  
Note 3: Does not include tolerance of current sense resistor.  
Note 6: C is defined as the sum of capacitance on THA, THB and  
SafetySignal.  
TH  
Note 7: The corresponding overrange bit will be set when a HEX value  
greater than or equal to this value is used.  
Note 4: The LTC4100E is guaranteed to meet performance specifications  
from 0°C to 70°C. Specifications over the –40°C to 85°C operating  
temperature range are assured by design, characterization and correlation  
with statistical process controls.  
sn4100 4100is  
5
LTC4100  
U
U
U
PI FU CTIO S  
ILIM (Pin 13): An external resistor is connected between  
this pin and GND. The value of the external resistor  
programs the range and resolution of the programmed  
charger current.  
TGATE (Pin 1): Drives the Top External P-MOSFET of the  
Battery Charger Buck Converter.  
PGND (Pin 2): High Current Ground Return for BGATE  
Driver.  
V
LIM (Pin 14): An external resistor is connected between  
BGATE (Pin 3): Drives the Bottom External N-MOSFET of  
the Battery Charger Buck Converter.  
this pin and GND. The value of the external resistor  
programs the range and resolution of the charging volt-  
age.  
INFET (Pin 4): Drives the Gate of the External Input  
P-MOSFET.  
THB (Pin 15): SafetySignal Force/Sense Pin to Smart  
Battery. See description of operation for more detail. The  
maximum allowed combined capacitance on THA, THB  
and SafetySignal is 1nF (see Figure 4). A series resistor  
54.9k needs to be connected between this pin and the  
battery’s SafetySignal for this circuit to work correctly.  
DCIN (Pin 5): External DC Power Source Input.  
CHGEN (Pin 6): Digital Bidirectional Pin to Enable Charger  
Function. This pin is connected as a wired AND bus.  
The following events will cause the POWER_FAIL bit in  
the ChargerStatus register to become set:  
THA (Pin 16): SafetySignal Force/Sense Pin to Smart  
Battery. See description of operation for more detail. The  
maximum allowed combined capacitance on THA, THB  
and SafetySignal is 1nF (see Figure 4). A series resistor  
1130needs to be connected between this pin and the  
battery’s SafetySignal for this circuit to work correctly.  
1. An external device pulling the CHGEN signal to within  
0.9V to GND;  
2. The AC adapter voltage is not above the battery  
voltage.  
SMBALERT (Pin 7): Active Low Interrupt Output to Host  
(referred to as the SMBALERT# signal in the SMBus  
Revision 1.1 specification). Signals host that there has  
been a change of status in the charger registers and that  
the host should read the LTC4100 status registers to  
determine if any action on its part is required. This signal  
can be connected to the optional SMBALERT# line of the  
SMBus. Open drain with weak current source pull-up to  
VDD (Pin 17): Power Supply Input for the LTC4100 Digital  
Circuitry. Bypass this pin with 0.1µF. Typically between  
3.3V and 5VDC.  
VSET (Pin 18): Tap Point of the Programmable Resistor  
Divider, which Provides Battery Voltage Feedback to the  
Charger.  
ITH (Pin 19): Control Signal of the Inner Loop of the  
Current Mode PWM. Higher ITH corresponds to higher  
charging current in normal operation. A 0.0015µF capaci-  
tor to GND filters out PWM ripple. Typical full-scale output  
current is 40µA. Nominal voltage range for this pin is 0V  
to 3V.  
V
DD (withSchottkytoallowittobepulledto5Vexternally).  
SDA (Pin 8): SMBus Data Signal from Main (host-con-  
trolled) SMBus. External pull-up resistor is required.  
SCL (Pin 9): SMBus Clock Signal from Main (host-con-  
trolled) SMBus. External pull-up resistor is required.  
IDC (Pin 20): Bypass to GND with a 0.082µF Capacitor.  
ACP(Pin10):ThisOutputIndicatestheValueoftheDCDIV  
Comparator. It can be used to indicate whether AC is  
present or not.  
CSP (Pin 21): Current Amplifier CA1 Input. This pin and  
theBATpinmeasurethevoltageacrossthesenseresistor,  
RSENSE, to provide the instantaneous current signals re-  
quired for both peak and average current mode operation.  
DCDIV (Pin 11): Supply Divider Input. This is a high  
impedance comparator input with a 1.2V threshold (rising  
edge) and hysteresis.  
BAT (Pin 22): Battery Sense Input and the Negative  
Reference for the Current Sense Resistor. A bypass ca-  
pacitor of at least 10µF is required.  
GND (Pin 12): Ground for Digital and Analog Circuitry.  
sn4100 4100is  
6
LTC4100  
U
U
U
PI FU CTIO S  
CLN (Pin 23): Negative Input to the Input Current Limiting  
Circuit Block. If no current limit function is desired, con-  
nect this pin to CLP. The threshold is set at 100mV below  
the voltage at the CLP pin. When used to limit supply  
current, a filter is needed to filter out the switching noise.  
CLP (Pin 24): Positive Input to the Input Current Limiting  
Circuit Block. This pin also serves as a power supply for  
the IC. Bypass to ground with a 1µF capacitor.  
W
BLOCK DIAGRA  
0.01µF  
100Ω  
V
BAT  
V
SET  
V
BAT  
18  
12  
BAT  
+
22  
21  
0.1µF  
11-BIT  
DAC  
R
SENSE  
V
GND  
CA1  
+
3k  
9k  
20µF  
CSP  
DCIN  
1.28V  
0V  
SW  
OSCILLATOR  
WATCHDOG  
BUFFERED  
DETECT  
t
ON  
gm = 1m  
+
I
TH  
20µF  
÷5  
EA  
1.19V  
+
CLP  
L1  
S
TGATE  
I
CMP  
Q
SW  
Q2  
1
R
+
PWM  
LOGIC  
I
REV  
17mV  
D1  
BGATE  
PGND  
CLN  
3
2
Q3  
20  
19  
I
I
DC  
TH  
100mV  
gm = 1.5m  
+
1.19V  
+
23  
24  
5
gm = 1m  
R
CL  
CL1  
CLP  
10-BIT  
DAC  
DCIN  
I
5.8V  
INFET  
ACP  
DCDIV  
10  
11  
Q1  
4
6
CLP  
V
IN  
V
IN  
CHGEN  
V
DD  
1.2V  
10µA  
17  
V
DD  
7
SMBALERT  
SMBus  
INTERFACE  
8
SDA  
SCL  
THA  
I
LIM  
AND CONTROL  
13  
14  
LIMIT  
DECODER  
9
V
LIM  
16  
THERMISTER  
INTERFACE  
R
ILIM  
R
VLIM  
THB 15  
Figure 2.  
TEST CIRCUIT  
LTC4100  
+
1.19V  
+
EA  
VBAT – VVDAC  
VTOL  
=
•100  
VVDAC  
V
DAC  
FOR VVDAC = 17.56V(0x44A0)  
DCIN = 21V  
I
BAT  
V
SET  
CSP  
TH  
+
LT1055  
0.6V  
4100 TC01  
sn4100 4100is  
7
LTC4100  
U
OPERATIO  
Overview (Refer to Block Diagram)  
comparator IREV, or the beginning of the next cycle.  
The oscillator uses the equation,  
The LTC4100 is composed of a battery charger section, a  
charger controller, a 10-bit DAC to control charger cur-  
rent,an11-bitDACtocontrolchargervoltage,aSafetySignal  
decoder, limit decoder and an SMBus controller block. If  
no battery is present, the SafetySignal decoder indicates a  
RES_ORconditionandchargingisdisabledbythecharger  
controller (CHGEN = Low). Charging will also be disabled  
if DCDIV is low, or the SafetySignal is decoded as  
RES_HOT. If a battery is inserted and AC power is con-  
nected, the battery will be charged with an 80mA “wake-  
up” current. The wake-up current is discontinued after  
tTIMEOUT if the SafetySignal is decoded as RES_UR or  
RES_C0LD, and the battery or host doesn’t transmit  
charging commands.  
(VDCIN VBAT  
)
tOFF  
=
(VDCIN fOSC  
)
to set the bottom MOSFET on time. The result is quasi-  
constant frequency operation: the converter frequency  
remains nearly constant over a wide range of output  
voltages. This activity is diagrammed in Figure 3.  
OFF  
TGATE  
ON  
ON  
t
BGATE  
OFF  
OFF  
TRIP POINT SET  
BY I VOLTAGE  
The SMBus interface and control block receives  
ChargingCurrent() and ChargingVoltage() commands via  
the SMBus. If ChargingCurrent() and ChargingVoltage()  
command pairs are received within a tTIMEOUT interval, the  
values are stored in the current and voltage DACs and the  
charger controller asserts the CHGEN line if the decoded  
SafetySignal value will allow charging to commence.  
ChargingCurrent()andChargingVoltage()valuesarecom-  
pared against limits programmed by the limit decoder  
block; if the commands exceed the programmed limits  
these limits are substituted and overrange flags are set.  
TH  
INDUCTOR  
CURRENT  
4100 F01  
Figure 3.  
The peak inductor current, at which ICMP resets the SR  
latch, is controlled by the voltage on ITH. ITH is in turn  
controlled by several loops, depending upon the situation  
at hand. The average current control loop converts the  
voltage between CSP and BAT to a representative current.  
Error amp CA2 compares this current against the desired  
current programmed by the IDAC at the IDC pin and adjusts  
The charger controller will assert SMBALERT whenever a  
status change is detected, namely: AC_PRESENT,  
BATTERY_PRESENT, ALARM_INHIBITED, or VDD  
power-fail. The host may query the charger, via the  
SMBus,toobtainChargerStatus()information.SMBALERT  
will be deasserted upon a successful read of  
ChargerStatus() or a successful Alert Response  
Address (ARA) request.  
ITH for the desired voltage across RSENSE  
.
The voltage at BAT is divided down by an internal resistor  
divider set by the VDAC and is used by error amp EA to  
decrease ITH if the divider voltage is above the 1.19V  
reference.  
The amplifier CL1 monitors and limits the input current,  
normally from the AC adapter, to a preset level (100mV/  
RCL). At input current limit, CL1 will decrease the ITH  
voltage to reduce charging current.  
Battery Charger Controller  
The LTC4100 charger controller uses a constant off-time,  
current mode step-down architecture. During normal  
operation, the top MOSFET is turned on each cycle when  
the oscillator sets the SR latch and turned off when the  
main current comparator ICMP resets the SR latch. While  
the top MOSFET is off, the bottom MOSFET is turned  
on until either the inductor current trips the current  
An overvoltage comparator, OV, guards against transient  
overshoots (>7%). In this case, the top MOSFET is turned  
off until the overvoltage condition is cleared. This feature  
is useful for batteries that "load dump" themselves by  
opening their protection switch to perform functions such  
as calibration or pulse mode charging.  
sn4100 4100is  
8
LTC4100  
U
OPERATIO  
Description of Supported Battery Charger Functions  
The functions are described as follows (see Table 1 also):  
FunctionName() 'hnn (command code)  
PWM Watchdog Timer  
There is a watchdog timer that observes the activity on the  
TGATE pin. If TGATE stops switching for more than 40µs,  
the watchdog activates and turns off the top MOSFET for  
about 400ns. The watchdog engages to prevent very low  
frequency operation in dropout – a potential source of  
audible noise when using ceramic input and output ca-  
pacitors.  
Description: A brief description of the function.  
Purpose: The purpose of the function, and an example  
where appropriate.  
• SMBus Protocol: Refer to Section 5 of the Smart  
Battery Charger specification for more details.  
Charger Start-Up  
Input, Output or Input/Output: A description of the data  
When the charger is enabled, it will not begin switching  
untiltheITH voltageexceedsathresholdthatassuresinitial  
current will be positive. This threshold is 5% to 15% of the  
maximum programmed current. After the charger begins  
switching, the various loops will control the current at a  
level that is higher or lower than the initial current. The  
duration of this transient condition depends upon the loop  
compensation, but is typically less than 1ms.  
supplied to or returned by the function.  
ChargerSpecInfo() ('h11)  
Description: The SMBus Host uses this command to read  
the LTC4100’s extended status bits.  
Purpose: Allows the System Host to determine the speci-  
fication revision the charger supports as well as other  
extended status information.  
SMBus Interface  
• SMBus Protocol: Read Word.  
AllcommunicationsovertheSMBusareinterpretedbythe  
SMBus interface block. The SMBus interface is an SMBus  
slave device. All internal LTC4100 registers may be up-  
dated and accessed through the SMBus interface, and  
charger controller as required. The SMBus protocol is a  
derivative of the I2CTM bus (Reference “I2C-Bus and How  
to Use It, V1.0” by Philips, and "System Management Bus  
Specification", Version 1.1, from the SBS Implementers  
Forum, for a complete description of the bus protocol  
requirements.)  
Output: The CHARGER_SPEC indicates that the LTC4100  
supports Version 1.1 of the Smart Battery Charger Speci-  
fication. The SELECTOR_SUPPORT indicates that the  
LTC4100 does not support the optional Smart Battery  
Selector Commands.  
ChargerMode() ('h12)  
Description: The SMBus Host uses this command to set  
the various charger modes. The default values are set to  
allow a Smart Battery and the LTC4100 to work in concert  
without requiring an SMBus Host.  
All data is clocked into the shift register on the rising edge  
of SCL. All data is clocked out of the shift register on the  
fallingedgeofSCL.DetectionofanSMBusStopcondition,  
or power-on reset via the VDD power-fail, will reset the  
SMBus interface to an initial state at any time.  
Purpose: Allows the SMBus Host to configure the charger  
and change the default modes. This is a write only func-  
tion, but the value of the “mode” bit, INHIBIT_CHARGE  
may be determined using the ChargerStatus() function.  
The LTC4100 command set is interpreted by the SMBus  
interface and passed onto the charger controller block as  
control signals or updates to internal registers.  
• SMBus Protocol: Write Word.  
Input: The INHIBIT_CHARGE bit allows charging to be  
inhibited without changing the ChargingCurrent() and  
ChargingVoltage() values. The charging may be resumed  
by clearing this bit. This bit is automatically cleared when  
power is re-applied or when a battery is re-inserted.  
I2C is a trademark of Philips Electronics N.V.  
*http://www. SBS-FORUM.org  
sn4100 4100is  
9
LTC4100  
U
OPERATIO  
Table 1: Summary of Supported Charger Functions  
SMBus  
Address  
Command Data  
Function  
Access  
Code  
Type  
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 DO  
ChargerSpecInfo()  
7'b0001_001  
8'h11  
Info  
CHARGER_SPEC  
Reserved  
Return  
Values  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
Read  
ChargerMode()  
7'b0001_001  
8'h12  
Control  
Reserved  
Permitted  
Values  
Ignored  
1/0 1/0 Ign 1/0  
Write  
ChargerStatus()  
7'b0001_001  
8'h13  
Status  
Return  
Values  
1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0  
0
1
0
0
0
1/0  
Read  
Write  
Write  
ChargingCurrent()  
ChargingVoltage()  
AlarmWarning()  
7'b0001_001  
7'b0001_001  
7'b0001_001  
8'h14  
8'h15  
8'h16  
Value  
CHARGING_CURRENT[15:0]  
Permitted  
Values  
Unsigned integer representing current in mA  
CHARGING_VOLTAGE[15:0]  
Value  
Permitted  
Values  
Unsigned integer representing voltage in mV  
Control  
Permitted  
Values  
Ignored  
1/0 1/0 1/0 1/0  
Reserved  
Write  
LTCO()  
7'b0001_001  
7'b0001_100  
8'h3C  
Register  
LTC4100's Version Identification  
Ignored  
Permitted  
Values  
Return  
Values  
Ignored  
0
1/0  
1/0  
Write  
Read  
0
0
0
0
1
0
0
0
0
0
0
0
1
1
0
Alert Response  
Address  
N/A  
Status  
LTC4100's Address  
Not Supported  
Read  
Byte  
Return  
Values  
0
0
0
1
0
0
X
sn4100 4100is  
10  
LTC4100  
U
OPERATIO  
TheENABLE_POLLINGbitisnotsupportedbytheLTC4100.  
Values written to this bit are ignored.  
The RES_COLD bit is set only when the SafetySignal  
resistance value is greater than 28.5k. The SafetySignal  
indicates a cold battery. The RES_COLD bit will be set  
whenever the RES_OR bit is set.  
The POR_RESET bit sets the LTC4100 to its power-on  
default condition.  
The RES_HOT bit is set only when the SafetySignal resis-  
tance is less than 3150, which indicates a hot battery.  
The RES_HOT bit will be set whenever the RES_UR bit is  
set.  
The RESET_TO_ZERO bit sets the ChargingCurrent()and  
ChargingVoltage() values to zero. This function ALWAYS  
clears the ChargingVoltage() and ChargingCurrent() val-  
ues to zero even if the INHIBIT_CHARGE bit is set.  
The RES_UR bit is set only when the SafetySignal resis-  
ChargerStatus() ('h13)  
tance value is less than 575.  
Description: The SMBus Host uses this command to read  
the LTC4100’s status bits.  
ALARM_INHIBITED bit is set if a valid AlarmWarning()  
message has been received and charging is inhibited as a  
result. This bit is cleared if both ChargingVoltage() and  
ChargingCurrent()arere-writtentotheLTC4100, poweris  
removed (DCDIV < VACP), or if a battery is removed. The  
settingoftheALARM_INHIBITEDwillactivatetheLTC4100  
SMBALERT pull-down.  
Purpose: Allows the SMBus Host to determine the status  
and level of the LTC4100.  
• SMBus Protocol: Read Word.  
Output: The CHARGE_INHIBITED bit reflects the status of  
the LTC4100 set by the INHIBIT_CHARGE bit in the  
ChargerMode() function.  
POWER_FAIL bit is set if the LTC4100 does not have  
sufficient DCIN voltage to charge the battery or if an  
external device is pulling the CHGEN input signal low.  
Charging is disabled whenever this bit is set. The setting  
ofthisbitdoesnotclearthevaluesintheChargingVoltage()  
and ChargingCurrent() function values, nor does it neces-  
sarily affect the charging modes of the LTC4100.  
The POLLING_ENABLED, VOLTAGE_NOTREG, and  
CURRENT_NOTREG are not supported by the LTC4100.  
The LTC4100 always reports itself as a Level 2 Smart  
Battery Charger.  
CURRENT_OR bit is set only when ChargingCurrent() is  
set to a value outside the current regulation range of the  
LTC4100. This bit may be used in conjunction with the  
INHIBIT_CHARGE bit of the ChargerMode() and  
ChargingCurrent() to determine the current capability of  
the LTC4100. When ChargingCurrent() is set to the pro-  
grammatic maximum current + 1, the CURRENT_OR bit  
will be set.  
BATTERY_PRESENTissetifabatteryispresentotherwise  
it is cleared. The LTC4100 uses the SafetySignal  
in order to determine battery presence. If the LTC4100  
detects a RES_OR condition, the BATTERY_PRESENT bit  
is cleared immediately. The LTC4100 will not set the  
BATTERY_PRESENT bit until it successfully samples the  
SafetySignal twice and does not detect a RES_OR condi-  
tion on either sampling. If AC is not present (e.g. DCDIV <  
VACP), this bit may not be set for up to one-half second  
after the battery is connected to the SafetySignal. The  
ChargingCurrent() and ChargingVoltage() function values  
are immediately cleared whenever this bit is cleared.  
Charging will never be allowed if this bit is cleared. A  
change in BATTERY_PRESENT will activate the LTC4100  
SMBALERT pull-down.  
VOLTAGE_OR bit is set only when ChargingVoltage() is  
set to a value outside the voltage regulation range of the  
LTC4100. This bit may be used in conjunction with the  
INHIBIT_CHARGE bit of the ChargerMode() and  
ChargingVoltage() to determine the voltage capability of  
the LTC4100. When ChargingVoltage() is set to the  
programmatic maximum voltage, the VOLTAGE_OR bit  
will be set.  
The RES_OR bit is set only when the SafetySignal resis-  
tance value is greater than 95k. This indicates that the  
SafetySignal is to be considered as an open circuit.  
AC_PRESENT is set if the voltage on DCDIV is greater than  
VACP.Thisdoesnotnecessarilyindicatethatthevoltageon  
DCIN is sufficient to charge the battery. A change in  
sn4100 4100is  
11  
LTC4100  
U
OPERATIO  
AC_PRESENT will activate the LTC4100 SMBALERT pull-  
Input: The CHARGING_VOLTAGE is an unsigned 16-bit  
integer specifying the requested charging voltage in mV.  
The LTC4100 considers any value from 0x0001 through  
0x049F the same as writing 0x0000. The following  
table defines the maximum permissible value of  
CHARGING_VOLTAGE that will not set the VOLTAGE_OR  
down.  
ChargingCurrent() ('h14)  
Description: The Battery, System Host or other master  
device sends the desired charging current (mA) to the  
LTC4100 .  
in the ChargerStatus() function for a given value of RVLIM  
:
Purpose: The LTC4100 uses RILIM, the granularity of the  
IDAC, and the value of the ChargingCurrent() function to  
determine its charging current supplied to the battery. The  
charging current will never exceed the maximum current  
permitted by RILIM. The ChargingCurrent() value will be  
truncated to the granularity of the IDAC. The charging  
current will also be reduced if the battery voltage exceeds  
the programmed charging voltage.  
R
Maximum ChargingVoltage()  
0x225F (8796mV)  
VLIM  
Short to GND  
10kΩ ±1%  
0x332F (13100mV)  
0x43FF (17404mV)  
0x54CF (21708mV)  
0x6D5F (27999mV)  
33kΩ ±1%  
100kΩ ±1%  
Open (or short to V  
)
DD  
AlarmWarning() ('h16)  
• SMBus Protocol: Write Word.  
Description: The Smart Battery, acting as a bus master  
device,sendstheAlarmWarning()messagetotheLTC4100  
to notify it that one or more alarm conditions exist. Alarm  
indications are encoded as bit fields in the Battery’s Status  
register, which is then sent to the LTC4100 by this func-  
tion.  
Input: The CHARGING_CURRENT is an unsigned 16 bit  
integer specifying the requested charging current in mA.  
The following table defines the maximum permissible  
value of CHARGING_CURRENT that will not set the  
CURRENT_OR in the ChargerStatus() function for a given  
value of the RILIM  
:
Purpose: The LTC4100 will use the information sent by  
this function to properly charge the battery. The LTC4100  
will only respond to certain alarm bits. Writing to this  
function does not necessarily cause an alarm condition  
that inhibits battery charging.  
R
ChargingCurrent()  
Current  
ILIM  
Short to GND  
10kΩ ±1%  
0x0000 through 0x03FF 0mA through 1023mA  
0x0000 through 0x07FF 0mA through 2047mA  
0x0000 through 0x0BFF 0mA through 3071mA  
) 0x0000 through 0x0FFF 0mA through 4095mA  
33kΩ ±1%  
Open (or short to V  
DD  
• SMBus Protocol: Write Word.  
ChargingVoltage() ('h15)  
Input: Only the OVER_CHARGED_ALARM, TERMINATE  
_CHARGE_ALARM,reserved (0x2000), and OVER  
_TEMP_ALARM bits are supported by the LTC4100.  
Writing a one to any of these specified bits will inhibit  
the charging by the LTC4100 and will set the  
ALARM_INHIBITEDbitintheChargerStatus()function. The  
TERMINATE_DISCHARGE_ALARM, REMAINING_  
CAPACITY_ALARM, REMAINING_TIME_ALARM, andthe  
ERROR bits are ignored by the LTC4100.  
Description: The Battery, SMBus Host or other master  
device sends the desired charging voltage (mV) to the  
LTC4100.  
Purpose: The LTC4100 uses RVLIM, the granularity of the  
VDAC, and the value of the ChargingVoltage() function to  
determine its charging voltage supplied to the battery. The  
charging voltage will never be forced beyond the voltage  
permitted by RVLIM. The ChargingVoltage() value will be  
truncated to the granularity of the VDAC. The charging  
voltage will also be reduced if the battery current exceeds  
the programmed charging current.  
LTC0() ('h3C)  
Description: The SMBus Host uses this command to  
determine the version number of the LTC4100 and set  
extended operation modes not defined by the Smart  
Battery Charger Specification.  
• SMBus Protocol: Write Word.  
sn4100 4100is  
12  
LTC4100  
U
OPERATIO  
Purpose: This function allows the SMBus Host to deter-  
mine if the battery charger is an LTC4100. Identifying the  
manufacturer and version of the Smart Battery Charger  
permits software to perform tasks specific to a given  
charger. The LTC4100 also provides a means of disabling  
• ChangeofBATTERY_PRESENTintheChargerStatus()  
function.  
• Setting ALARM_INHIBITED in the ChargerStatus()  
function.  
the LOWI current mode of the IDAC  
.
• Internal power-on reset condition.  
• SMBus Protocol: Write Word.  
SMBus Accelerator Pull-Ups  
Input: The NO_LOWI is the only bit recognized by this  
function. The default value of NO_LOWI is zero. The  
LTC4100 LOWI current mode provides a more accurate  
average charge current when the charge current is less  
than 1/16 of the full-scale IDAC value. When the NO_LOWI  
is set, a less accurate IDAC algorithm is used to generate  
the charging current, but because the charger is not  
pulsed on and off, it may be preferred.  
Both SCL and SDA have SMBus accelerator circuits which  
reduce the rise time on systems with significant capaci-  
tance on the two SMBus signals. The dynamic pull-up  
circuitry detects a rising edge on SDA or SCL and applies  
1mA to 10mA pull-up to VDD when VIN > 0.8V until VIN  
< VDD – 0.8V (external pull-up resistors are still required  
to supply DC current). This action allows the bus to meet  
SMBus rise time requirements with as much as 250pF on  
each SMBus signal. The improved rise time will benefit all  
of the devices which use the SMBus, especially those  
devices that use the I2C logic levels. Note that the dynamic  
pull-up circuits only pull to VDD, so some SMBus devices  
that are not compliant to the SMBus specifications may  
stillhaverisetimecomplianceproblemsiftheSMBuspull-  
up resistors are terminated with voltages higher than VDD.  
• SMBus Protocol: Read Word.  
Output: The NO_LOWI indicates the IDAC mode of opera-  
tion. If clear, then the LOWI current mode will be used  
when the charging current is less than 1/16 of the full-  
scale IDAC value.  
TheLTCVersionIdentificationwillalwaysbe0x202forthe  
LTC4100.  
The Control Block  
Alert Response Address (ARA)  
The LTC4100 charger operations are handled by the  
control block. This block is capable of charging the se-  
lected battery autonomously or under SMBus Host con-  
trol. The control block can request communications with  
the system management host (SMBus Host) by asserting  
SMBALERT=0;thiswillcausetheSMBusHost, ifpresent,  
to poll the LTC4100.  
Description: The SMBus system host uses the Alert  
Response Address to quickly identify the generator of an  
SMBALERT# event.  
Purpose: The LTC4100 will respond to an ARA if the  
SMBALERTsignalisactivelypullingdowntheSMBALERT#  
bus.TheLTC4100willfollowtheprioritizationreportingas  
defined in the System Management Bus Specification,  
Version 1.1, from the SBS Implementers Forum.  
The control block receives SMBus slave commands from  
the SMBus interface block.  
• SMBus Protocol: A 7-bit Addressable Device Re-  
sponds to an ARA.  
The control block allows the LTC4100 to meet the follow-  
ing Smart Battery-controlled (Level 2) charger  
requirements:  
Output: The Device Address will be sent to the SMBus  
system host. The LTC4100 Device address is 0x12 (or  
0x09 if just looking at the 7-bit address field).  
1. Implements the Smart Battery’s critical warning mes-  
sages over the SMBus.  
The following events will cause the LTC4100 to pull-down  
the SMBALERT# bus through the SMBALERT pin:  
2. Operates as an SMBus slave device that responds to  
ChargingVoltage() and ChargingCurrent() commands  
andadjuststhechargeroutputparametersaccordingly.  
• ChangeofAC_PRESENTintheChargerStatus()func-  
tion.  
sn4100 4100is  
13  
LTC4100  
U
OPERATIO  
3. The host may control charging by disabling the Smart  
Battery’s ability to transmit ChargingCurrent() and  
ChargingVoltage() request functions and broadcasting  
thechargingcommandstotheLTC4100overtheSMBus.  
9. There is insufficient DCIN voltage to charge the battery.  
The LTC4100 will resume wake-up charging when there is  
sufficient DCIN voltage to charge the battery. This condi-  
tion will not reset the TTIMEOUT timer.  
4. The LTC4100 will still respond to Smart Battery critical  
warning messages without host intervention.  
Controlled Charging Algorithm Overview  
The following conditions must be met in order to allow  
controlled charging to start on the LTC4100:  
Wake-up Charging Mode  
The following conditions must be met in order to allow  
wake-up charging of the battery:  
1. The ChargingVoltage() AND ChargingCurrent() func-  
tion must be written to non-zero values.  
1. The SafetySignal must be RES_COLD, RES_IDEAL, or  
RES_UR.  
2. The SafetySignal must be RES_COLD, RES_IDEAL, or  
RES_UR.  
2. AC must be present. This is qualified by DCDIV > VACP  
.
3. AC must be present. This is qualified by DCDIV > VACP.  
Wake-up charging initiates when a newly inserted battery  
does not send ChargingCurrent() and ChargingVoltage()  
functions to the LTC4100.  
The following conditions will stop the Controlled Charging  
Algorithm and will cause the Battery Charger Controller to  
stop charging:  
ThefollowingconditionswillterminatetheWake-upCharg-  
ing Mode.  
1. The ChargingCurrent() AND ChargingVoltage() func-  
tions have not been written for TTIMEOUT  
.
1. A TTIMEOUT period is reached when the SafetySignal is  
RES_COLD or RES_UR.  
2. The SafetySignal is registering RES_OR.  
3. The SafetySignal is registering RES_HOT.  
4. The AC power is no longer present. (DCDIV < VACP  
2. The SafetySignal is registering RES_OR.  
)
3. The successful writing of the ChargingCurrent() AND  
ChargingVoltage() function. The LTC4100 will proceed to  
thecontrolledchargingmodeafterthesetwofunctionsare  
written.  
5. ALARM_INHIBITED is set in the ChargerStatus() func-  
tion.  
6. INHIBIT_CHARGE is set in the ChargerMode() function.  
Clearing INHIBIT_CHARGE will cause the LTC4100 to  
resume charging using the previous ChargingVoltage()  
AND ChargingCurrent() function values.  
4. The SafetySignal is registering RES_HOT.  
5. The AC power is no longer present. (DCDIV < VACP  
)
6. The ALARM_INHIBITED becomes set in the  
ChargerStatus() function.  
7. RESET_TO_ZERO is set in the ChargerMode() function.  
8. CHGEN pin is pulled low by an external device. The  
LTC4100 will resume charging using the previous  
ChargingVoltage() AND ChargingCurrent() function val-  
ues, if the CHGEN pin is released by the external device.  
7. The INHIBIT_CHARGE is set in the ChargerMode()  
function.  
8. The CHGEN pin is pulled low by an external device. The  
LTC4100 will resume wake-up charging, if the CHGEN pin  
is released by the external device. Toggling the CHGEN pin  
will not reset the TTIMEOUT timer.  
9. Insufficient DCIN voltage to charge the battery. The  
LTC4100 will resume charging using the previous  
ChargingVoltage() AND ChargingCurrent() function val-  
sn4100 4100is  
14  
LTC4100  
U
OPERATIO  
range is determined, the lower value thresholds are not  
sampled. The SafetySignal decoder block uses the previ-  
ously determined SafetySignal value to provide the appro-  
priate adjustment in threshold to add hysteresis. The RTHB  
resistorvalueisusedtomeasuretheRES_ORRES_COLD  
and RES_COLD RES_IDEAL thresholds by connecting  
theTHB pintoVDD andmeasuringthevoltageresultanton  
the THA pin. The RTHA resistor value is used to measure  
the RES_IDEAL RES_HOT and RES_HOT RES_UR  
thresholds by connecting the THA pin to VDD and measur-  
ing the voltage resultant on the THB pin.  
ues, when there is sufficient DCIN voltage to charge the  
battery.  
10. Writing a zero value to ChargingVoltage() function.  
11. Writing a zero value to ChargingCurrent() function.  
The SafetySignal Decoder Block  
This block measures the resistance of the SafetySignal  
andfeatureshighnoiseimmunityatcriticaltrippoints.The  
low power standby mode supports only battery presence  
SMB charger reporting requirements when AC is not  
present. The SafetySignal decoder is shown in Figure 4.  
The value of RTHA is 1.13k and RTHB is 54.9k.  
The SafetySignal decoder block uses a voltage divider  
network between VDD and GND to determine SafetySignal  
range thresholds. Since the THA and THB inputs are  
sequentially connected to VDD, this provides VDD noise  
immunity during SafetySignal measurement.  
SafetySignal sensing is accomplished by a state machine  
thatreconfigurestheswitchesofFigure4usingTHA_SELB  
and THB_SELB, a selectable reference generator, and two  
comparators. This circuit has two modes of operation  
based upon whether AC is present.  
When AC power is not available the SafetySignal block  
supports the following low power operating features:  
When AC is present, the LTC4100 samples the value of the  
SafetySignal and updates the ChargerStatus register ap-  
proximately every 32ms. The state machine successively  
samples the SafetySignal value starting with the RES_OR  
RES_COLD threshold, then RES_C0LD RES_IDEAL  
threshold, RES_IDEAL RES_HOT threshold, and finally  
theRES_HOTRES_URthreshold. OncetheSafetySignal  
1. The SafetySignal is sampled every 250ms or less,  
instead of 32ms.  
2. A full SafetySignal status is sampled every 30s or less,  
instead of every 32ms  
The SafetySignal impedance is interpreted according to  
Table 4.  
V
DD  
V
DD  
THA_SELB  
R
THA  
1.13k  
AC_PRESENT  
+
MUX  
REF  
TH_HI  
TH_LO  
THA  
12.5k  
+
HI_REF  
LO_REF  
+
33k  
V
DD  
25k  
25k  
+
SafetySignal  
CONTROL  
4
THB_SELB  
R
THB  
54.9k  
V
LIM  
[3:0]  
V
LIM  
ENCODER  
+
RES_OR  
R
VLIM  
THB  
SafetySignal  
25k  
C
SS  
R
RES_COLD  
RES_H0T  
RES_UR  
+
LATCH  
12.5k  
4100 F04  
4100 F05  
Figure 4. SafetySignal Decoder Block  
Figure 5. Simplified VLIM Circuit Concept (ILIM is Similar)  
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Table 4. SafetySignal State Ranges  
Table 6. ILIM Trip Points and Ranges  
SafetySignal  
RESISTANCE  
CHARGE  
STATUS BITS  
EXTERNAL  
RESISTOR  
CONTROLLED  
CHARGING  
VOLTAGE CURRENT RANGE GRANULARITY  
DESCRIPTION  
(R  
ILIM  
)
I
LIM  
0to 500Ω  
RES_UR,  
Underrange  
RES_HOT  
BATTERY_PRESENT  
Short to GND  
V
< 0.09V  
0 < I < 1023mA  
0 < I < 2046mA  
1mA  
2mA  
ILIM  
DD  
10k ±1%  
0.17V  
< V  
VDD ILIM  
500to 3kΩ  
3kto 30kΩ  
30kto 100kΩ  
Above 100kΩ  
RES_HOT  
BATTERY_PRESENT  
Hot  
< 0.34V  
VDD  
33k ±1%  
0.42V  
< V  
0 < I < 3068mA  
0 < I < 4092mA  
4mA  
4mA  
VDD  
ILIM  
ILIM  
BATTERY_PRESENT  
Ideal  
< 0.59V  
Open (>250k,  
or Short to V )  
0.66V < V  
VDD  
RES_COLD  
BATTERY_PRESENT  
Cold  
DD  
RES_OR  
RES_COLD  
Overrange  
The VLIM Decoder Block  
Note: The underrange detection scheme is a very important feature of the  
LTC4100. The R /R divider trip point of 0.333 • V (1V) is  
The value of an external resistor connected from this pin  
to GND determines one of five voltage limits that are  
applied to the charger output value. These limits provide  
a measure of safety with a hardware restriction on charg-  
ing voltage which cannot be overridden by software.  
THA SafetySignal  
DD  
well above the 0.047 • V (140mV) threshold of a system using a 10k  
DD  
pull-up. A system using a 10k pull-up would not be able to resolve the  
important underrange to hot transition point with a modest 100mV of  
ground offset between battery and SafetySignal detection circuitry. Such  
offsets are anticipated when charging at normal current levels.  
Table 7. VLIM Trip Points and Ranges (See Figure 5)  
EXTERNAL  
RESISTOR  
CONTROLLED  
CHARGING VOLTAGE  
The required values for RTHA and RTHB are shown in  
Table 5.  
(R  
VLIM  
)
V
VOLTAGE  
(V ) RANGE  
OUT  
GRANULARITY  
LIM  
Short to  
GND  
V
VLIM  
< 0.09V  
2900mV < V  
OUT  
< 8800mV  
16mV  
VCCP  
Table 5. SafetySignal External Resistor Values  
EXTERNAL RESISTOR  
VALUE ()  
10k ±1%  
33k ±1%  
100k ±1%  
Open or  
0.17V  
< V  
VDD  
2900mV < V  
< 13.104mV  
2900mV < V  
OUT  
< 17.408mV  
2900mV < V  
OUT  
< 21.712mV  
2900mV < V  
OUT  
16mV  
16mV  
16mV  
16mV  
VDD  
VLIM  
OUT  
< 0.34V  
R
THA  
R
THB  
1130 ±1%  
54.9k ±1%  
0.42V  
< V  
VLIM  
VDD  
VCCP  
< 0.59V  
0.66V  
< V  
VLIM  
VDD  
VDD  
CSS represents the capacitance between the SafetySignal  
and GND. CSS may be added to provide additional noise  
immunity from transients in the application. CSS can not  
exceed 1nF if the LTC4100 is to properly sense the value  
< 0.84V  
0.91V  
< V  
VLIM  
VDD  
Tied to V  
< 28000mV  
DD  
of RSafetySignal  
.
The Voltage DAC Block  
Note that the charger output voltage is offset by VREF  
The ILIM Decoder Block  
.
Therefore, the value of VREF is subtracted from the SMBus  
ChargingVoltage() value in order for the output voltage to  
be programmed properly (without offset). If the  
ChargingVoltage() value is below the nominal reference  
voltage of the charger, nominally 1.184V, the charger  
output voltage is programmed to zero. In addition, if the  
ChargingVoltage() value is above the limit set by the VLIM  
pin, then the charger output voltage is set to the value  
determined by the VLIM resistor and the VOLTAGE_OR bit  
The value of an external resistor connected from this pin  
to GND determines one of four current limits that are used  
formaximumchargingcurrentvalue. Theselimitsprovide  
a measure of safety with a hardware restriction on charg-  
ing current which cannot be overridden by software.  
is set. These limits are demonstrated in Figure 6.  
sn4100 4100is  
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OPERATIO  
25  
20  
15  
10  
5
I
PROG  
(FROM CA1 AMP)  
R
= 33k  
VLIM  
I
DC  
I
+
TH  
V
REF  
R
SET  
-∑  
CHARGING_CURRENT  
VALUE  
MODULATOR  
4100 F07  
Figure 7. Current DAC Operation  
0
0
10  
15  
20  
25  
30  
35  
5
AVERAGE CHARGER CURRENT  
PROGRAMMED VALUE (V)  
I
/8  
LIMIT  
4100 F06  
0
NOTE: THE LTC4100 CAN BE PROGRAMMED WITH ChargingVoltage() FUNCTION VALUES  
BETWEEN 1.184V AND 2.9V, HOWEVER, THE BATTERY CHARGER CONTROLLER OUTPUT  
VOLTAGE MAY BE ZERO WITH PROGRAMMED VALUES BELOW 2.9V.  
4100 F08  
~40ms  
Figure 8. Charging Current Waveform in Low Current Mode  
Figure 6. Transfer Function of Charger  
The Current DAC Block  
When wake-up is asserted to the current DAC block, the  
delta-sigma is then fixed at a value equal to 80mA, inde-  
pendent of the ILIM setting.  
The current DAC is a delta-sigma modulator which con-  
trols the effective value of an external resistor, RSET, used  
to set the current limit of the charger. Figure 7 is a  
simplified diagram of the DAC operation. The delta-sigma  
modulatorandswitchconverttheChargingCurrent()value,  
received via the SMBus, to a variable resistance equal to:  
Input FET  
The input FET circuit performs two functions. It enables  
the charger if the input voltage is higher than the CLP pin,  
and provides an indication of this condition at both the  
CHGEN pin and the PWR_FAIL bit in the ChargerStatus()  
register. It also controls the gate of the input FET to keep  
a low forward voltage drop when charging and prevents  
reverse current flow through the input FET.  
1.25RSET/ChargingCurrent()/ILIM[x]  
)
Therefore, programmed current is equal to:  
(102.3mV/RSENSE) (ChargingCurrent()/ILIM[x]),  
for ChargingCurrent() < ILIM[x]  
.
If the input voltage is less than VCLP, it must go at least  
130mV higher than VCLP to activate the charger. The  
CHGEN pin is forced low unless this condition is met. The  
gateoftheinputFETisdriventoavoltagesufficienttokeep  
a low forward voltage drop from drain to source. If the  
voltage between DCIN and CLP drops to less than 25mV,  
the input FET is turned off slowly. If the voltage between  
DCIN and CLP is ever less than –25mV, then the input FET  
is turned off quickly to prevent significant reverse current  
from flowing in the input FET. In this condition the CHGEN  
pin is driven low and the charger is disabled.  
When a value less than 1/16th of the maximum current  
allowed by ILIM is applied to the current DAC input, the  
current DAC enters a different mode of operation called  
LOWI. The current DAC output is pulse width modulated  
with a high frequency clock having a duty cycle value of  
1/8. Therefore, the maximum output current provided by  
the charger is IMAX/8. The delta-sigma output gates this  
low duty cycle signal on and off. The delta-sigma shift  
registersarethenclockedataslowerrate,about45ms/bit,  
so that the charger has time to settle to the IMAX/8 value.  
The resulting average charging current is equal to that  
requested by the ChargingCurrent() value.  
Note: The LOWI mode can be disabled by setting the  
NO_LOWI bit in the LTC0() function.  
sn4100 4100is  
17  
LTC4100  
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OPERATIO  
The AC Present Block (AC_PRESENT)  
be set. If the DCDIV voltage is below the DCDIV compara-  
tor threshold minus the DCDIV comparator hysteresis,  
then the ACP output pin is switched to GND and the  
AC_PRESENTbitintheChargerStatus()functioniscleared.  
TheACPoutputpinisdesignedtodrive2mAcontinuously.  
The DCDIV pin is used to determine AC presence. If the  
DCDIV voltage is above the DCDIV comparator threshold  
(VACP),thentheACPoutputpinwillbeswitchedtoVDD and  
the AC_PRESENT bit in the ChargerStatus() function will  
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APPLICATIO S I FOR ATIO  
Adapter Limiting  
input current limit tolerance and use that current to  
determine the resistor value.  
An important feature of the LTC4100 is the ability to  
automatically adjust charging current to a level which  
avoids overloading the wall adapter. This allows the prod-  
uct to operate at the same time that batteries are being  
charged without complex load management algorithms.  
Additionally, batteries will automatically be charged at the  
maximum possible rate of which the adapter is capable.  
R
CL = 100mV/ILIM  
ILIM = Adapter Min Current –  
(Adapter Min Current • 7%)  
Table 8. Common RCL Resistor Values  
ADAPTER  
RATING (A)  
R
VALUE*  
() 1%  
R
POWER  
R
POWER  
CL  
CL  
CL  
DISSIPATION (W)  
RATING (W)  
1.5  
1.8  
2
0.06  
0.135  
0.25  
This feature is created by sensing total adapter output  
current and adjusting charging current downward if a  
preset adapter current limit is exceeded. True analog  
control is used, with closed loop feedback ensuring that  
adapter load current remains within limits. Amplifier CL1  
in Figure 9 senses the voltage across RCL, connected  
betweentheCLPandCLNpins. Whenthisvoltageexceeds  
100mV, the amplifier will override programmed charging  
current to limit adapter current to 100mV/RCL. A lowpass  
filter formed by 4.99k and 0.1µF is required to eliminate  
switchingnoise.Ifthecurrentlimitisnotused,CLPshould  
be connected to CLN.  
0.05  
0.162  
0.25  
0.045  
0.039  
0.036  
0.033  
0.03  
0.18  
0.25  
2.3  
2.5  
2.7  
3
0.206  
0.25  
0.225  
0.5  
0.241  
0.5  
0.27  
0.5  
* Values shown above are rounded to nearest standard value.  
As is often the case, the wall adapter will usually have at  
leasta+10%currentlimitmarginandmanytimesonecan  
simply set the adapter current limit value to the actual  
adapter rating (see Table 8).  
LTC4100  
CLP  
Charge Termination Issues  
V
IN  
0.1µF  
R
*
CL1  
CL  
CLN  
Batteries with constant current charging and voltage-  
based charger termination might experience problems  
with reductions of charger current caused by adapter  
limiting. It is recommended that input limiting feature be  
defeated in such cases. Consult the battery manufacturer  
for information on how your battery terminates charging.  
+
+
4.99k  
100mV  
TO LOAD  
INFET  
100mV  
ADAPTER CURRENT LIMIT  
*R  
CL  
=
4100 F09  
Figure 9. Adapter Current Limiting  
Setting Output Current Limit (Refer to Figure 1)  
Setting Input Current Limit  
The LTC4100 current DAC and the PWM analog circuitry  
must coordinate the setting of the charger current. Failure  
to do so will result in incorrect charge currents.  
To set the input current limit, you need to know the  
minimum wall adapter current rating. Subtract 7% for the  
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APPLICATIO S I FOR ATIO  
Table 10 Recommended Inductor Values  
Table 9. Recommended Resistor Values  
Maxaimum  
Average Current (A)  
Input  
Voltage (V)  
Minimum Inductor  
I
(A)  
R
() 1%  
R
(W)  
R () 1%  
ILIM  
MAX  
SENSE  
SENSE  
Value (µH)  
1.023  
2.046  
3.068  
4.092  
0.100  
0.25  
0.25  
0.5  
0
1
1
2
2
3
3
4
4
20  
>20  
20  
>20  
20  
>20  
20  
>20  
40 ± 20%  
56 ± 20%  
20 ± 20%  
30 ± 20%  
15 ± 20%  
20 ± 20%  
10 ± 20%  
15 ± 20%  
0.05  
0.025  
0.025  
10k  
33k  
0.5  
Open  
Warning  
DO NOT CHANGE THE VALUE OF RILIM DURING OPERA-  
TION. The value must remain fixed and track the RSENSE  
value at all times. Changing the current setting can result  
in currents that greatly exceed the requested value and  
potentiallydamagethebatteryoroverloadthewalladapter  
if no input current limiting is provided.  
Calculating IC Power Dissipation  
The power dissipation of the LTC4100 is dependent upon  
the gate charge of the top and bottom MOSFETs (Q2 & Q3  
respectively) The gate charge (QG) is determined from the  
manufacturer’sdatasheetandisdependentuponboththe  
gate voltage swing and the drain voltage swing of the  
MOSFET. Use 6V for the gate voltage swing and VDCIN for  
the drain voltage swing.  
Inductor Selection  
Higher operating frequencies allow the use of smaller  
inductor and capacitor values. A higher frequency gener-  
ally results in lower efficiency because of MOSFET gate  
charge losses. In addition, the effect of inductor value on  
ripple current and low current operation must also be  
considered. The inductor ripple current IL decreases  
with higher frequency and increases with higher VIN.  
PD = VDCIN • (fOSC (QGQ2 + QGQ3) + IDCIN  
)
Example: VDCIN = 19V, fOSC = 345kHz, QGQ2 = 25nC,  
QGQ3 = 15nC, IDCIN = 3mA.  
1
VOUT  
V
IN  
IL =  
VOUT 1−  
PD = 320mW  
f L  
( )( )  
Soft Start and Undervoltage Lockout  
Accepting larger values of IL allows the use of low  
inductances, but results in higher output voltage ripple  
and greater core losses. A reasonable starting point for  
setting ripple current is IL = 0.4(IMAX). Remember the  
maximum IL occurs at the maximum input voltage. The  
inductor value also has an effect on low current operation.  
The transition to low current operation begins when the  
inductorcurrentreacheszerowhilethebottomMOSFETis  
on. Lower inductor values (higher IL) will cause this to  
occur at higher load currents, which can cause a dip in  
efficiency in the upper range of low current operation. In  
practice 10µH is the lowest value recommended for use.  
The LTC4100 is soft started by the 0.12µF capacitor on the  
ITH pin.Onstart-up,ITH pinvoltagewillrisequicklyto0.5V,  
then ramp up at a rate set by the internal 30µA pull-up  
current and the external capacitor. Battery charging  
current starts ramping up when ITH voltage reaches 0.8V  
and full current is achieved with ITH at 2V. With a 0.12µF  
capacitor, time to reach full charge current is about 2ms  
and it is assumed that input voltage to the charger will  
reach full value in less than 2ms. The capacitor can be  
increased up to 1µF if longer input start-up times are  
needed.  
sn4100 4100is  
19  
LTC4100  
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APPLICATIO S I FOR ATIO  
In any switching regulator, conventional timer-based soft tantalum capacitors have a known failure mechanism  
starting can be defeated if the input voltage rises much when subjected to very high turn-on surge currents. Only  
slower than the time out period. This happens because the Kemet T495 series of “Surge Robust” low ESR tantalums  
switching regulators in the battery charger and the com- are rated for high surge conditions such as battery to  
puter power supply are typically supplying a fixed amount ground.  
of power to the load. If input voltage comes up slowly  
The relatively high ESR of an aluminum electrolytic for C1,  
compared to the soft start time, the regulators will try to  
located at the AC adapter input terminal, is helpful in  
deliver full power to the load when the input voltage is still  
reducing ringing during the hot-plug event. Refer to AN88  
well below its final value. If the adapter is current limited,  
for more information.  
it cannot deliver full power at reduced output voltages and  
The highest possible voltage rating on the capacitor will  
minimize problems. Consult with the manufacturer before  
use. Alternatives include new high capacity ceramic (at  
least 20µF) from Tokin, United Chemi-Con/Marcon, et al.  
Other alternative capacitors include OSCON capacitors  
from Sanyo.  
the possibility exists for a quasi “latch” state where the  
adapter output stays in a current limited state at reduced  
output voltage. For instance, if maximum charger plus  
computer load power is 30W, a 15V adapter might be  
current limited at 2.5A. If adapter voltage is less than  
(30W/2.5A = 12V) when full power is drawn, the adapter  
voltage will be pulled down by the constant 30W load until  
it reaches a lower stable state where the switching regu-  
lators can no longer supply full load. This situation can be  
prevented by utilizing the DCDIV resistor divider, set  
higherthantheminimumadaptervoltagewherefullpower  
can be achieved.  
The output capacitor (C3) is also assumed to absorb  
output switching current ripple. The general formula for  
capacitor current is:  
VBAT  
VDCIN  
0.29(VBAT ) 1–  
IRMS  
=
(L1)(f)  
Input and Output Capacitors  
For example, VDCIN = 19V, VBAT = 12.6V, L1 = 10µH, and  
In the 4A Lithium Battery Charger (Typical Application on  
back page), the input capacitor (C2) is assumed to absorb  
all input switching ripple current in the converter, so it  
must have adequate ripple current rating. Worst-case  
RMS ripple current will be equal to one half of output  
charging current. Actual capacitance value is not critical.  
Solid tantalum low ESR capacitors have high ripple cur-  
rentratinginarelativelysmallsurfacemountpackage, but  
caution must be used when tantalum capacitors are used  
for input or output bypass. High input surge currents can  
be created when the adapter is hot-plugged to the charger  
or when a battery is connected to the charger. Solid  
f = 300kHz, IRMS = 0.41A.  
EMI considerations usually make it desirable to minimize  
ripple current in the battery leads, and beads or inductors  
maybeaddedtoincreasebatteryimpedanceatthe300kHz  
switching frequency. Switching ripple current splits be-  
tween the battery and the output capacitor depending on  
the ESR of the output capacitor and the battery imped-  
ance. If the ESR of C3 is 0.2and the battery impedance  
is raised to 4with a bead or inductor, only 5% of the  
current ripple will flow in the battery.  
sn4100 4100is  
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Protecting SMBus Inputs  
PCB Layout Considerations  
The SMBus inputs, SCL and SDA, are exposed to uncon-  
trolled transient signals whenever a battery is connected  
to the system. If the battery contains a static charge, the  
SMBusinputsaresubjectedtotransientswhichcancause  
damage after repeated exposure. Also, if the battery’s  
positive terminal makes contact to the connector before  
the negative terminal, the SMBus inputs can be forced  
below ground with the full battery potential, causing a  
potentialforlatch-upinanyofthedevicesconnectedtothe  
SMBus inputs. Therefore it is good design practice to  
protect the SMBus inputs as shown in Figure 10.  
For maximum efficiency, the switch node rise and fall  
times should be minimized. To prevent magnetic and  
electricalfieldradiationandhighfrequencyresonantprob-  
lems,properlayoutofthecomponentsconnectedtotheIC  
is essential. (See Figure 11.) Here is a PCB layout priority  
list for proper layout. Layout the PCB using this specific  
order.  
SWITCH NODE  
L1  
V
BAT  
V
DD  
HIGH  
FREQUENCY  
CIRCULATING  
PATH  
C2  
D1  
V
IN  
C4  
BAT  
CONNECTOR  
TO BATTERY  
TO SYSTEM  
4100 F13  
4100 F15  
Figure 10. Recommended SMBus Transient Protection  
Figure 11. High Speed Switching Path  
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APPLICATIO S I FOR ATIO  
1. Inputcapacitorsneedtobeplacedascloseaspossible  
to switching FET’s supply and ground connections.  
Shortest copper trace connections possible. These  
parts must be on the same layer of copper. Vias must  
not be used to make this connection.  
smallest trace spacing possible. Locate any filter  
componentonthesetracesnexttotheICandnotatthe  
sense resistor location.  
5. Place output capacitors next to the sense resistor  
output and ground.  
2. ThecontrolICneedstobeclosetotheswitchingFET’s  
gate terminals. Keep the gate drive signals short for a  
clean FET drive. This includes IC supply pins that con-  
nect to the switching FET source pins. The IC can be  
placedontheoppositesideofthePCBrelativetoabove.  
6. Output capacitor ground connections need to feed  
into same copper that connects to the input capacitor  
ground before tying back into system ground.  
Interfacing with a Selector  
3. Place inductor input as close as possible to switching  
FET’s output connection. Minimize the surface area of  
this trace. Make the trace width the minimum amount  
needed to support current—no copper fills or pours.  
Avoid running the connection using multiple layers in  
parallel. Minimize capacitance from this node to any  
other trace or plane.  
The LTC4100 is designed to be used with a true analog  
multiplexer for the SafetySignal sensing path. Some se-  
lectorICsfromvariousmanufacturersmaynotimplement  
this. Consult LTC applications department for more infor-  
mation.  
Electronic Loads  
4. Place the output current sense resistor right next to  
the inductor output but oriented such that the IC’s  
currentsensefeedbacktracesgoingtoresistorarenot  
long. The feedback traces need to be routed together  
asasinglepaironthesamelayeratanygiventimewith  
The LTC4100 is designed to work with a real battery.  
Electronic loads will create instability within the LTC4100  
preventing accurate programming currents and voltages.  
Consult LTC applications department for more informa-  
tion.  
DIRECTION OF CHARGING CURRENT  
R
SENSE  
4100 F14  
TO CSP AND BAT  
Figure 12. Kelvin Sensing of Charging Current  
sn4100 4100is  
22  
LTC4100  
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PACKAGE DESCRIPTIO  
G Package  
24-Lead Plastic SSOP (5.3mm)  
(Reference LTC DWG # 05-08-1640)  
7.90 – 8.50*  
(.311 – .335)  
1.25 ±0.12  
24 23 22 21 20 19 18 17 16 15 14  
13  
7.8 – 8.2  
5.3 – 5.7  
7.40 – 8.20  
(.291 – .323)  
0.42 ±0.03  
0.65 BSC  
RECOMMENDED SOLDER PAD LAYOUT  
5
7
8
1
2
3
4
6
9 10 11 12  
5.00 – 5.60**  
(.197 – .221)  
2.0  
(.079)  
0° – 8°  
0.65  
(.0256)  
BSC  
0.09 – 0.25  
0.55 – 0.95  
(.0035 – .010)  
(.022 – .037)  
0.05  
0.22 – 0.38  
(.009 – .015)  
(.002)  
NOTE:  
G24 SSOP 0802  
1. CONTROLLING DIMENSION: MILLIMETERS  
MILLIMETERS  
2. DIMENSIONS ARE IN  
(INCHES)  
3. DRAWING NOT TO SCALE  
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH  
SHALL NOT EXCEED .152mm (.006") PER SIDE  
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD  
FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE  
sn4100 4100is  
23  
LTC4100  
U
TYPICAL APPLICATIO  
LTC4100 Li-Ion Battery Charger ILIM = 4A/VLIM = 17.4V, Adapter Rating = 2.7A  
R
CL  
0.033Ω  
0.5W  
1%  
Q1  
15V TO 20V  
DCIN  
FROM WALL  
ADAPTER  
C9  
0.1µF  
10V  
R1  
4.9k  
C1  
0.1µF  
R10  
13.7k  
1%  
4
24  
23  
INFET CLP CLN  
5
1
TGATE  
DCIN  
Q2  
Q3  
C2, C3  
10µF × 2  
25V  
11  
DCDIV  
R11  
1.21k  
1%  
R5  
6.04k  
1%  
3
2
D1  
BGATE  
PGND  
19  
I
TH  
C6, 0.12µF  
10V, X7R  
C7, 0.0015µF  
10V, X7R  
L1  
10µH  
4A  
LTC4100  
20  
12  
17  
14  
13  
10  
6
21  
22  
CSP  
BAT  
I
DC  
C8, 0.082µF  
10V, X7R  
R
SNS  
0.025Ω  
C4,C5  
10µF × 2  
25V  
GND  
0.5W, 1%  
0.1µF  
10V  
V
V
I
DD  
C4  
R6, R  
33k  
VLIM  
0.01µF  
LIM  
R4  
25V  
100Ω  
18  
V
10k  
SET  
LIM  
C5  
R
0.1µF  
10V  
THA  
1.13k  
1%  
ACP  
3V TO 5.5V  
16  
15  
THA  
THB  
CHGEN  
SMBALERT  
SDA  
SafetySignal  
10k 10k  
D2  
D3  
7
SDA  
SMART  
BATTERY  
R
THB  
54.9k  
1%  
9
D4  
D5  
8
D1: MBRM140T3  
D2-D5: SMALL SIGNAL SCHOTTKY  
Q1: 1/2 Si4825  
Q2: Si4431ADY  
Q3: Si3456DY  
SCL  
SCL  
4100 TA02  
RELATED PARTS  
PART NUMBER  
DESCRIPTION  
COMMENTS  
LTC1760  
Smart Battery System Manager  
Autonomous Power Management and Battery Charging for Two Smart  
Batteries, SMBus Rev 1.1 Compliant.  
LTC1960  
LTC1980  
LTC4006  
Dual Battery Charger/Selector with SPI Interface  
Simultaneous Charge or Discharge of 2 Batteries; DAC Programmable  
Current and Voltage; Input Current Limiting Maximizes Charge Current  
Combination Battery Charger and DC/DC Converter Input Supply Maybe Above or Below Battery Voltage, Up to 8.4V Float Voltage,  
24-Pin SSOP Package  
Small, High Efficiency, Fixed Voltage,  
Lithium-ion Battery Charger  
Constant Current/ Constant Voltage Switching Regulator with Termination  
Timer; AC Adapter Current Limit and SafetySignal Sensor  
in a Small 16pin Package  
LTC4007  
LTC4008  
LTC4412  
High Efficiency, Programmable Voltage  
Battery Charger with Termination.  
Complete Charger for 3- or 4-Cell Li-Ion batteries, AC Adapter  
Current Limit, SafetySignal Sensor and Indicator Outputs.  
High Efficiency, Programmable Voltage/Current  
Battery Charger  
Constant Current/Constant Voltage Switching Regulator; Resistor Voltage/  
Current Programming, AC Adapter Current Limit and SafetySignal Sensor  
Low Loss PowerPath Controller  
Very Low Loss Replacement for Power Supply OR’ing Diodes using  
Minimal External Components  
sn4100 4100is  
LT/TP 0703 1K • PRINTED IN USA  
24 LinearTechnology Corporation  
1630 McCarthy Blvd., Milpitas, CA 95035-7417  
LINEAR TECHNOLOGY CORPORATION 2002  
(408) 432-1900 FAX: (408) 434-0507 www.linear.com  
配单直通车
LTC4100EG产品参数
型号:LTC4100EG
是否Rohs认证: 不符合
生命周期:Active
包装说明:5.30 MM, PLASTIC, SSOP-24
Reach Compliance Code:not_compliant
ECCN代码:EAR99
HTS代码:8542.39.00.01
风险等级:5.12
可调阈值:YES
模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码:R-PDSO-G24
JESD-609代码:e0
长度:8.2 mm
湿度敏感等级:1
信道数量:1
功能数量:1
端子数量:24
最高工作温度:85 °C
最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY
封装代码:SSOP
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):235
认证状态:Not Qualified
座面最大高度:2 mm
最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V
表面贴装:YES
温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING
端子节距:0.65 mm
端子位置:DUAL
处于峰值回流温度下的最长时间:20
宽度:5.3 mm
Base Number Matches:1
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