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产品型号M27C4002-12F1的概述

芯片M27C4002-12F1概述 M27C4002-12F1是一款具有广泛应用前景的EPROM（可擦写可编程只读存储器）芯片，主要用于各种电子设备中。该芯片的设计目的是为了满足对数据存储的需求，并提供高速度及高集成度的特性。芯片由法国微电子公司（STMicroelectronics）生产，具有512K字节的存储容量，并支持字节或字长模式的编程。M27C4002-12F1主要用于计算机系统、嵌入式系统、工业控制以及消费电子产品等领域。 M27C4002-12F1的详细参数 M27C4002-12F1的主要参数如下： - 存储容量：512 Kbit (64K x 8 bits) - 电源电压：4.5V - 5.5V - 编程电压：12.5V - 读出时间：最小90 ns - 写入时间：通常为25 ms - 擦除时间：大约为10 ms - 数据保持时间：100年 - 封装类型：DIP32 ...

产品型号M27C4002-12F1的Datasheet PDF文件预览

M27C4002

4 Mbit (256Kb x16) UV EPROM and OTP EPROM

■ 5V ± 10% SUPPLY VOLTAGE in READ

OPERATION

■ ACCESS TIME: 45ns

■ LOW POWER CONSUMPTION:

– Active Current 70mA at 10MHz

– Standby Current 100µA

FDIP40W (F)

PDIP40 (B)

■ PROGRAMMING VOLTAGE: 12.75V ± 0.25V

■ PROGRAMMING TIME: 100µs/word

■ ELECTRONIC SIGNATURE

– Manufacturer Code: 20h

– Device Code: 44h

JLCC44W (J)

DESCRIPTION

The M27C4002 is a 4 Mbit EPROM offered in the

two ranges UV (ultra violet erase) and OTP (one

time programmable). It is ideally suited for micro-

processor systems requiring large programs and

is organised as 262,144 words of 16 bits.

PLCC44 (C)

TSOP40 (N)

10 x 20 mm

The FDIP40W (window ceramic frit-seal package)

and the JLCC44W (J-lead chip carrier packages)

have transparent lids which allow the user to ex-

pose the chip to ultraviolet light to erase the bit pat-

tern. A new pattern can then be written to the

device by following the programming procedure.

Figure 1. Logic Diagram

For applications where the content is programmed

only one time and erasure is not required, the

M27C4002 is offered in PDIP40, PLCC44 and

TSOP40 (10 x 20 mm) packages.

A0-A17

Q0-Q15

M27C4002

AI00727B

August 2001

1/18

M27C4002

Figure 2A. DIP Connections

Figure 2B. LCC Connections

39 A17

38 A16

37 A15

36 A14

35 A13

34 A12

33 A11

32 A10

31 A9

Q15

Q14

Q13

Q12

Q11

Q10

1 44

Q12

A13

A12

A11

A10

Q11

Q10

Q8 10

M27C4002

Q7 12

Q6 13

Q5 14

Q4 15

Q3 16

Q2 17

Q1 18

Q0 19

29 A8

28 A7

27 A6

26 A5

25 A4

24 A3

23 A2

22 A1

21 A0

AI00729

AI00728

Figure 2C. TSOP Connections

Table 1. Signal Names

A0-A17

Address Inputs

A10

A11

A12

A13

A14

A15

A16

A17

Q0-Q15

Data Outputs

Chip Enable

Output Enable

Program Supply

Supply Voltage

Ground

10 M27C4002 31

(Normal)

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

Not Connected Internally

DQ15

DQ14

DQ13

DQ12

DQ11

DQ10

DQ9

DQ8

AI01831

2/18

M27C4002

(1)

Table 2. Absolute Maximum Ratings

Symbol

Parameter

Value

–40 to 125

–50 to 125

–65 to 150

–2 to 7

Unit

°C

(3)

Ambient Operating Temperature

Temperature Under Bias

Storage Temperature

Input or Output Voltage (except A9)

Supply Voltage

BIAS

STG

(2)

–2 to 7

(2)

A9 Voltage

–2 to 13.5

–2 to 14

Program Supply Voltage

Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may

cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions

above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-

tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-

ity documents.

2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC

voltage on Output is V

3. Depends on range.

+0.5V with possible overshoot to V

+2V for a period less than 20ns.

Table 3. Operating Modes

Mode

Q15-Q0

Data Out

Hi-Z

or V

Read

Output Disable

Program

Pulse

Data In

Data Out

Hi-Z

Verify

Program Inhibit

Standby

or V

CC SS

Hi-Z

Electronic Signature

Codes

Note: X = V or V , V = 12V ± 0.5V.

IH IL ID

Table 4. Electronic Signature

Identifier

Manufacturer’s Code

Device Code

Hex Data

20h

44h

Note: Outputs Q15-Q8 are set to '0'.

DEVICE OPERATION

control and should be used for device selection.

Output Enable (G) is the output control and should

be used to gate data to the output pins, indepen-

dent of device selection. Assuming that the ad-

dresses are stable, the address access time

The operating modes of the M27C4002 are listed

in the Operating Modes table. A single power sup-

ply is required in the read mode. All inputs are TTL

levels except for V and 12V on A9 for Electronic

) is equal to the delay from E to output

AVQV

). Data is available at the output after a delay

ELQV

Signature.

Read Mode

of t

from the falling edge of G, assuming that

GLQV

The M27C4002 has two control functions, both of

which must be logically active in order to obtain

data at the outputs. Chip Enable (E) is the power

E has been low and the addresses have been sta-

ble for at least t -t

AVQV GLQV

3/18

M27C4002

Table 5. AC Measurement Conditions

High Speed

≤ 10ns

Standard

≤ 20ns

Input Rise and Fall Times

Input Pulse Voltages

0 to 3V

1.5V

0.4V to 2.4V

0.8V and 2V

Input and Output Timing Ref. Voltages

Figure 3A. AC Testing Input Output Waveform

Figure 4. AC Testing Load Circuit

1.3V

High Speed

1N914

1.5V

3.3kΩ

DEVICE

UNDER

TEST

OUT

Standard

2.4V

2.0V

0.8V

0.4V

= 30pF for High Speed

= 100pF for Standard

includes JIG capacitance

AI01822

AI01823B

(1)

Table 6. Capacitance

Symbol

(T = 25 °C, f = 1 MHz)

Parameter

Test Condition

Min

Max

Unit

= 0V

Input Capacitance

Output Capacitance

OUT

Note: 1. Sampled only, not 100% tested.

Standby Mode

a. the lowest possible memory power dissipation,

The M27C4002 has a standby mode which reduc-

es the supply current from 50mA to 100µA. The

M27C4002 is placed in the standby mode by ap-

plying a CMOS high signal to the E input. When in

the standby mode, the outputs are in a high imped-

ance state, independent of the G input.

b. complete assurance that output bus contention

will not occur.

For the most efficient use of these two control

lines, E should be decoded and used as the prima-

ry device selecting function, while G should be

made a common connection to all devices in the

array and connected to the READ line from the

system control bus. This ensures that all deselect-

ed memory devices are in their low power standby

mode and that the output pins are only active

when data is required from a particular memory

device.

Two Line Output Control

Because EPROMs are usually used in larger

memory arrays, the product features a 2 line con-

trol function which accommodates the use of mul-

tiple memory connection. The two line control

function allows:

4/18

M27C4002

(1)

Table 7. Read Mode DC Characteristics

(T = 0 to 70°C or –40 to 85°C; V = 5V ± 5% or 5V ± 10%; V = V

)

Symbol

Parameter

Input Leakage Current

Output Leakage Current

Test Condition

Min

Max

Unit

µA

±10

0V ≤ V ≤ V

0V ≤ V

≤ V

OUT CC

µA

E = V , G = V ,

= 0mA, f = 10MHz

OUT

Supply Current

E = V , G = V ,

= 0mA, f = 5MHz

OUT

E = V

Supply Current (Standby) TTL

Supply Current (Standby) CMOS

Program Current

µA

CC1

E > V – 0.2V

100

CC2

= V

PP CC

Input Low Voltage

–0.3

0.8

(2)

+ 1

Input High Voltage

= 2.1mA

= –400µA

= –100µA

Output Low Voltage

0.4

Output High Voltage TTL

Output High Voltage CMOS

2.4

– 0.7V

Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .

2. Maximum DC voltage on Output is V +0.5V.

(1)

Table 8A. Read Mode AC Characteristics

(T = 0 to 70°C or –40 to 85°C; V = 5V ± 5% or 5V ± 10%; V = V

)

M27C4002

(3)

Symbol Alt

Parameter

Test Condition

-70

Unit

- 45

Min

-60

Max

Min

Max

Min

Max

Address Valid to

Output Valid

E = V , G = V

AVQV

ELQV

ACC

Chip Enable Low to

Output Valid

G = V

Output Enable Low

to Output Valid

E = V

GLQV

Chip Enable High to

Output Hi-Z

(2)

G = V

EHQZ

Output Enable High

to Output Hi-Z

(2)

E = V

GHQZ

Address Transition

to Output Transition

E = V , G = V

IL IL

AXQX

Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .

2. Sampled only, not 100% tested.

3. Speed obtained with High Speed AC measurement conditions.

5/18

M27C4002

(1)

Table 8B. Read Mode AC Characteristics

(T = 0 to 70°C or –40 to 85°C; V = 5V ± 5% or 5V ± 10%; V = V

)

M27C4002

-90

Symbol

Alt

Parameter

Test Condition

-80

-10

Unit

Min

Max

Min

Max

Min

Max

Address Valid to

Output Valid

E = V , G = V

100

AVQV

ACC

Chip Enable Low to

Output Valid

G = V

100

ELQV

Output Enable Low

to Output Valid

E = V

GLQV

Chip Enable High to

Output Hi-Z

(2)

G = V

EHQZ

Output Enable High

to Output Hi-Z

(2)

E = V

GHQZ

Address Transition

to Output Transition

E = V , G = V

IL IL

AXQX

Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .

2. Sampled only, not 100% tested.

(1)

Table 8C. Read Mode AC Characteristics

(T = 0 to 70°C or –40 to 85°C; V = 5V ± 5% or 5V ± 10%; V = V

)

M27C4002

-15

Symbol

Alt

Parameter

Test Condition

-12

-20

Unit

Min

Max

Min

Max

Min

Max

Address Valid to

Output Valid

E = V , G = V

120

150

200

AVQV

ACC

Chip Enable Low to

Output Valid

G = V

120

150

200

ELQV

Output Enable Low

to Output Valid

E = V

GLQV

Chip Enable High to

Output Hi-Z

(2)

G = V

EHQZ

Output Enable High

to Output Hi-Z

(2)

E = V

GHQZ

Address Transition

to Output Transition

E = V , G = V

IL IL

AXQX

Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .

2. Sampled only, not 100% tested.

6/18

M27C4002

Figure 5. Read Mode AC Waveforms

VALID

tGLQV

VALID

A0-A17

tAVQV

tAXQX

tEHQZ

tGHQZ

tELQV

Hi-Z

Q0-Q15

AI00731B

System Considerations

The power switching characteristics of Advanced

CMOS EPROMs require careful decoupling of the

put control and by properly selected decoupling

capacitors. It is recommended that a 0.1µF ceram-

ic capacitor be used on every device between V

and V . This should be a high frequency capaci-

devices. The supply current, I , has three seg-

tor of low inherent inductance and should be

placed as close to the device as possible. In addi-

tion, a 4.7µF bulk electrolytic capacitor should be

ments that are of interest to the system designer:

the standby current level, the active current level,

and transient current peaks that are produced by

the falling and rising edges of E. The magnitude of

the transient current peaks is dependent on the

output capacitive and inductive loading of the de-

vice. The associated transient voltage peaks can

be suppressed by complying with the two line out-

used between V and V for every eight devic-

es. The bulk capacitor should be located near the

power supply connection point.The purpose of the

bulk capacitor is to overcome the voltage drop

caused by the inductive effects of PCB traces.

7/18

M27C4002

(1)

Table 9. Programming Mode AC Characteristics

(T = 25 °C; V = 6.25V ± 0.25V; V = 12.75V ± 0.25V)

Symbol

Parameter

Test Condition

Min

Max

±10

Unit

µA

Input Leakage Current

Supply Current

≤ V ≤ V

E = V

Program Current

Input Low Voltage

Input High Voltage

Output Low Voltage

Output High Voltage TTL

A9 Voltage

–0.3

0.8

+ 0.5

= 2.1mA

0.4

= –400µA

2.4

11.5

12.5

Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .

(1)

Table 10. Programming Mode AC Characteristics

(T = 25 °C; V = 6.25V ± 0.25V; V = 12.75V ± 0.25V

Symbol

Alt

Parameter

Test Condition

Min

Max

Unit

Address Valid to Chip Enable Low

Input Valid to Chip Enable Low

µs

AVEL

QVEL

High to Chip Enable Low

VPHEL

VPS

VCS

VCHEL

Chip Enable Program Pulse Width

Chip Enable High to Input Transition

Input Transition to Output Enable Low

Output Enable Low to Output Valid

Output Enable High to Output Hi-Z

105

ELEH

EHQX

QXGL

GLQV

OES

100

130

GHQZ

GHAX

DFP

Output Enable High to Address

Transition

Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .

2. Sampled only, not 100% tested.

Programming

light (UV EPROM). The M27C4002 is in the pro-

gramming mode when V input is at 12.75V, G is

When delivered (and after each erasure for UV

EPROM), all bits of the M27C4002 are in the '1'

state. Data is introduced by selectively program-

ming '0's into the desired bit locations. Although

only '0's will be programmed, both '1's and '0's can

be present in the data word. The only way to

change a '0' to a '1' is by die exposure to ultraviolet

at V and E is pulsed to V . The data to be pro-

grammed is applied to 16 bits in parallel to the data

output pins. The levels required for the address

and data inputs are TTL. V

6.25V ± 0.25V.

is specified to be

8/18

M27C4002

Figure 6. Programming and Verify Modes AC Waveforms

VALID

A0-A17

tAVEL

Q0-Q15

DATA OUT

DATA IN

tQVEL

tEHQX

tVPHEL

tVCHEL

tGLQV

tGHQZ

tGHAX

tELEH

tQXGL

PROGRAM

VERIFY

AI00730

Figure 7. Programming Flowchart

PRESTO II Programming Algorithm

PRESTO II Programming Algorithm allows the

whole array to be programmed with a guaranteed

margin, in a typical time of 26.5 seconds. Pro-

gramming with PRESTO II consists of applying a

sequence of 100µs program pulses to each byte

until a correct verify occurs (see Figure 7). During

programming and verify operation, a MARGIN

MODE circuit is automatically activated in order to

guarantee that each cell is programmed with

enough margin. No overprogram pulse is applied

since the verify in MARGIN MODE provides nec-

essary margin to each programmed cell.

= 6.25V, V

= 12.75V

n = 0

E = 100µs Pulse

++n

= 25

VERIFY

YES

++ Addr

Program Inhibit

Programming of multiple M27C4002s in parallel

with different data is also easily accomplished. Ex-

cept for E, all like inputs including G of the parallel

M27C4002 may be common. A TTL low level

YES

Last

Addr

FAIL

pulse applied to a M27C4002's E input, with V

at 12.75V, will program that M27C4002. A high

level E input inhibits the other M27C4002s from

being programmed.

YES

CHECK ALL WORDS

1st: V

2nd: V

= 6V

= 4.2V

Program Verify

A verify (read) should be performed on the pro-

grammed bits to determine that they were correct-

ly programmed. The verify is accomplished with G

AI00726C

at V , E at V , V at 12.75V and V at 6.25V.

9/18

M27C4002

Electronic Signature

ERASURE OPERATION (applies to UV EPROM)

The Electronic Signature (ES) mode allows the

reading out of a binary code from an EPROM that

will identify its manufacturer and type. This mode

is intended for use by programming equipment to

automatically match the device to be programmed

with its corresponding programming algorithm.

The ES mode is functional in the 25°C ± 5°C am-

bient temperature range that is required when pro-

gramming the M27C4002. To activate the ES

mode, the programming equipment must force

11.5V to 12.5V on address line A9 of the

The erasure characteristics of the M27C4002 are

such that erasure begins when the cells are ex-

posed to light with wavelengths shorter than ap-

proximately 4000 Å. It should be noted that

sunlight and some type of fluorescent lamps have

wavelengths in the 3000-4000 Å range. Research

shows that constant exposure to room level fluo-

rescent lighting could erase a typical M27C4002 in

about 3 years, while it would take approximately 1

week to cause erasure when exposed to direct

sunlight. If the M27C4002 is to be exposed to

these types of lighting conditions for extended pe-

riods of time, it is suggested that opaque labels be

put over the M27C4002 window to prevent unin-

tentional erasure. The recommended erasure pro-

cedure for the M27C4002 is exposure to short

wave ultraviolet light which has wavelength 2537

Å. The integrated dose (i.e. UV intensity x expo-

sure time) for erasure should be a minimum of 15

M27C4002 with V = V = 5V. Two identifier

bytes may then be sequenced from the device out-

puts by toggling address line A0 from V to V . All

other address lines must be held at V during

Electronic Signature mode. Byte 0 (A0 = V ) rep-

resents the manufacturer code and byte

(A0 = V ) the device identifier code. For the ST-

Microelectronics M27C4002, these two identifier

bytes are given in Table 4 and can be read-out on

outputs Q7 to Q0.

W-sec/cm . The erasure time with this dosage is

approximately 15 to 20 minutes using an ultravio-

let lamp with 12000 µW/cm power rating. The

M27C4002 should be placed within 2.5cm (1 inch)

of the lamp tubes during the erasure. Some lamps

have a filter on their tubes which should be re-

moved before erasure.

10/18

M27C4002

Table 11. Ordering Information Scheme

Example:

M27C4002

-80

Device Type

M27

Supply Voltage

C = 5V

Device Function

4002 = 4 Mbit (256Kb x16)

Speed

(1)

-45

-60

= 45 ns

(1)

= 60 ns

-70 = 70 ns

-80 = 80 ns

-90 = 90 ns

-10 = 100 ns

-12 = 120 ns

-15 = 150 ns

-20 = 200 ns

Tolerance

blank = ± 10%

X = ± 5%

Package

F = FDIP40W

B = PDIP40

J = JLCC44W

C = PLCC44

N = TSOP40: 10 x 20 mm

Temperature Range

1 = 0 to 70 °C

6 = –40 to 85 °C

Options

X = Additional Burn-in

TR = Tape & Reel Packing

Note: 1. High Speed, see AC Characteristics section for further information.

For a list of available options (Speed, Package, etc...) or for further information on any aspect of this de-

vice, please contact the STMicroelectronics Sales Office nearest to you.

11/18

M27C4002

Table 12. Revision History

Date

Revision Details

September 1998 First Issue

25-Sep-2000

30-Aug-2001

AN620 Reference removed

70ns speed class added

12/18

M27C4002

Table 13. FDIP40W - 40 pin Ceramic Frit-seal DIP with window, Package Mechanical Data

millimeters

Min

inches

Min

Symbol

Typ

Max

5.72

1.40

4.57

4.50

0.56

–

Typ

Max

0.225

0.055

0.180

0.177

0.022

–

0.51

3.91

3.89

0.41

–

0.020

0.154

0.153

0.016

–

1.45

0.057

0.23

51.79

–

0.30

52.60

–

0.009

2.039

–

0.012

2.071

–

48.26

15.24

1.900

0.600

–

13.06

–

13.36

–

0.514

–

0.526

–

2.54

0.100

0.590

14.99

–

16.18

3.18

1.52

–

18.03

0.637

0.125

0.060

–

0.710

2.49

–

0.098

–

7.62

0.300

4°

11°

4°

11°

Figure 8. FDIP40W - 40 pin Ceramic Frit-seal DIP with window, Package Outline

FDIPW-a

Drawing is not to scale.

13/18

M27C4002

Table 14. PDIP40 - 40 pin Plastic DIP, 600 mils width, Package Mechanical Data

millimeters

Min

–

inches

Min

Symbol

Typ

4.45

0.64

Max

–

Typ

Max

–

0.175

0.025

–

0.38

3.56

0.38

1.14

0.20

51.78

–

0.015

0.140

0.015

0.045

0.008

2.039

–

3.91

0.53

1.78

0.31

52.58

–

0.154

0.021

0.070

0.012

2.070

–

48.26

1.900

14.80

13.46

–

16.26

13.99

–

0.583

0.530

–

0.640

0.551

–

2.54

0.100

0.600

15.24

–

15.24

3.05

1.52

0°

17.78

3.81

2.29

15°

0.600

0.120

0.060

0°

0.700

0.150

0.090

15°

Figure 9. PDIP40 - 40 lead Plastic DIP, 600 mils width, Package Outline

PDIP

Drawing is not to scale.

14/18

M27C4002

Table 15. JLCC44W - 44 lead Leadless Ceramic Chip Carrier, square window,

Package Mechanical Data

millimeters

Min

inches

Symbol

Typ

Max

4.83

3.05

0.53

0.81

17.65

16.89

16.26

–

Typ

Min

0.155

0.090

0.017

0.026

0.685

0.630

0.580

–

Max

0.190

0.120

0.021

0.032

0.695

0.665

0.640

–

3.94

2.29

0.43

0.66

17.40

16.00

14.74

–

12.70

0.500

17.40

16.00

14.74

–

17.65

16.89

16.26

–

0.685

0.630

0.580

–

0.695

0.665

0.640

–

12.70

1.27

0.500

0.050

0.400

–

10.16

–

0.10

0.004

Figure 10. JLCC44W - 44 lead Leadless Ceramic Chip Carrier, square window, Package Outline

1 N

E1 E

D2/E2

JLCCW-a

Drawing is not to scale.

15/18

M27C4002

Table 16. PLCC44 - 44 lead Plastic Leaded Chip Carrier, Package Mechanical Data

millimeters

Min

inches

Min

Symbol

Typ

Max

4.70

3.04

0.51

0.53

0.81

17.65

16.66

16.00

17.65

16.66

16.00

–

Typ

Max

0.185

0.120

0.020

0.021

0.032

0.695

0.656

0.630

0.695

0.656

0.630

–

4.20

2.29

–

0.165

0.090

–

0.33

0.66

17.40

16.51

14.99

17.40

16.51

14.99

–

0.013

0.026

0.685

0.650

0.590

0.685

0.650

0.590

–

1.27

0.89

0.050

0.035

0.00

–

0.25

–

0.000

–

0.010

–

0.10

0.004

Figure 11. PLCC44 - 44 lead Plastic Leaded Chip Carrier, Package Outline

1 N

E1 E

D2/E2

0.51 (.020)

1.14 (.045)

PLCC

Drawing is not to scale.

16/18

M27C4002

Table 17. TSOP40 - 40 lead Plastic Thin Small Outline, 10 x 20 mm, Package Mechanical Data

millimeters

Min

inches

Min

Symbol

Typ

Max

1.20

0.15

1.05

0.27

0.21

20.20

18.50

10.10

–

Typ

Max

0.047

0.006

0.041

0.011

0.008

0.795

0.728

0.398

–

0.05

0.95

0.17

0.10

19.80

18.30

9.90

–

0.002

0.037

0.007

0.004

0.780

0.720

0.390

–

0.50

0.020

0.50

0°

0.70

5°

0.020

0°

0.028

5°

0.10

0.004

Figure 12. TSOP40 - 40 lead Plastic Thin Small Outline, 10 x 20 mm, Package Outline

N/2

DIE

TSOP-a

Drawing is not to scale.

17/18

M27C4002

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences

of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted

by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject

to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not

authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

The ST logo is registered trademark of STMicroelectronics

All other names are the property of their respective owners.

STMicroelectronics GROUP OF COMPANIES

Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco -

Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.

www.st.com

18/18

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M27C4002-12F1产品参数

型号:	M27C4002-12F1
是否Rohs认证：	符合
生命周期：	Obsolete
IHS 制造商：	STMICROELECTRONICS
零件包装代码：	DIP
包装说明：	LEAD FREE, CERAMIC, WINDOWED, FRIT SEALED, DIP-40
针数：	40
Reach Compliance Code：	unknown
ECCN代码：	EAR99
HTS代码：	8542.32.00.61
风险等级：	8
Is Samacsys：	N
最长访问时间：	120 ns
I/O 类型：	COMMON
JESD-30 代码：	R-CDIP-T40
JESD-609代码：	e3
长度：	52.195 mm
内存密度：	4194304 bit
内存集成电路类型：	UVPROM
内存宽度：	16
功能数量：	1
端子数量：	40
字数：	262144 words
字数代码：	256000
工作模式：	ASYNCHRONOUS
最高工作温度：	70 °C
最低工作温度：
组织：	256KX16
输出特性：	3-STATE
封装主体材料：	CERAMIC, METAL-SEALED COFIRED
封装代码：	WDIP
封装等效代码：	DIP40,.6
封装形状：	RECTANGULAR
封装形式：	IN-LINE, WINDOW
并行/串行：	PARALLEL
峰值回流温度（摄氏度）：	245
电源：	5 V
认证状态：	Not Qualified
座面最大高度：	5.72 mm
最大待机电流：	0.0001 A
子类别：	EPROMs
最大压摆率：	0.07 mA
最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V
表面贴装：	NO
技术：	CMOS
温度等级：	COMMERCIAL
端子面层：	Matte Tin (Sn)
端子形式：	THROUGH-HOLE
端子节距：	2.54 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	15.24 mm
Base Number Matches：	1

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