MAX13206EALA全新原装原理图各脚功能电路原理芯片引脚定义-中国IC网-芯三七

19-3855; Rev 1; 4/06

2-/4-/6-/8-Channel, 30ꢀk EꢁD ꢂrotectors in µDFN

General Description

Features

The MAX13202E/MAX13204E/MAX13206E/MAX13208E

low-capacitance 30ꢀk EꢁS-pꢂotection ꢃioꢃe aꢂꢂaꢄy

aꢂe ꢃeyigneꢃ to pꢂotect yenyitive electꢂonicy attacheꢃ

to communication liney. Each channel conyiyty of a paiꢂ

♦ High-Speed Data-Line ESD Protection

±±15kVHꢀuan ꢁodꢂ ꢃodeꢄ

±ꢅ35kV—Eꢆ ꢇ±333-ꢈ-ꢉ2 ꢊir-ꢋap Diꢌcharge

♦ Tinꢂ µDFN Pac5age

of ꢃioꢃey that yteeꢂ EꢁS cuꢂꢂent pulyey to k

oꢂ GNS.

CC

ꢃꢊX±ꢅꢉ3ꢉE (±uu x ±.1uu)

ꢃꢊX±ꢅꢉ3ꢈE (ꢉuu x ꢉuu)

ꢃꢊX±ꢅꢉ3ꢇE (ꢉuu x ꢉuu)

ꢃꢊX±ꢅꢉ38E (ꢉuu x ꢉuu)

The MAX13202E/MAX13204E/MAX13206E/MAX13208E

pꢂotect againyt EꢁS pulyey up to 1ꢅꢀk ꢆuman ꢇoꢃꢄ

Moꢃel (ꢆꢇM) anꢃ 30ꢀk Aiꢂ-Gap Siychaꢂgeꢈ ay ypeci-

fieꢃ in IEC 61000-4-2. Theye ꢃevicey have a 6pF on-

capacitance peꢂ channelꢈ maꢀing them iꢃeal foꢂ uye on

high-ypeeꢃ ꢃata I/O inteꢂfacey.

♦ Low ꢇpF —npꢀt ꢆapacitance

♦ Low ±nꢊ (uax) Lea5age ꢆꢀrrent

♦ +3.9k to +±ꢇk Sꢀppꢄꢂ koꢄtage Range

The MAX13204E iy a quaꢃ-EꢁS ytꢂuctuꢂe ꢃeyigneꢃ foꢂ

Etheꢂnet anꢃ FiꢂeWiꢂe^®applicationy. The MAX13202E/

MAX13206E/MAX13208E aꢂe 2-channelꢈ 6-channelꢈ

anꢃ 8-channel ꢃevicey. Theꢄ aꢂe ꢃeyigneꢃ foꢂ cell-

phone connectoꢂy anꢃ ꢁkGA viꢃeo connectiony.

Ordering Information

Theye ꢃevicey aꢂe available in 6-ꢈ 8-ꢈ anꢃ 10-pin µSFN

pacꢀagey anꢃ aꢂe ypecifieꢃ oveꢂ the -40°C to +12ꢅ°C

automotive opeꢂating tempeꢂatuꢂe ꢂange.

P—N- PROTEꢆTED

TOP

ꢃꢊRK

PKꢋ

ꢆODE

PꢊRT

PKꢋ

—/O PORTS

6

ꢃꢊX±ꢅꢉ3ꢉEꢊLT+

ꢃꢊX±ꢅꢉ3ꢈEꢊLT+

ꢃꢊX±ꢅꢉ3ꢇEꢊLꢊ+

ꢃꢊX±ꢅꢉ38EꢊLꢁ+

2

ꢇk

L611-1

L622-1

L822-1

L1022-1

µSFN

Applications

6

4

6

8

AAO

AAL

AAS

Uꢁꢇ

Etheꢂnet

µSFN

Uꢁꢇ 2.0

PSAy

kiꢃeo

8

µSFN

Cell Phoney

10

µSFN

FiꢂeWiꢂe

Note: All devices are specified over the -40°C to +125°C auto-

motive operating temperature range.

+Denotes lead-free package

ꢂin Configurations

Typical Operating Circuit

6

1

5

4

V

CC

MAX13202E

2

0.1µF

+

0.1µF

3

I/0

I/0_

PROTECTED

CIRCUIT

MAX13202E

MAX13204E

MAX13206E

MAX13208E

µDFN

(±uu x ±.1uu)

Pin Configurations continued at end of data sheet.

FireWire is a registered trademark of Apple Computer, Inc.

________________________________________________________________ Maxim Integrated Products

±

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

2-/4-/6-/8-Channel, 30ꢀk EꢁD ꢂrotectors in µDFN

ꢊꢁSOLUTE ꢃꢊX—ꢃUꢃ RꢊT—NꢋS

CC

I/O_ to GNS................................................-0.3k to (k

k

to GNS............................................................-0.3k to +18k

Opeꢂating Tempeꢂatuꢂe Range .........................-40°C to +12ꢅ°C

ꢁtoꢂage Tempeꢂatuꢂe Range.............................-6ꢅ°C to +1ꢅ0°C

Junction Tempeꢂatuꢂe .....................................................+1ꢅ0°C

Leaꢃ Tempeꢂatuꢂe (yolꢃeꢂingꢈ 10y) .................................+300°C

+ 0.3k)

CC

Continuouy Poweꢂ Siyyipation (T = +70°C)

A

6-Pinꢈ 1mm x 1.ꢅmm µSFN (ꢃeꢂate 2.1mW/°C

above +70°C)................................................................168mW

6-Pinꢈ 2mm x 2mm µSFN (ꢃeꢂate 4.ꢅmW/°C

above +70°C)................................................................3ꢅ8mW

8-Pinꢈ 2mm x 2mm µSFN (ꢃeꢂate 4.8mW/°C

above +70°C)................................................................381mW

10-Pinꢈ 2mm x 2mm µSFN (ꢃeꢂate ꢅ.0mW/°C

above +70°C)................................................................403mW

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional

operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect device reliability.

ELEꢆTR—ꢆꢊL ꢆHꢊRꢊꢆTER—ST—ꢆS

(k

= +ꢅk ꢅ5ꢈ T = T

A

to T

ꢈ unleyy otheꢂwiye noteꢃ. Tꢄpical valuey aꢂe at k

= +ꢅk anꢃ T = +2ꢅ°C.) (Note 1)

CC A

MIN

MAX

CC

PꢊRꢊꢃETER

SYꢃꢁOL

ꢆOND—T—ONS

ꢃ—N

TYP

ꢃꢊX

16.0

100

UN—TS

ꢁupplꢄ koltage

k

0.9

k

nA

k

CC

ꢁupplꢄ Cuꢂꢂent

I

1

Sioꢃe Foꢂwaꢂꢃ koltage

k

I = 10mA

F

0.6ꢅ

0.9ꢅ

F

T

= +2ꢅ°Cꢈ 1ꢅꢀkꢈ

A

Poyitive tꢂanyienty

Negative tꢂanyienty

Poyitive tꢂanyienty

Negative tꢂanyienty

Poyitive tꢂanyienty

Negative tꢂanyienty

k

+ 2ꢅ

CC

ꢆuman ꢇoꢃꢄ Moꢃelꢈ

I = 10A

-2ꢅ

+ 80

F

T

A

= +2ꢅ°Cꢈ 14ꢀkꢈ

CC

Channel Clamp koltage

(Note 2)

k

Contact Siychaꢂge

(IEC 61000-4-2)ꢈ I = 42A

k

C

-80

F

T

A

= +2ꢅ°Cꢈ 30ꢀkꢈ

k

+ 120

-120

CC

Aiꢂ-Gap Siychaꢂge

(IEC 61000-4-2)ꢈ I = 90A

F

T

= -40°C to +ꢅ0°C

= -40°C to +12ꢅ°C

-1

+1

7

nA

µA

pF

Channel Leaꢀage Cuꢂꢂent

(Note 3)

A

Channel Input Capacitance

ESD PROTEꢆT—ON

k

= ꢅkꢈ biay of k /2ꢈ f = 1Mꢆz (Note 3)

6

CC

ꢆuman ꢇoꢃꢄ Moꢃel

1ꢅ

14

12

ꢀk

MAX13204E/MAX13206E/MAX13208E

MAX13202E

IEC 61000-4-2

Contact Siychaꢂge

IEC 61000-4-2

Aiꢂ-Gap Siychaꢂge

30

ꢀk

Note ±: Limity oveꢂ tempeꢂatuꢂe aꢂe guaꢂanteeꢃ bꢄ ꢃeyignꢈ not pꢂoꢃuction teyteꢃ.

Note ꢉ: Iꢃealizeꢃ clamp voltagey (L1 = L2 = L3 = 0) (Figuꢂe 1); yee the Applications Information yection foꢂ moꢂe infoꢂmation.

Note ꢅ: Guaꢂanteeꢃ bꢄ ꢃeyign. Not pꢂoꢃuction teyteꢃ.

ꢉ

_______________________________________________________________________________________

2-/4-/6-/8-Channel, 30ꢀk EꢁD ꢂrotectors in µDFN

Typical Operating Characteristics

(k

= +ꢅkꢈ T = +2ꢅ°Cꢈ unleyy otheꢂwiye noteꢃ.)

A

CC

CLAMP VOLTAGE

vs. DC CURRENT

I/O LEAKAGE CURRENT

vs. TEMPERATURE

SUPPLY CURRENT

vs. TEMPERATURE

1.1

10

1

100

10

1

1.0

0.9

V

= 12V

I/O TO V

CC

V

= 5V

CC

0.1

V

= 12V

CC

0.1

V

= 3.3V

I/O TO GND

CC

0.01

0.8

0.7

0.01

V

= 3.3V

CC

V

= 5V

CC

5

0.001

-40 -25 -10

5

20 35 50 65 80 95 110 125

TEMPERATURE (°C)

30

50

70

90

110

130

150

-40 -25 -10

20 35 50 65 80 95 110 125

DC CURRENT (mA)

TEMPERATURE (°C)

INPUT CAPACITANCE

vs. INPUT VOLTAGE

INPUT CAPACITANCE

vs. INPUT VOLTAGE

14

13

12

11

10

9

10

9

8

7

6

5

4

3

2

1

0

V

= 12V

CC

V

= 3.3V

CC

8

V

= 5.0V

CC

7

6

5

4

0

1

2

3

4

5

0

1

2

3

4

5

6

7

8

9 10 11 12

INPUT VOLTAGE (V)

ꢂin Description

P—N

NꢊꢃE

FUNꢆT—ON

Poweꢂ-ꢁupplꢄ Input. ꢇꢄpayy k

to GNS with a 0.1µF ceꢂamic capacitoꢂ.

CC

1

k

CC

Place the capacitoꢂ ay cloye ay poyyible to the ꢃevice.

No Connection. Not inteꢂnallꢄ connecteꢃ.

EꢁS-Pꢂotecteꢃ Channel

2ꢈ ꢅ

—

2–7

8

—

2–9

10

N.C.

I/O_

3ꢈ 4

6

2–ꢅ

6

GNS

Gꢂounꢃ

_______________________________________________________________________________________

ꢅ

2-/4-/6-/8-Channel, 30ꢀk EꢁD ꢂrotectors in µDFN

Detailed Description





ꢃ(I

)

ꢃ(I

)













EꢁS

ꢃt

EꢁS

ꢃt

k

= − k

+ L1 x

+ L3 x













C

F S2

(

The MAX13202E/MAX13204E/MAX13206E/MAX13208E

aꢂe ꢃioꢃe aꢂꢂaꢄy ꢃeyigneꢃ to pꢂotect yenyitive electꢂon-

icy againyt ꢃamage ꢂeyulting fꢂom EꢁS conꢃitiony oꢂ

tꢂanyient voltagey. The low input capacitance maꢀey

theye ꢃevicey iꢃeal foꢂ high-ypeeꢃ ꢃata liney. The

MAX13202E/MAX13204E/MAX13206E/MAX13208E

pꢂotect twoꢈ fouꢂꢈ yixꢈ anꢃ eight channelyꢈ ꢂeypectivelꢄ.





)





wheꢂe I

iy the EꢁS cuꢂꢂent pulye.

EꢁS

POSITIVE SUPPLY RAIL

L2

The MAX13202E/MAX13204E/MAX13206E/MAX13208E

aꢂe ꢃeyigneꢃ to woꢂꢀ in conjunction with a ꢃevice’y

intꢂinyic EꢁS pꢂotection. The MAX13202E/MAX13204E/

MAX13206E/MAX13208E limit the excuꢂyion of the EꢁS

event to below 2ꢅk peaꢀ voltage when yubjecteꢃ to the

ꢆuman ꢇoꢃꢄ Moꢃel wavefoꢂm. When yubjecteꢃ to the

IEC 61000-4-2 wavefoꢂmꢈ the peaꢀ voltage iy limiteꢃ to

80k (Contact Siychaꢂge) anꢃ 120k (Aiꢂ-Gap

Siychaꢂge). The ꢃevice that iy being pꢂotecteꢃ bꢄ the

MAX13202E/MAX13204E/ MAX13206E/MAX13208E

muyt be able to withytanꢃ theye peaꢀ voltagey pluy anꢄ

aꢃꢃitional voltage geneꢂateꢃ bꢄ the paꢂayitic boaꢂꢃ.

D1

L1

I/O_

PROTECTED

LINE

D2

L3

Applications Information

GROUND RAIL

Design Considerations

Maximum pꢂotection againyt EꢁS ꢃamage ꢂeyulty fꢂom

pꢂopeꢂ boaꢂꢃ laꢄout (yee the Layout Recommendations

yection anꢃ Figuꢂe 2). A gooꢃ laꢄout ꢂeꢃucey the paꢂa-

yitic yeꢂiey inꢃuctance on the gꢂounꢃ lineꢈ yupplꢄ lineꢈ

anꢃ pꢂotecteꢃ yignal liney.

Figure 1. Parasitic Series Inductance

The MAX13202E/MAX13204E/MAX13206E/MAX13208E

EꢁS ꢃioꢃey clamp the voltage on the pꢂotecteꢃ liney

ꢃuꢂing an EꢁS event anꢃ yhunt the cuꢂꢂent to GNS oꢂ

L2

V

CC

L1

k

. In an iꢃeal ciꢂcuitꢈ the clamping voltageꢈ k ꢈ iy

C

CC

PROTECTED LINE

ꢃefineꢃ ay the foꢂwaꢂꢃ voltage ꢃꢂopꢈ k ꢈ of the pꢂotection

F

ꢃioꢃe pluy anꢄ yupplꢄ voltage pꢂeyent on the cathoꢃe.

Foꢂ poyitive EꢁS pulyey:

NEGATIVE ESD

CURRENT

PULSE

k = k

+ k

F

C

CC

PATH TO

D1

D2

GROUND

Foꢂ negative EꢁS pulyey:

k = -k

V

C

PROTECTED

CIRCUIT

I/O_

C

F

In ꢂealitꢄꢈ the effect of the paꢂayitic yeꢂiey inꢃuctance

on the liney muyt alyo be conyiꢃeꢂeꢃ (Figuꢂe 1).

L3

Foꢂ poyitive EꢁS pulyey:

GND

ꢃ(I

)

ꢃ(I

)











EꢁS

ꢃt

EꢁS

ꢃt

k

= k

+ k +

F S1

L1 x

+ L2 x















C

CC

(

)

Figure 2. Layout Considerations

Foꢂ negative EꢁS pulyey:

ꢈ

_______________________________________________________________________________________

2-/4-/6-/8-Channel, 30ꢀk EꢁD ꢂrotectors in µDFN

Suꢂing an EꢁS eventꢈ the cuꢂꢂent pulye ꢂiyey fꢂom zeꢂo

to peaꢀ value in nanoyeconꢃy (Figuꢂe 3). Foꢂ exampleꢈ

in a 1ꢅꢀk IEC-61000-4-2 Aiꢂ-Gap Siychaꢂge EꢁS

eventꢈ the pulye cuꢂꢂent ꢂiyey to appꢂoximatelꢄ 4ꢅA in

30ꢀk EꢁD ꢂrotection

EꢁS pꢂotection can be teyteꢃ in vaꢂiouy waꢄy. The

MAX13202E/MAX13204E/MAX13206E/MAX13208E aꢂe

chaꢂacteꢂizeꢃ foꢂ pꢂotection to the following limity:

9

1ny (ꢃi/ꢃt = 4ꢅ x 10 ). An inꢃuctance of onlꢄ 10nꢆ aꢃꢃy

•

1ꢅꢀk uying the ꢆuman ꢇoꢃꢄ Moꢃel

an aꢃꢃitional 4ꢅ0k to the clamp voltage. An inꢃuctance

of 10nꢆ ꢂepꢂeyenty appꢂoximatelꢄ 0.ꢅin of boaꢂꢃ tꢂace.

Regaꢂꢃleyy of the ꢃevice’y ypecifieꢃ ꢃioꢃe clamp volt-

ageꢈ a pooꢂ laꢄout with paꢂayitic inꢃuctance yignificantlꢄ

incꢂeayey the effective clamp voltage at the pꢂotecteꢃ

yignal line.

14ꢀk (MAX13204E/MAX13206E/MAX13208E) anꢃ

12ꢀk (MAX13202E) uying the Contact Siychaꢂge

methoꢃ ypecifieꢃ in IEC 61000-4-2

•

30ꢀk uying the IEC 61000-4-2 Aiꢂ-Gap Siychaꢂge

methoꢃ

A low-EꢁR 0.1µF capacitoꢂ muyt be uyeꢃ between k

CC

ESD Test Conditions

anꢃ GNS. Thiy bꢄpayy capacitoꢂ abyoꢂby the chaꢂge

tꢂanyfeꢂꢂeꢃ bꢄ a +14ꢀk (MAX13204E/MAX13206E/

MAX13208E) anꢃ 12ꢀk (MAX13202E) IEC61000-4-2

Contact Siychaꢂge EꢁS event.

EꢁS peꢂfoꢂmance ꢃepenꢃy on a numbeꢂ of conꢃitiony.

Contact Maxim foꢂ a ꢂeliabilitꢄ ꢂepoꢂt that ꢃocumenty

teyt yetupꢈ methoꢃologꢄꢈ anꢃ ꢂeyulty.

Iꢃeallꢄꢈ the yupplꢄ ꢂail (k ) woulꢃ abyoꢂb the chaꢂge

CC

cauyeꢃ bꢄ a poyitive EꢁS ytꢂiꢀe without changing ity

ꢂegulateꢃ value. In ꢂealitꢄꢈ all poweꢂ yuppliey have an

effective output impeꢃance on theiꢂ poyitive ꢂaily. If a

poweꢂ yupplꢄ’y effective output impeꢃance iy 1Ωꢈ then

R

1MΩ

D

C

1.5kΩ

bꢄ uying k = I × Rꢈ the clamping voltage of k incꢂeay-

C

DISCHARGE

RESISTANCE

CHARGE-CURRENT-

LIMIT RESISTOR

ey bꢄ the equation k = I

x R

. An 8ꢀk

C

EꢁS

OUT

IEC 61000-4-2 EꢁS event geneꢂatey a cuꢂꢂent ypiꢀe of

24Aꢈ yo the clamping voltage incꢂeayey bꢄ k = 24A ×

C

HIGH-

VOLTAGE

DC

DEVICE

UNDER

TEST

1Ωꢈ oꢂ k = 24k. Againꢈ a pooꢂ laꢄout without pꢂopeꢂ

C

STORAGE

CAPACITOR

s

bꢄpayying incꢂeayey the clamping voltage. A ceꢂamic

chip capacitoꢂ mounteꢃ ay cloye to the MAX13202E/

100pF

SOURCE

MAX13204E/MAX13206E/MAX13208E k

pin iy the

CC

beyt choice foꢂ thiy application. A bꢄpayy capacitoꢂ

yhoulꢃ alyo be placeꢃ ay cloye to the pꢂotecteꢃ ꢃevice

ay poyyible.

Figure 4. Human Body ESD Test Model

I

100%

90%

I 100%

90%

PEAK-TO-PEAK RINGING

(NOT DRAWN TO SCALE)

I

P

r

AMPERES

36.8%

10%

0

10%

TIME

t = 0.7ns to 1ns

0

R

t

RL

30ns

60ns

t

DL

CURRENT WAVEFORM

Figure 5. Human Body Model Current Waveform

Figure 3. IEC 61000-4-2 ESD Generator Current Waveform

_______________________________________________________________________________________

1

2-/4-/6-/8-Channel, 30ꢀk EꢁD ꢂrotectors in µDFN

Layout Recommendations

Pꢂopeꢂ ciꢂcuit-boaꢂꢃ laꢄout iy cꢂitical to yuppꢂeyy EꢁS-

R

C

R

D

inꢃuceꢃ line tꢂanyienty. The MAX13202E/MAX13204E/

MAX13206E/MAX13208E clamp to 120k; howeveꢂꢈ with

impꢂopeꢂ laꢄoutꢈ the voltage ypiꢀe at the ꢃevice iy much

higheꢂ. A leaꢃ inꢃuctance of 10nꢆ with a 4ꢅA cuꢂꢂent

ypiꢀe at a ꢃv/ꢃt of 1ny ꢂeyulty in an ꢊDD—T—ONꢊL 4ꢅ0k

ypiꢀe on the pꢂotecteꢃ line. It iy eꢌꢌentiaꢄ that the laꢄout

of the PC boaꢂꢃ followy theye guiꢃeliney:

50Ω to 100Ω

330Ω

DISCHARGE

RESISTANCE

CHARGE-CURRENT-

LIMIT RESISTOR

HIGH-

VOLTAGE

DC

DEVICE

UNDER

TEST

C

s

150pF

STORAGE

CAPACITOR

SOURCE

1) Minimize tꢂace length between the connectoꢂ oꢂ

input teꢂminalꢈ I/O_ꢈ anꢃ the pꢂotecteꢃ yignal line.

2) Uye yepaꢂate planey foꢂ poweꢂ anꢃ gꢂounꢃ to ꢂeꢃuce

paꢂayitic inꢃuctance anꢃ to ꢂeꢃuce the impeꢃance to

the poweꢂ ꢂaily foꢂ yhunteꢃ EꢁS cuꢂꢂent.

3) Enyuꢂe yhoꢂt EꢁS tꢂanyient ꢂetuꢂn pathy to GNS

Figure 6. IEC 61000-4-2 ESD Test Model

anꢃ k

.

CC

4) Minimize conꢃuctive poweꢂ anꢃ gꢂounꢃ loopy.

Human Body Model

ꢅ) So not place cꢂitical yignaly neaꢂ the eꢃge of the

PC boaꢂꢃ.

Figuꢂe 4 yhowy the ꢆuman ꢇoꢃꢄ Moꢃelꢈ anꢃ Figuꢂe ꢅ

yhowy the cuꢂꢂent wavefoꢂm it geneꢂatey when ꢃiy-

chaꢂgeꢃ into a low impeꢃance. Thiy moꢃel conyiyty of

a 100pF capacitoꢂ chaꢂgeꢃ to the EꢁS voltage of inteꢂ-

eytꢈ which iy then ꢃiychaꢂgeꢃ into the ꢃevice thꢂough a

1.ꢅꢀΩ ꢂeyiytoꢂ.

6) ꢇꢄpayy k

to GNS with a low-EꢁR ceꢂamic capaci-

CC

toꢂ ay cloye to k

anꢃ gꢂounꢃ teꢂminaly ay poyyible.

CC

7) ꢇꢄpayy the yupplꢄ of the pꢂotecteꢃ ꢃevice to GNS

with a low-EꢁR ceꢂamic capacitoꢂ ay cloye to the

yupplꢄ pin ay poyyible.

IEC 61000-4-2

The IEC 61000-4-2 ytanꢃaꢂꢃ coveꢂy EꢁS teyting anꢃ

peꢂfoꢂmance of finiyheꢃ equipment. The MAX13202E/

MAX13204E/MAX13206E/MAX13208E help uyeꢂy

ꢃeyign equipment that meety Level 4 of IEC 61000-4-2.

Chip Information

PROCEꢁꢁ: ꢇiCMOꢁ

The main ꢃiffeꢂence between teyty ꢃone uying the

ꢆuman ꢇoꢃꢄ Moꢃel anꢃ IEC 61000-4-2 iy higheꢂ peaꢀ

cuꢂꢂent in IEC 61000-4-2. ꢇecauye yeꢂiey ꢂeyiytance iy

loweꢂ in the IEC 61000-4-2 EꢁS teyt moꢃel (Figuꢂe 6)ꢈ

the EꢁS-withytanꢃ voltage meayuꢂeꢃ to thiy ytanꢃaꢂꢃ iy

geneꢂallꢄ loweꢂ than that meayuꢂeꢃ uying the ꢆuman

ꢇoꢃꢄ Moꢃel. Figuꢂe 3 yhowy the cuꢂꢂent wavefoꢂm foꢂ

the 8ꢀk IEC 61000-4-2 Level 4 EꢁS Contact

Siychaꢂge teyt.

The Aiꢂ-Gap Siychaꢂge teyt involvey appꢂoaching the

ꢃevice with a chaꢂgeꢃ pꢂobe. The Contact Siychaꢂge

methoꢃ connecty the pꢂobe to the ꢃevice befoꢂe the

pꢂobe iy eneꢂgizeꢃ.

ꢇ

_______________________________________________________________________________________

2-/4-/6-/8-Channel, 30ꢀk EꢁD ꢂrotectors in µDFN

Functional Diagrams

MAX13206E

MAX13202E

MAX13204E

V

CC

I/O1

I/O2

I/O1

I/O2

I/O3

I/O4

I/O1

I/O2

I/O3

I/O4

I/O5

I/O6

GND

MAX13208E

V

CC

I/O1

I/O2

I/O3

I/O4

I/O5

I/O6

I/O7

I/O8

GND

ꢂin Configurations (continued)

6

5

4

10

9

8

7

6

8

7

6

5

4

MAX13204E

2

MAX13208E

MAX13206E

+

1

3

1

2

3

4

5

1

2

3

ꢇ µDFN

±3 µDFN

8 µDFN

(ꢉuu x ꢉuu)

_______________________________________________________________________________________

7

2-/4-/6-/8-Channel, 30ꢀk EꢁD ꢂrotectors in µDFN

ꢂacꢀage Information

(The pacꢀage ꢃꢂawing(y) in thiy ꢃata yheet maꢄ not ꢂeflect the moyt cuꢂꢂent ypecificationy. Foꢂ the lateyt pacꢀage outline infoꢂmation

go to www.uaxiu-ic.cou/pac5ageꢌ.)

TABLE1

Translation Table for Calendar Year Code

Calendar Year 2005 2006 2007 2008

2009

2010

2011

2012

2013

2014

Legend:

Marked with bar

Blank space - no bar required

TABLE2

Translation Table for Payweek Binary Coding

Payweek 06-11 12-17 18-23 24-29 30-35

36-41 42-47

48-51 52-05

Legend:

Marked with bar

Blank space - no bar required

TITLE:

PACKAGE OUTLINE, 6L uDFN, 1.5x1.0x0.8mm

APPROVAL

DOCUMENT CONTROL NO.

REV.

2

21-0147

D

2

-DRAWING NOT TO SCALE-

8

_______________________________________________________________________________________

2-/4-/6-/8-Channel, 30ꢀk EꢁD ꢂrotectors in µDFN

ꢂacꢀage Information (continued)

(The pacꢀage ꢃꢂawing(y) in thiy ꢃata yheet maꢄ not ꢂeflect the moyt cuꢂꢂent ypecificationy. Foꢂ the lateyt pacꢀage outline infoꢂmation

go to www.uaxiu-ic.cou/pac5ageꢌ.)

A

b

D

e

N

XXXX

SOLDER

MASK

COVERAGE

E

PIN 1

0.10x45∞

L

L1

1

SAMPLE

MARKING

PIN 1

INDEX AREA

A

7

(N/2 -1) x e)

C

L

C

L

b

L

A

e

A2

EVEN TERMINAL

ODD TERMINAL

A1

PACKAGE OUTLINE,

6, 8, 10L uDFN, 2x2x0.80 mm

1

-DRAWING NOT TO SCALE-

21-0164

A

2

COMMON DIMENSIONS

SYMBOL

MIN.

0.70

0.15

0.020

1.95

0.30

NOM.

MAX.

A

0.75

0.20

0.025

2.00

0.40

0.80

0.25

0.035

2.05

0.50

A1

A2

D

-

E

L

L1

0.10 REF.

PACKAGE VARIATIONS

PKG. CODE

L622-1

N

6

e

b

(N/2 -1) x e

0.65 BSC

0.50 BSC

0.40 BSC

0.30±0.05 1.30 REF.

0.25±0.05 1.50 REF.

0.20±0.03 1.60 REF.

L822-1

8

L1022-1

10

PACKAGE OUTLINE,

6, 8, 10L uDFN, 2x2x0.80 mm

2

21-0164

A

-DRAWING NOT TO SCALE-

2

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are

implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

Maxim Integrated ꢂroducts, 120 ꢁan Gabriel Drive, ꢁunnyvale, CA 94086 408-737-7600 _____________________ 9

Pꢂinteꢃ UꢁA

iy a ꢂegiyteꢂeꢃ tꢂaꢃemaꢂꢀ of Maxim Integꢂateꢃ Pꢂoꢃuctyꢈ Inc.

电子百科

产品导航

产品型号MAX13206EALA的Datasheet PDF文件预览

MAX13206EALA相关产品..

MAX13206EALA相关文章

IC37:专业IC行业平台