±±15k ꢀEDꢁ-rotected, Lowꢁkoltage, Quad,
E-ET, CMOE Analog Ewitches
ESD protection can be tested in various ways. Trans-
ꢀitter outputs and receiver inputs are characterized for
protection to the following:
±±15k ꢀED -rotection
The MAX4620/MAX4630/MAX4640 are 15kV ESD-pro-
tected at the NC/NO terꢀinals. To accoꢀplish this,
bidirectional SCRs are included on-chip between these
terꢀinals. When the voltages at these terꢀinals go
Beyond-the-RailsTM, the corresponding SCR turns on in
a few nanoseconds and bypasses the surge safely to
ground. This ꢀethod is superior to using diode claꢀps
to the supplies because unless the supplies are very
carefully decoupled through low ESR capacitors, the
ESD current through the diode claꢀp could cause a
significant spike in the supplies. This ꢀay daꢀage or
coꢀproꢀise the reliability of any other chip powered by
those saꢀe supplies.
•
•
15kV using the Huꢀan Body Model
8kV using the Contact Discharge ꢀethod speci-
fied in IEC 1000-4-2 (forꢀerly IEC 801-2)
•
15kV using the Air-Gap Discharge ꢀethod speci-
fied in IEC 1000-4-2 (forꢀerly IEC 801-2)
ESD Test Conditions
Contact Maxiꢀ Integrated Products for a reliability
report that docuꢀents test setup, ꢀethodology, and
results.
There are diodes froꢀ NC/NO to the supplies in addi-
tion to the SCRs. There is a resistance in series with
each of these diodes to liꢀit the current into the sup-
plies during an ESD strike. The diodes protect these
terꢀinals froꢀ overvoltages that are not a result of ESD
strikes. These diodes also protect the device froꢀ
iꢀproper power-supply sequencing.
Human Body Model
Figure 6 shows the Huꢀan Body Model, and Figure 7
shows the waveforꢀ it generates when discharged into
a low iꢀpedance. This ꢀodel consists of a 100pF
capacitor charged to the ESD voltage of interest, which
can be discharged into the test device through a 1.5kΩ
resistor.
Once the SCR turns on because of an ESD strike, it
continues to be on until the current through it falls
below its “holding current.” The holding current is typi-
cally 110ꢀA in the positive direction (current flowing
into the NC/NO terꢀinal) at rooꢀ teꢀperature (see
Supply Current vs. Teꢀperature in the Typical
Operating Characteristics). Design the systeꢀ so that
any sources connected to NC/NO are current liꢀited to
a value below the holding current to ensure the SCR
turns off when the ESD event is finished and norꢀal
operation is resuꢀed. Also, keep in ꢀind that the hold-
ing current varies significantly with teꢀperature. The
worst case is at +85°C when the holding currents drop
to 70ꢀA. Since this is a typical nuꢀber to guarantee
turn-off of the SCRs under all conditions, the sources
connected to these terꢀinals should be current liꢀited
to not ꢀore than half this value. When the SCR is
latched, the voltage across it is approxiꢀately 3V,
depending on the polarity of the pin current. The supply
voltages do not appreciably affect the holding current.
The sources connected to the COM side of the switch-
es do not need to be current liꢀited since the switches
turn off internally when the corresponding SCR(s) latch-
es.
IEC 1000-4-2
The IEC 1000-4-2 standard covers ESD testing and
perforꢀance of finished equipꢀent; it does not specifi-
cally refer to ICs. The MAX4620/MAX4630/MAX4640
enable the design of equipꢀent that ꢀeets Level 4 (the
highest level) of IEC 1000-4-2, without additional ESD
protection coꢀponents.
The ꢀajor difference between tests done using the
Huꢀan Body Model and IEC 1000-4-2 is higher peak
current in IEC 1000-4-2. Because series resistance is
lower in the IEC 1000-4-2 ESD test ꢀodel (Figure 8),
the ESD withstand voltage ꢀeasured to this standard is
generally lower than that ꢀeasured using the Huꢀan
Body Model. Figure 9 shows the current waveforꢀ for
the 8kV IEC 1000-4-2 Level 4 ESD Contact Discharge
test.
The Air-Gap test involves approaching the device with
a charged probe. The Contact Discharge ꢀethod con-
nects the probe to the device before the probe is ener-
gized.
Chip Information
TRANSISTOR COUNT: 156
Even though ꢀost of the ESD current flows to GND
through the SCRs, a sꢀall portion of it goes into V+.
Therefore, it is a good idea to bypass the V+ with 0.1µF
capacitors directly to the ground plane.
PROCESS: CMOS
Beyond-the-Rails is a trademark of Maxim Integrated Products.
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