MC34063A各脚功能电路原理芯片引脚定义引脚图及功能IC贸易商-中国IC网-芯三七

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SLLS636D – DECEMBER 2004 – REVISED MARCH 2005

D

Wide Input Voltage Range . . . 3 V to 40 V

D

Precision Internal Reference . . . 2%

Short-Circuit Current Limiting

Low Standby Current

High Output Switch Current . . . Up to 1.5 A

Adjustable Output Voltage

D

Oscillator Frequency . . . Up to 100 kHz

D (SOIC) OR P (PDIP) PACKAGE

(TOP VIEW)

Switch Collector

Switch Emitter

Timing Capacitor

GND

1

2

3

4

8

7

6

5

Driver Collector

I

pk

V

CC

Comparator Inverting Input

DRJ (QFN) PACKAGE

(TOP VIEW)

Switch Collector

8

Driver Collector

1

2

3

4

Switch Emitter

7

6

5

I

pk

V

OUT

Timing Capacitor

V

CC

GND

Comparator Inverting Input

description/ordering information

The MC33063A and MC34063A are easy-to-use ICs containing all the primary circuitry needed for building

simple dc-dc converters. These devices primarily consist of an internal temperature-compensated reference,

a comparator, an oscillator, a PWM controller with active current limiting, a driver, and a high-current output

switch; thus, the devices require minimal external components to build converters in the boost, buck, and

inverting topologies.

The MC33063A is characterized for operation from −40°C to 85°C, while the MC34063A is characterized for

operation from 0°C to 70°C.

ORDERING INFORMATION

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

†

PACKAGE

T

A

PDIP (P)

Tube of 50

Reel of 1000

Tube of 75

Reel of 2500

Tube of 50

Reel of 1000

Tube of 75

Reel of 2500

MC33063AP

QFN (DRJ)

MC33063ADRJR

MC33063AD

PREVIEW

−40°C to 85°C

SOIC (D)

M33063A

MC33063ADR

MC34063AP

PDIP (P)

MC34063AP

QFN (DRJ)

MC34063ADRJR

MC34063AD

PREVIEW

0°C to 70°C

SOIC (D)

M34063A

MC34063ADR

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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Copyright  2005, Texas Instruments Incorporated

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1

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SLLS636D – DECEMBER 2004 – REVISED MARCH 2005

functional block diagram

8

1

Drive

Switch

Collector

Q2

S

Q

Q1

R

100 Ω

7

2

3

4

I

Switch

Emitter

pk

Sense

I

pk

Oscillator

C

T

6

Timing

Capacitor

V

CC

1.25-V

Reference

Regulator

+

_

Comparator

Inverting

Input

5

GND

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 V

CC

Comparator Inverting Input voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 40 V

Switch Collector voltage, V

Switch Emitter voltage (V

Switch Collector to Switch Emitter voltage, V

IR

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V

C(switch)

PIN1

= 40 V), V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V

E(switch)

CE(switch)

Driver Collector voltage, V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 A

C(driver)

Driver Collector current, I

Switch current, I

SW

Package thermal impedance, θ (see Notes 1 and 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W

JA

DRJ package . . . . . . . . . . . . . . . . . . . . . . . TBD°C/W

P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W

Operating virtual junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

J

Storage temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

stg

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. Maximum power dissipation is a function of T (max), θ , and T . The maximum allowable power dissipation at any allowable

JA

J

A

ambient temperature is P = (T (max) − T )/θ . Operating at the absolute maximum T of 150°C can affect reliability.

D

J

A

JA

J

2. The package thermal impedance is calculated in accordance with JESD 51-7.

2

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SLLS636D – DECEMBER 2004 – REVISED MARCH 2005

recommended operating conditions

MIN

MAX

UNIT

V

CC

Supply voltage

3

40

V

MC33063A

MC34063A

−40

0

85

70

T

A

Operating free-air temperature range

°C

electrical characteristics, V

diagram)

= 5 V, T = full operating range (unless otherwise noted) (see block

A

CC

OSCILLATOR

PARAMETER

Oscillator frequency

Charge current

T

MIN

24

TYP

33

MAX

42

UNIT

kHz

µA

TEST CONDITIONS

= 0 V, C = 1 nF

A

f

I

V

25°C

osc

PIN5

T

= 5 V to 40 V

24

35

42

chg

CC

Discharge current

140

5.2

250

220

6.5

300

260

7.5

350

µA

dischg

CC

/I

dischg chg

Discharge-to-charge current ratio

Current-limit sense voltage

= V

PIN7

CC

V

mV

I

= I

Ipk

dischg chg

OUTPUT SWITCH (see Note 3)

PARAMETER

T

MIN

TYP

MAX

UNIT

TEST CONDITIONS

= 1 A, pins 1 and 8 connected

A

Saturation voltage – Darlington

V

I

Full range

1

1.3

V

CE(sat)

SW

connection

Saturation voltage – non-Darlington

connection (see Note 4)

= 1 A, R

PIN8

= 82 Ω to V ,

CC

SW

0.45

0.7

V

CE(sat)

forced ꢀ ꢀ 20

h

DC current gain

I

= 1 A, V

= 40 V

CE

= 5 V

25°C

50

75

FE

SW

CE

I

Collector off-state current

V

Full range

0.01

100

µA

C(off)

NOTES: 3. Low duty-cycle pulse testing is used to maintain junction temperature as close to ambient temperature as possible.

4. In the non-Darlington configuration, if the output switch is driven into hard saturation at low switch currents (≤300 mA) and high driver

currents (≥30 mA), it may take up to 2 µs for the switch to come out of saturation. This condition effectively shortens the off time at

frequencies ≥30 kHz, becoming magnified as temperature increases. The following output drive condition is recommended in the

non-Darlington configuration:

Forced ꢀ of output switch = I − 7 mA) ≥ 10,

/ (I

C,SW C,driver

where ꢀ 7 mA is required by the 100-Ω resistor in the emitter of the driver to forward bias the V of the switch.

be

COMPARATOR

PARAMETER

T

MIN

1.225

1.21

TYP

MAX

UNIT

TEST CONDITIONS

A

25°C

1.25 1.275

1.29

V

th

Threshold voltage

V

Full range

∆V

th

Threshold-voltage line regulation

Input bias current

V

= 5 V to 40 V

1.4

5

mV

nA

CC

I

IB

= 0 V

−20 −400

IN

TOTAL DEVICE

PARAMETER

T

MIN

MAX

UNIT

TEST CONDITIONS

= 5 V to 40 V, C = 1 nF,

A

V

CC

T

I

Supply current

= V , V

CC PIN5

> V ,

th

Full range

4

mA

CC

PIN7

PIN2

= GND, all other pins open

3

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SLLS636D – DECEMBER 2004 – REVISED MARCH 2005

TYPICAL CHARACTERISTICS

1000

100

1.8

V

= 5 V

V

= 5 V

CC

Pin 1, 7, 8 = V

1.7

1.6

1.5

1.4

1.3

1.2

1.1

Pin 7 = V

CC

Pin 5 = GND

= 25°C

CC

Pin 3, 5 = GND

= 25°C

T

A

t

ON

t

OFF

10

1

1.0

1

00.0 0.2 0.4 0.6 0.8 11.0 1.2 1.4 1.6

0.01

0.1

1

10

I , Emitter Current (A)

E

C , Oscillator Timing Capacitor (nF)

T

Figure 2. Output Switch Saturation Voltage vs

Emitter Current (Emitter-Follower Configuration)

Figure 1. Output Switch On-Off Time vs

Oscillator Timing Capacitor

1.4

380

Darlington Connection

Force Beta = 20

V

= 5 V

=I

CC

360

340

320

300

280

260

240

220

200

1.2

1.0

0.8

0.6

0.4

0.2

I

CHG DISCHG

V

= 5 V

CC

Pin 7 = V

CC

Pin 2, 3, 5 = GND

= 25°C

T

A

0.

0

−50

−25

0

25

50

75

100

125

00.0 0.2 0.4 0.6 0.8 11.0 1.2 1.4 1.6

T , Ambient Temperature (°C)

A

I , Collector Current (A)

C

Figure 3. Output Switch Saturation Voltage vs

Collector Current (Common-Emitter Configuration)

Figure 4. Current-Limit Sense Voltage vs

Temperature

3.6

3.2

2.8

2.4

2.0

1.6

C

= 1 nF

T

1.2

0.8

0.4

0.0

Pin 7 = V

CC

Pin 2 = GND

= 25°C

T

A

0

5

10

15

20

25

30

35

40

V

CC

, Supply Voltage (V)

Figure 5. Standby Supply Current vs

Supply Voltage

4

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SLLS636D – DECEMBER 2004 – REVISED MARCH 2005

TYPICAL CHARACTERISTICS

170 µH

L

1

8

180 Ω

Q2

S

R

Q

1N5819

Q1

2

3

7

6

I

R

pk

SC

0.22 Ω

C

T

V

in

12 V

C

V

CC

T

1500 pF

1.25-V

Reference

Regulator

+

_

100 µF

Comparator

4

5

1.0 µH

100 µF

R2

47 kΩ

V

out

28 V/175 mA

V

out

+

C

O

+

R1

2.2 kΩ

330 µF

Optional Filter

RESULTS

TEST

CONDITIONS

= 8 V to 16 V, I = 175 mA

Line Regulation

Load Regulation

Output Ripple

Efficiency

V

IN

V

IN

V

IN

V

IN

V

IN

30 mV 0.05%

10 mV 0.017%

O

= 12 V, I = 75 mA to 175 mA

O

= 12 V, I = 175 mA

400 mV

87.7%

O

PP

= 12 V, I = 175 mA

O

Output Ripple With Optional Filter

= 12 V, I = 175 mA

40 mV

PP

O

Figure 6. Step-Up Converter

5

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SLLS636D – DECEMBER 2004 – REVISED MARCH 2005

TYPICAL CHARACTERISTICS

R*

V

out

8

7

6

1

2

8

7

6

1

2

V

out

R

SC

R

SC

V

in

V

in

*R " 0 for constant V

2b. External pnp Saturated Switch (see Note 5)

in

2a. External npn Switch

NOTE A: If the output switch is driven into hard saturation (non-Darlington configuration) at low switch currents (≤300 mA) and high driver currents

(≥30 mA), it may take up to 2 µs to come out of saturation. This condition will shorten the off time at frequencies ≥30 kHz and is magnified

at high temperatures. This condition does not occur with a Darlington configuration because the output switch cannot saturate. If a

non-Darlington configuration is used, the output drive configuration in Figure 2b is recommended.

Figure 7. External Current-Boost Connections for I Peak Greater Than 1.5 A

C

6

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SLLS636D – DECEMBER 2004 – REVISED MARCH 2005

TYPICAL CHARACTERISTICS

1

8

Q2

S

R

Q

Q1

2

7

6

1N5819

I

R

pk

SC

0.33 Ω

C

T

Oscillator

3

V

in

25 V

V

CC

L

C

T

220 µH

1.25-V

Reference

Regulator

470 pF

+

_

100 µF

Comparator

4

5

1.0 µH

100 µF

R2

3.8 kΩ

V

out

5 V/500 mA

V

out

+

R1

1.2 kΩ

C

O

470 µF

Optional Filter

RESULTS

TEST

CONDITIONS

= 15 V to 25 V, I = 500 mA

Line Regulation

Load Regulation

Output Ripple

V

IN

V

IN

V

IN

V

IN

V

IN

V

IN

12 mV 0.12%

3 mV 0.03%

O

= 25 V, I = 50 mA to 500 mA

O

= 25 V, I = 500 mA

120 mV

1.1 A

O

PP

Short-Circuit Current

Efficiency

= 25 V, R = 0.1 Ω

L

= 25 V, I = 500 mA

83.7%

O

Output Ripple With Optional Filter

= 25 V, I = 500 mA

40 mV

PP

O

Figure 8. Step-Down Converter

7

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SLLS636D – DECEMBER 2004 – REVISED MARCH 2005

TYPICAL CHARACTERISTICS

1

2

8

1

2

8

7

V

out

7

6

V

out

R

SC

in

R

SC

V

in

6

4a. External npn Switch

4b. External pnp Saturated Switch

Figure 9. External Current-Boost Connections for I Peak Greater Than 1.5 A

C

8

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SLLS636D – DECEMBER 2004 – REVISED MARCH 2005

TYPICAL CHARACTERISTICS

1

8

Q2

S

R

Q

Q1

2

7

6

L

I

R

88 µH

pk

SC

0.24 Ω

C

T

Oscillator

V

in

3

V

CC

4.5 V to

6.0 V

1N5819

1.25-V

Reference

Regulator

+

_

100 µF

1500 pF

4

Comparator

5

1.0 µH

100 µF

R1

953 Ω

V

out

−12 V/100 mA

V

out

C

R2

8.2 kΩ

O

1000 µF

+

Optional Filter

RESULTS

TEST

CONDITIONS

= 4.5 V to 6 V, I = 100 mA

Line Regulation

Load Regulation

Output Ripple

V

IN

V

IN

V

IN

V

IN

V

IN

V

IN

3 mV 0.12%

0.022 V 0.09%

O

= 5 V, I = 10 mA to 100 mA

O

= 5 V, I = 100 mA

500 mV

910 mA

62.2%

O

PP

Short-Circuit Current

Efficiency

= 5 V, R = 0.1 Ω

L

= 5 V, I = 100 mA

O

Output Ripple With Optional Filter

= 5 V, I = 100 mA

70 mV

PP

O

Figure 10. Voltage-Inverting Converter

9

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁ ꢂꢂ ꢃꢄ ꢂ ꢅ ꢆ ꢀ ꢁꢂꢇ ꢃ ꢄ ꢂ ꢅ

ꢈꢉ ꢊꢋꢅ ꢌꢍ ꢅꢎ ꢏ ꢐꢐ ꢑꢒ ꢓꢏ ꢔꢁ ꢎꢓ ꢕ ꢖ ꢗꢍ ꢘꢒ ꢕ ꢖꢙ ꢑꢚ ꢕ ꢒꢁ ꢛꢕꢖ ꢙ ꢘꢍꢙ ꢔꢜ ꢅꢒꢐ ꢘꢑ

SLLS636D – DECEMBER 2004 – REVISED MARCH 2005

TYPICAL CHARACTERISTICS

8

7

6

1

2

1

2

8

7

V

out

V

out

V

in

V

in

6

6a. External npn Switch

6b. External pnp Saturated Switch

Figure 11. External Current-Boost Connections for I Peak Greater Than 1.5 A

C

10

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢂ ꢃ ꢄ ꢂꢅ ꢆ ꢀ ꢁꢂ ꢇꢃ ꢄꢂ ꢅ

ꢈ ꢉ ꢊ ꢋꢅ ꢌ ꢍꢅ ꢎ ꢏꢐ ꢐ ꢑꢒ ꢓꢏꢔ ꢁꢎꢓ ꢕꢖꢗ ꢍꢘꢒ ꢕꢖ ꢙ ꢑꢚ ꢕ ꢒꢁ ꢛꢕꢖ ꢙ ꢘꢍꢙ ꢔ ꢜꢅꢒꢐ ꢘꢑ

SLLS636D – DECEMBER 2004 – REVISED MARCH 2005

APPLICATION INFORMATION

calculations of key parameters

CALCULATION

STEP DOWN

V_out) V_F

V_{in min}* V_sat* V_out

VOLTAGE INVERTING

STEP UP

Ť

V_out) V_F* V_{in min}

V_out) V_F

(

)

t

/t

on off

V_{in min}* V_sat

V_in* V_sat

(

)

(

)

1

f

1

f

1

f

(t + t

on off

)

t_on) t_off

t

off

t

on

) 1

t

off

ǒ

Ǔ

ǒ

Ǔ

ǒ

Ǔ

t

on

t_on) t_off* t_off

*5

C

T

4 10

t

4 10

t

4 10

t

on

t_on

t_off

t_on

t_off

I

2I_{out max}

ǒ Ǔ

2I_{out max}

) 1

2I_{out max}

) 1

pk(switch)

(

)

(

)

(

)

0.3

R

sc

I_{pk switch}

(

)

(

)

(

)

ǒ_V

Ǔ

ǒ_V

Ǔ

ǒ_V

Ǔ

₎* V_sat* V_out

₎* V_sat

(

in min

₎* V_sat

(

in min

L

t

on max

t

ǒ

Ǔ ǒ Ǔ

ǒ Ǔ

(min)

(

)

(

)

(

)

on max

I_{pk switch}

( )

I_{pk switch}

(

)

(

)

ǒ

Ǔ

I_outt_on

I_{pk switch}t_on) t_off

I_outt_on

V_{ripple pp}

Ǔ

(

)

9

C

O

V_{ripple pp}

8V_{ripple pp}

ǒ

Ǔ

ǒ

Ǔ

11

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

9-Mar-2005

PACKAGING INFORMATION

Orderable Device

MC33063AD

MC33063ADR

MC33063AP

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

SOIC

D

8

75

2500

50

Pb-Free

(RoHS)

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

SOIC

PDIP

SOIC

PDIP

D

P

D

P

Pb-Free

(RoHS)

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

MC34063AD

MC34063ADR

MC34063AP

75

Pb-Free

(RoHS)

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

2500

50

Pb-Free

(RoHS)

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional

product content details.

None: Not yet available Lead (Pb-Free).

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,

including bromine (Br) or antimony (Sb) above 0.1% of total product weight.

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 1

MECHANICAL DATA

MPDI001A – JANUARY 1995 – REVISED JUNE 1999

P (R-PDIP-T8)

PLASTIC DUAL-IN-LINE

0.400 (10,60)

0.355 (9,02)

8

5

0.260 (6,60)

0.240 (6,10)

1

4

0.070 (1,78) MAX

0.325 (8,26)

0.300 (7,62)

0.020 (0,51) MIN

0.015 (0,38)

Gage Plane

0.200 (5,08) MAX

Seating Plane

0.010 (0,25) NOM

0.125 (3,18) MIN

0.100 (2,54)

0.021 (0,53)

0.430 (10,92)

MAX

0.010 (0,25)

M

0.015 (0,38)

4040082/D 05/98

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. Falls within JEDEC MS-001

For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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enhancements, improvements, and other changes to its products and services at any time and to discontinue

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI

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