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MCP1826/MCP1826S

1000 mA, Low Voltage, Low Quiescent Current

LDO Regulator

Features

Description

• 1000 mA Output Current Capability

The MCP1826/MCP1826S is a 1000 mA Low Dropout

(LDO) linear regulator that provides high current and

low output voltages. The MCP1826 comes in a fixed or

adjustable output voltage version, with an output

voltage range of 0.8V to 5.0V. The 1000 mA output cur-

rent capability, combined with the low output voltage

capability, make the MCP1826 a good choice for new

sub-1.8V output voltage LDO applications that have

high current demands. The MCP1826S is a 3-pin fixed

voltage version.

• Input Operating Voltage Range: 2.3V to 6.0V

• Adjustable Output Voltage Range: 0.8V to 5.0V

(MCP1826 only)

• Standard Fixed Output Voltages:

- 0.8V, 1.2V, 1.8V, 2.5V, 3.0V, 3.3V, 5.0V

• Other Fixed Output Voltage Options Available

Upon Request

• Low Dropout Voltage: 250 mV Typical at 1000 mA

• Typical Output Voltage Tolerance: 0.5%

• Stable with 1.0 µF Ceramic Output Capacitor

• Fast response to Load Transients

The MCP1826/MCP1826S is stable using ceramic

output capacitors that inherently provide lower output

noise and reduce the size and cost of the entire

regulator solution. Only 1 µF of output capacitance is

needed to stabilize the LDO.

• Low Supply Current: 120 µA (typ)

• Low Shutdown Supply Current: 0.1 µA (typ)

(MCP1826 only)

Using CMOS construction, the quiescent current

consumed by the MCP1826/MCP1826S is typically

less than 120 µA over the entire input voltage range,

making it attractive for portable computing applications

that demand high output current. The MCP1826

versions have a Shutdown (SHDN) pin. When shut

down, the quiescent current is reduced to less than

0.1 µA.

• Fixed Delay on Power Good Output

(MCP1826 only)

• Short Circuit Current Limiting and

Overtemperature Protection

• TO-263-5 (DDPAK-5), TO-220-5, SOT-223-5

Package Options (MCP1826).

• TO-263-3 (DDPAK-3), TO-220-3, SOT-223-3

Package Options (MCP1826S).

On the MCP1826 fixed output versions the scaled-

down output voltage is internally monitored and a

power good (PWRGD) output is provided when the

output is within 92% of regulation (typical). The

PWRGD delay is internally fixed at 200 µs (typical).

Applications

• High-Speed Driver Chipset Power

• Networking Backplane Cards

• Notebook Computers

The overtemperature and short circuit current-limiting

provide additional protection for the LDO during system

fault conditions.

• Network Interface Cards

• Palmtop Computers

• 2.5V to 1.XV Regulators

DS22057A-page 1

MCP1826/MCP1826S

Package Types

MCP1826

MCP1826S

DDPAK-5

TO-220-5

Fixed/Adjustable

DDPAK-3

TO-220-3

1

2

3

1

2

3

1

2 3 4 5

1 2 3 4 5

SOT-223-5

SOT-223-3

6

4

2

1

3

1

2

4

3

5

Fixed

Adjustable

1

2

3

4

V_IN

1

2

3

4

5

6

SHDN

V_IN

SHDN

V_IN

GND (TAB)

V_OUT

GND (TAB)

V_OUT

GND (TAB)

V_OUT

GND (TAB)

PWRGD

GND (TAB)

ADJ

GND (TAB)

DS22057A-page 2

MCP1826/MCP1826S

Typical Application

MCP1826 Fixed Output Voltage

PWRGD

R₁

100 kΩ

On

SHDN

V_IN

Off

1

V_OUT= 1.8V @ 1000 mA

V_OUT

V_IN= 2.3V to 2.8V

GND

C₁

C₂

1 µF

4.7 µF

MCP1826 Adjustable Output Voltage

V_ADJ

R₂

20 kΩ

R₁

40 kΩ

On

SHDN

V_IN

Off

1

V_OUT= 1.2V @ 1000 mA

V_OUT

V_IN= 2.3V to 2.8V

C₁

4.7 µF

C₂

1 µF

GND

DS22057A-page 3

MCP1826/MCP1826S

Functional Block Diagram - Adjustable Output

PMOS

V_IN

V_OUT

Undervoltage

Lock Out

(UVLO)

I_SNS

C_f

R_f

SHDN

ADJ/SENSE

+

–

Driver w/limit

and SHDN

EA

Overtemperature

Sensing

SHDN

V_REF

V

IN

Reference

SHDN

Soft-Start

Comp

T_DELAY

GND

92% of V_REF

DS22057A-page 4

MCP1826/MCP1826S

Functional Block Diagram - Fixed Output (3-Pin)

PMOS

V_IN

V_OUT

Undervoltage

Lock Out

Sense

(UVLO)

I_SNS

C_f

R_f

SHDN

+

–

Driver w/limit

and SHDN

EA

Overtemperature

Sensing

SHDN

V_REF

V

IN

Reference

SHDN

Soft-Start

Comp

T_DELAY

GND

92% of V_REF

DS22057A-page 5

MCP1826/MCP1826S

Functional Block Diagram - Fixed Output (5-Pin)

PMOS

V_IN

V_OUT

Undervoltage

Lock Out

Sense

(UVLO)

I_SNS

C_f

R_f

SHDN

+

–

Driver w/limit

and SHDN

EA

Overtemperature

Sensing

SHDN

V_REF

V

IN

Reference

SHDN

Soft-Start

PWRGD

T_DELAY

Comp

GND

92% of V_REF

DS22057A-page 6

MCP1826/MCP1826S

† Notice: Stresses above those listed under “Maximum Rat-

ings” may cause permanent damage to the device. This is a

stress rating only and functional operation of the device at

those or any other conditions above those indicated in the

operational listings of this specification is not implied. Expo-

sure to maximum rating conditions for extended periods may

affect device reliability.

1.0

ELECTRICAL

CHARACTERISTICS

Absolute Maximum Ratings †

V_IN....................................................................................6.5V

Maximum Voltage on Any Pin .. (GND – 0.3V) to (V_DD+ 0.3)V

Maximum Power Dissipation......... Internally-Limited (Note 6)

Output Short Circuit Duration................................Continuous

Storage temperature .....................................-65°C to +150°C

Maximum Junction Temperature, T_J...........................+150°C

ESD protection on all pins (HBM/MM) ........... ≥ 4 kV; ≥ 300V

AC/DC CHARACTERISTICS

Electrical Specifications: Unless otherwise noted, V_IN= V_OUT(MAX)+ V_DROPOUT(MAX), Note 1, V_R=1.8V for Adjustable Output,

_OUT= 1 mA, C_IN= C_OUT= 4.7 µF (X7R Ceramic), T_A= +25°C.

Boldface type applies for junction temperatures, T_J(Note 7) of -40°C to +125°C

I

Parameters

Sym

Min

Typ

Max

Units

Conditions

Input Operating Voltage

Input Quiescent Current

V_IN

I_q

2.3

6.0

V

Note 1

—

120

0.1

220

µA

I_L= 0 mA, V_OUT= 0.8V to

5.0V

Input Quiescent Current for

SHDN Mode

I_SHDN

I_OUT

—

1000

—

3

—

µA

mA

%/V

%

SHDN = GND

Maximum Output Current

—

V_IN= 2.3V to 6.0V

V

_R= 0.8V to 5.0V, Note 1

Line Regulation

ΔV_OUT

(V_OUTx ΔV_IN

/

±0.05

±0.5

2.2

±0.20

1.0

—

(Note 1) ≤ V_IN≤ 6V

)

Load Regulation

ΔV_OUT/V_OUT

-1.0

—

I_OUT= 1 mA to 1000 mA,

(Note 4)

Output Short Circuit Current

I_{OUT_SC}

A

R_LOAD< 0.1Ω, Peak Current

Adjust Pin Characteristics (Adjustable Output Only)

Adjust Pin Reference Voltage

V_ADJ

0.402

0.410

0.418

V

V_IN= 2.3V to V_IN= 6.0V,

I

_OUT= 1 mA

Adjust Pin Leakage Current

I_ADJ

-10

—

±0.01

40

+10

—

nA

V_IN= 6.0V, V_ADJ= 0V to 6V

Adjust Temperature Coefficient

TCV_OUT

ppm/°C Note 3

Fixed-Output Characteristics (Fixed Output Only)

Voltage Regulation V_OUT

V_R- 2.5% V_R±0.5% V_R+ 2.5%

V

Note 2

Note 1: The minimum V_INmust meet two conditions: V_IN≥ 2.3V and V_IN≥ V_OUT(MAX)+ V_{DROPOUT(MAX).}

2: V_Ris the nominal regulator output voltage for the fixed cases. V_R= 1.2V, 1.8V, etc. V_Ris the desired set point output

voltage for the adjustable cases. V_R= V_{ADJ *}((R₁/R₂)+1). Figure 4-1.

3: TCV_OUT= (V_OUT-HIGH– V_OUT-LOW) *10⁶/ (V_R* ΔTemperature). V_OUT-HIGHis the highest voltage measured over the

temperature range. V_OUT-LOWis the lowest voltage measured over the temperature range.

4: Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is

tested over a load range from 1 mA to the maximum specified output current.

5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its

nominal value that was measured with an input voltage of V_IN= V_OUT(MAX)+ V_DROPOUT(MAX)

.

6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction

temperature and the thermal resistance from junction to air. (i.e., T_A, T_J, θ_JA). Exceeding the maximum allowable power

dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained

junction temperatures above 150°C can impact device reliability.

7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the

desired junction temperature. The test time is small enough such that the rise in the junction temperature over the

ambient temperature is not significant.

DS22057A-page 7

MCP1826/MCP1826S

AC/DC CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise noted, V_IN= V_OUT(MAX)+ V_DROPOUT(MAX), Note 1, V_R=1.8V for Adjustable Output,

I

_OUT= 1 mA, C_IN= C_OUT= 4.7 µF (X7R Ceramic), T_A= +25°C.

Boldface type applies for junction temperatures, T_J(Note 7) of -40°C to +125°C

Parameters

Sym

Min

Typ

Max

400

Units

Conditions

Dropout Characteristics

Dropout Voltage

V_DROPOUT

—

250

mV

Note 5, I_OUT= 1000 mA,

V

_IN(MIN)= 2.3V

Power Good Characteristics

PWRGD Input Voltage Operat-

ing Range

V_{PWRGD_VIN}

1.0

—

6.0

V

T_A= +25°C

1.2

6.0

T_A= -40°C to +125°C

For V_IN< 2.3V, I_SINK= 100 µA

PWRGD Threshold Voltage

V_{PWRGD_TH}

%V_OUTFalling Edge

V_OUT< 2.5V Fixed,

_OUT= Adj.

(Referenced to V_OUT

)

89

92

95

V

90

1.0

—

92

2.0

0.2

94

3.0

0.4

V_OUT>= 2.5V Fixed

PWRGD Threshold Hysteresis

PWRGD Output Voltage Low

V_{PWRGD_HYS}

V_{PWRGD_L}

%V_OUT

V

I_{PWRGD SINK}= 1.2 mA,

ADJ = 0V

PWRGD Leakage

P_WRGD

_

—

1

—

nA

µs

V_PWRGD= V_IN= 6.0V

Rising Edge

LK

PWRGD Time Delay

T_PG

125

R_PULLUP= 10 kΩ

Detect Threshold to PWRGD

Active Time Delay

T_VDET-PWRGD

—

200

—

µs

V_OUT= V_{PWRGD_TH}+ 20 mV

to V_{PWRGD_TH}- 20 mV

Shutdown Input

Logic High Input

V_SHDN-HIGH

V_SHDN-LOW

SHDN_ILK

45

—

15

%V_IN

µA

V_IN= 2.3V to 6.0V

Logic Low Input

SHDN Input Leakage Current

-0.1

±0.001

+0.1

V_IN= 6V, SHDN =V_IN

SHDN = GND

,

AC Performance

Output Delay From SHDN

T_OR

e_N

—

100

2.0

—

µs

SHDN = GND to V_IN

V

_OUT= GND to 95% V_R

µV/√Hz I_OUT= 200 mA, f = 1 kHz,

_OUT= 10 µF (X7R Ceramic),

_OUT= 2.5V

Output Noise

C