AD9963BCPZ现入库存!支持全双工和半双工数据接口!
日期:2022-8-30AD9963BCPZ现入库存!支持全双工和半双工数据接口!103只可以发货,批次2022+,详情18038133932朱泉,或电邮leiziteng@szlztic.cn szlztic@163.com
AD9963BCPZ特点:
双通道10位/12位、100 MSPS ADC
SNR = 67 dB, fIN = 30.1 MHz双通道10位/12位、170 MSPS DAC
ACLR = 74 dBc5 个辅助模拟输入/输出通道
低功耗:<425 mW(最高采样速率时)
支持全双工和半双工数据接口
72引脚、无铅小型LFCSP封装
ACS758LCB-050B-PFF-T
ACS712ELCTR-05B-T
MMA8451QR1
ACS712ELCTR-20A-T
ACS723LLCTR-10AB-T
ACS758LCB-100B-PFF-T
LTC6992IS6-1#TRMPBF
ICM-20948
AT42QT1010-TSHR
AT42QT1040-MMHR
DS1825U+T&R
LT6100IMS8#TRPBF
AD5933YRSZ
ACS723LLCTR-20AB-T
LT6100IMS8#PBF
ADUM1201ARZ
MPU-6050
ACS723LLCTR-40AU-T
ADUM1402ARWZ
ADUM1301BRWZ-RL
ACS712ELCTR-30A-T
MCP6S28-I/SL
ACS758LCB-100U-PFF-T
LSM6DSLTR
LSM6DSOTR
SI3865DDV-T1-GE3
TPS2412PWR
MCP6S28T-I/SL
ACS724LLCTR-20AU-T
ACS723LLCTR-20AU-T
LTC6992CS6-1#TRMPBF
OPT3001DNPR
ADXL345BCCZ-RL7
LIS2DW12TR
ACS722LLCTR-10AU-T
ACS758LCB-050U-PFF-T
ACS713ELCTR-30A-T
DS1825U+
ACS724LLCTR-20AB-T
LSM6DSOXTR
ADUM1401CRWZ
ACS723LLCTR-10AU-T
ICM-20602
ACS723LLCTR-05AB-T
INA240A1PWR
TLE5012BE1000XUMA1
ACS710KLATR-25CB-T
ADUM1301ARWZ
ACS722LLCTR-10AB-T
LSM6DS3TR
TLE5009A16DE2210XUMA1
ADUM2402ARWZ
AT42QT1011-TSHR
INA240A2EDRQ1
ACS715LLCTR-20A-T
TPS2410PWR
LTC1799CS5#TRMPBF
ISO1212DBQR
ACS758KCB-150B-PFF-T
AD5933YRSZ-REEL7
ADUM1400ARWZ
ACS758ECB-200B-PFF-T
ADXL345BCCZ
ACS714LLCTR-05B-T
ACS722LLCTR-20AB-T
ACS713ELCTR-20A-T
LTC6101CIS5#TRMPBF
INA240A2PWR
LMP91000SDEPB
ACS722LLCTR-05AB-T
ACS780LLRTR-100U-T
ACS780LLRTR-050U-T
MAX31865ATP+T
ACS723LLCTR-40AB-T
TLE5009A16DE2200XUMA1
ACS714LLCTR-20A-T
PSSI2021SAY,115
ACS780LLRTR-100B-T
ACS714ELCTR-05B-T
ACS711KEXLT-15AB-J
MMA8451QT
ACS709LLFTR-20BB-T
LT4363IDE-2#TRPBF
TLE72422GXUMA2
AD5700BCPZ-R5
ACS756SCB-050B-PFF-T
XTR115UA/2K5
ACS781LLRTR-100U-T
LTC6101HVACS5#TRMPBF
LSM6DSMTR
BNO055
LTC6992HS6-1#TRPBF
ACPL-C87A-500E
ADUM1200CRZ
ACS759ECB-200B-PFF-T
ADUM241E1BRWZ-RL
LT4363IDE-2#PBF
XTR111AIDGQR
LT4363HMS-2#PBF
AD9963BCPZ应用:
无线基础设施
微微蜂窝和毫微微蜂窝基站医疗仪器
超声AFE便携式仪器
信号发生器、信号分析仪
When operating below 75 MHz, bypass the duty cycle stabilizer in the ADCCLK generator circuit and take care to ensure a duty cycle 45% to 55% of the CLKP/CLKN clock input. The series of writes in Table 32 configures the Rx clock doubler to clock the ADCs from reset. These writes are for an ADC clock of < 75 MHz.