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产品型号ML2650的Datasheet PDF文件预览

ML2650 DATASHEET (Digest)

Version 1.1

Issued on 15-Oct-07

Version 1.1

1 / 20

ML2650 DATASHEET (Digest)

Contents

General Description.................................................................................................................................................................................3

Features ...................................................................................................................................................................................................3

Block Diagram ........................................................................................................................................................................................4

Application Example...............................................................................................................................................................................5

Pin Layout ...............................................................................................................................................................................................6

36Pin WCSP .......................................................................................................................................................................................6

Pin Description........................................................................................................................................................................................7

Electric Characteristics............................................................................................................................................................................9

Absolute Maximum Ratings................................................................................................................................................................9

Recommended Operating Ranges .......................................................................................................................................................9

DC Characteristics ............................................................................................................................................................................10

Headphone Output Characteristics....................................................................................................................................................10

AC Characteristics ............................................................................................................................................................................11

Clock......................................................................................................................................................................... 11

Reset ......................................................................................................................................................................... 11

Bus Interface at Write Cycle.....................................................................................................................................12

Bus Interface at Read Cycle......................................................................................................................................14

Serial Audio Interface (Slave)...................................................................................................................................15

Serial Audio Interface (Master) ................................................................................................................................16

Power On ..................................................................................................................................................................17

Power Off..................................................................................................................................................................17

Sleep .........................................................................................................................................................................18

Wakeup .....................................................................................................................................................................18

Version 1.1

2 / 20

ML2650 DATASHEET (Digest)

General Description

ML2650 is low power stereo headphone amplifier by Class D with 64KB ram.

Features

Stereo audio DAC

16bit stereo audio sigma-delta DAC

Sampling frequency: 16.0/22.05/24.0/32.0/44.1/48.0kHz

Audio output

Stereo headphone amplifier by Class D for low power consumption

RAM

Include 64KB SRAM for PCM audio data

CPU I/F

8bit parallel I/F

Serial Audio Interface Receiver

Sampling frequency: 16.0/22.05/24.0/32.0/44.1/48.0kHz

Bit length: fixed 16bit

Support master / slave mode (need mclk at slave mode)

Package

36 pin 0.4mm pitch W-CSP, Package size 2.54x2.70mm

Version 1.1

3 / 20

ML2650 DATASHEET (Digest)

Block Diagram

D7-D0

CSB

WRB

RDB

ILE

Host

Interface

64KB

SRAM

IRQ

HPOUTL

HPOUTR

LRCLK

Serial

BCLK

SAIIN

MCLK

Audio

Interface

PLL

CGB

SYSCLK

PLLC

Version 1.1

4 / 20

ML2650 DATASHEET (Digest)

Application Example

ML2650

HPOUTL

HPOUTR

D7-D0

CSB

WRB

RDB

ILE

Refer to application

example circuit below

HPLVDD

HPRVDD

HPLGND

HPRGND

CPU

DSP

IRQ

LRCLK

BCLK

SAIIN

IOVDD

MCLK

DVDD

0.1uF

This C,R parameter

applies for 32.768kHz

SYSCLK input.

RESETB

SYSCLK

DGND

0.1uF

PLLC

220Ω

150nF (B or

X7R spec)

TMODE1

TMODE0

PLLVDD

PLLGND

1500nF

0.1uF

(B or X7R spec)

Liner

Regulator

100uF

HPLVDD

HPRVDD

100uH

220uF

HPOUTL

0.1uF

HPLGND

HPRGND

100uH

220uF

HPOUTR

0.1uF

Note. Capacitance tolerance is permitted within 10%, resistance tolerance is permitted within 5%, if no special mention.

Version 1.1

5 / 20

ML2650 DATASHEET (Digest)

Pin Layout

36Pin WCSP

Bottom View

TEST1

TEST0

BCLK

SAIIN

MCLK

PLLC

PLLVDD

PLLGND

DGND

IOVDD

DVDD

HPLGND

HPRVDD

HPLVDD

CSB

HPRGND

HPOUTR

DGND

RESETB

ILE

HPOUTL

IRQ

WRB

RDB

DVDD

LRCLK

SYSCLK

IOVDD

INDEX

Version 1.1

6 / 20

ML2650 DATASHEET (Digest)

Pin Description

Pin Pin Name

No.

Buffer

Type

Power

Description

Reset

Sleep

state

F1 SYSCLK Input

IOVDD System clock input.

A6 RESETB

IOVDD

Schmitt Input

w ith Delay

Hardware reset pin. When the pin is “L”, LSI is in reset

status.

D2 D7

4mA I/O

IOVDD Data input/output pin.

Hi-Z

D1 D6

C2 D5

C1 D4

C3 D3

B2 D2

B3 D1

A1 D0

C4 CSB

4mA I/O

Schmitt Input

IOVDD Data input/output pin.

IOVDD Chip select pin.

Hi-Z

A3 RDB

A4 WRB

A5 ILE

Input

IOVDD Read enable pin.

IOVDD Write enable pin.

Schmitt Input

Input

IOVDD

When ILE pin is “H”, D7-0 is used for index. When it’s

“L”, data from D7-0 is used for data.

4mA Output

4mA I/O

Input

Interrupt output pin. It outputs “H” level, when the

interrupt is generated.

Low

D4 IRQ

IOVDD

D3 LRCLK

IOVDD LR clock input/output for SAI. Please pulldown to Hi-Z

DGND because this pin is input mode in slave.

F4 BCLK

F3 SAIIN

IOVDD Bit clock input/output for SAI. Please pulldown to Hi-Z

DGND because this pin is input mode in slave.

IOVDD Serial data input for SAI. Please input data from left Hi-Z

channel first. Please pulldown to DGND when SAI

not use.

F2 MCLK

4mA I/O

IOVDD 256fs clock input in slave mode.

In master mode, controllable 256fs clock output.

Hi-Z

Please pulldown to DGND because this pin is input

mode in slave.

Tristate Output

D5 HPOUTL

HPLVDD Headphone output left.

Hi-Z

Version 1.1

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ML2650 DATASHEET (Digest)

Hi-Z

Tristate Output

B5 HPOUTR

F6 TEST1

F5 TEST0

E6 PLLC

HPRVDD Headphone output right.

Input with 50k

Pulldown

IOVDD Test pin. Please pulldown to DGND

PLLVDD The pin is to connect loop-back filter of PLL.

Input with 50k

Pulldown

Analog

E1 DVDD

A2 DVDD

E2 IOVDD

B1 IOVDD

E3 DGND

B4 DGND

C5 HPLVDD

D6 HPLGND

Power supply pin for digital.

Power supply pin for IO.

Ground pin for digital and IO.

Power supply pin for Headphone left.

Ground pin for Headphone left.

C6 HPRVDD

B6 HPRGND

E5 PLLVDD

E4 PLLGND

Power supply pin for Headphone right.

Ground pin for Headphone right.

Power supply pin for PLL.

Ground pin for PLL.

Version 1.1

8 / 20

ML2650 DATASHEET (Digest)

Electric Characteristics

Absolute Maximum Ratings

Parameter

Symbol

Condition

Rating

Unit

VDD for Digital

VDD for IO

DVDD

-0.3~2.0

IOVDD

-0.3~4.6

VDD for Headphone

VDD for PLL

HPLVDD,

HPRVDD

-0.3~4.6

PLLVDD

-0.3~4.6

Input Voltage

-0.3~IOVDD+0.3

Output Current

except Headphone output

Io1

Io2

-16~+16

-70~+70

Output Current of

Headphone output

Power dissipation

Ta=85°C

250

°C

Storage Temperature

Tstg

-65~+150

Recommended Operating Ranges

Operating Range

Parameter

Symbol

Condition

Unit

Min

1.1

Typ

Max

VDD for Digital

VDD for IO

DVDD

1.65

3.6

IOVDD

PLLVDD

1.65

2.375

1.65

-20

VDD for Headphone

VDD for PLL

PLLVDD≥IOVDD

HPLVDD,

HPRVDD

HPLVDD=HPRVDD

Operating Temperature

Top

°C

Version 1.1

9 / 20

ML2650 DATASHEET (Digest)

Appli

DC Characteristics

Parameter

Symbol

Condition

Unit

Min

Typ

Max

ed pin

H input voltage

L input voltage

H output voltage

L output voltage

VIH

VIL

VOH

VOL

IL1

DGND=0V

IOH=-135uA

IOL=135uA

0.8xIOVDD

IOVDD+0.3

-0.3

0.2xIOVDD

0.8xIOVDD

0.2xIOVDD

VI=IOVDD,

DGND

VI=DGND

VI=IOVDD

-10

∗1

∗2

μA

Input leakage current

Operating Current

-10

200

5.0 *5

IL2

μA

IDDO-DVDD

2.7 *4

IDDO-HPLVDD+

IDDO-HPRVDD

IDDO-PLLVDD

IDDO-IOVDD

IDDS-DVDD

IDDS-HPLVDD+

IDDS-HPRVDD

IDDS-IOVDD

IDDS-PLLVDD

0.9 *4

2.0 *5

0.7 *4

0.01 *4

200

1.5 *5

0.1 *5

Stanby Current

0.1

*1 Apply to SYSCLK, RESETB, D7-D0, CSB, RDB, WRB, ILE, IRQ, LRCLK, BCLK, SAIIN, MCLK pin.

*2 Apply to TEST1, TEST0 pin.

*3 Ta=25°C, SYSCLK 32.768kHz input, Playback 44.1k sampling freqency music, with no sound, no load.

*4 Process=Typical, DVDD=1.5V, HPLVDD=HPRVDD=PLLVDD=IOVDD=3.0V

*5 DVDD=1.65V, HPLVDD=HPRVDD=PLLVDD=IOVDD=3.6V

*6 Ta=25°C, Process=Typical, DVDD=1.5V, HPLVDD=HPRVDD=PLLVDD=IOVDD=3.0V

Headphone Output Characteristics

Ta=25°C, HPVDD=3.3V, Headphone amp output load=32Ω ,f=1kHz

Audio sampling frequency=48 kHz

Unit

Parameter

Condition

Min

Typ

Max

Output power

RL=32Ω

Output level = -60dB

A-weight filter

Connect LC-filter with HPOUTL and HPOUTR

Output level = BPZ

SNR

A-Weight filter

Connect LC-filter with HPOUTL and HPOUTR

Headphone Output load

Version 1.1

10 / 20

ML2650 DATASHEET (Digest)

AC Characteristics

Clock

DVDD=1.1V-1.65V, PLLVDD=2.375V-3.6V,

HPVDD=1.65V-3.6V, IOVDD=1.65V-3.6V, Ta=-20-85°C, CL=30pF

Unit

Parameter

SYSCLK frequency

Symbol

Min

Max.

32K

30M

SYSCLK rise time

SYSCLK fall time

SYSCLK high pulse width

SYSCLK low pulse width

tCH

tCL

SYSCLK

tCH

tCL

Reset

DVDD=1.1V-1.65V, PLLVDD=2.375V-3.6V,

HPVDD=1.65V-3.6V, IOVDD=1.65V-3.6V, Ta=-20-85°C, CL=30pF

Unit

Parameter

Symbol

Min

Max.

RESETB pulse width

tW_RESETB

µs

All VDD

tW_RESETB

RESETB

Version 1.1

11 / 20

ML2650 DATASHEET (Digest)

Bus Interface at Write Cycle

DVDD=1.1V-1.65V, PLLVDD=2.375V-3.6V,

HPVDD=1.65V-3.6V, IOVDD=1.65V-3.6V, Ta=-20-85°C, CL=30pF

Unit

Parameter

Symbol

Min

Max.

CSB setup time

WRB setup time

CSB hold time

WRB hold time

tSU_CSB

tSU_WRB

tH_CSB

tH_WRB

ILE setup time

ILE hold time

Data setup time

Data hold time

tSU_ILE

tH_ILE

tSU_D

tH_D

WRB low pulse width

CSB low pulse width

tWL_WRB

tWL_CSB

WRB high pulse width

CSB high pulse width

tWH_WRB

tWH_CSB

Cycle time of WRB

Cycle time of CSB

tCYC_WRB

tCYC_CSB

MHｚ

CSB

tH_CSB

tSU_CSB

ILE

tSU_ILE

tH_ILE

tSU_ILE

WRB

tWH_WRB

tWL_WRB

tCYC_WRB

D7-D0

tSU_D

tH_D

tSU_D

tH_D

WRB Control

Version 1.1

12 / 20

ML2650 DATASHEET (Digest)

WRB

tH_WRB

tSU_WRB

ILE

tSU_ILE

tH_ILE

tSU_ILE

CSB

tWH_CSB

tWL_CSB

tCYC_CSB

D7-D0

tSU_D

tH_D

tSU_D

tH_D

CSB Control

Version 1.1

13 / 20

ML2650 DATASHEET (Digest)

Bus Interface at Read Cycle

DVDD=1.1V-1.65V, PLLVDD=2.375V-3.6V,

HPVDD=1.65V-3.6V, IOVDD=1.65V-3.6V, Ta=-20-85°C, CL=30pF

Unit

Parameter

Data delay

Symbol

Min

Max.

tD_D

Data Hi-Z delay

tDZ_D

CSB

ILE

Don’t Care

RDB

tDZ_D

tD_D

tDZ_D

D7-D0

CSB Control

Note: tD_D is defined by later timing of CSB or WRB.

Note: tDZ_D is defined by earier timing of CSB or WRB.

Version 1.1

14 / 20

ML2650 DATASHEET (Digest)

Serial Audio Interface (Slave)

DVDD=1.1V-1.65V, PLLVDD=2.375V-3.6V,

HPVDD=1.65V-3.6V, IOVDD=1.65V-3.6V, Ta=-20-85°C, CL=30pF

Unit

Parameter

Symbol

Min

Max.

64fs

BCLK cycle time

SAIIN setup time

SAIIN hold time

LRCLK setup time

LRCLK hold time

tC_BCLK

tSU_SAIIN

tH_SAIIN

tSU_LRCLK

tH_LRCLK

BCLK

LRCLK

SAIIN

tC_BCLK

tH_LRCLK

tSU_LRCLK

tH_SAIIN

tSU_SAIIN

Version 1.1

15 / 20

ML2650 DATASHEET (Digest)

Serial Audio Interface (Master)

DVDD=1.1V-1.65V, PLLVDD=2.375V-3.6V,

HPVDD=1.65V-3.6V, IOVDD=1.65V-3.6V, Ta=-20-85°C, CL=30pF

Unit

Parameter

Symbol

Min

Max.

64fs

BCLK cycle time

LRCLK delay

tC_BCLK

tD_LRCLK

tSU_SAIIN

tH_SAIIN

SAIIN setup time

SAIIN hold time

BCLK

tC_BCLK

LRCLK

tD_LRCLK

SAIIN

tH_SAIIN

tSU_SAIIN

Version 1.1

16 / 20

ML2650 DATASHEET (Digest)

Power On

DVDD=1.1V-1.65V, PLLVDD=2.375V-3.6V,

HPVDD=1.65V-3.6V, IOVDD=1.65V-3.6V, Ta=-20-85°C, CL=30pF

Unit

Parameter

Power On VDD width

Symbol

Min

Max.

tW_PON

RESETB pulse width

tW_RESETB

tH_RCSB

CSB hold from RESETB

IOVDD

tW_PON

DVDD

HPLVDD

HPRVDD

PLLVDD

tW_RESETB

RESETB

CSB

tH_RCSB

Power Off

DVDD=1.1V-1.65V, PLLVDD=2.375V-3.6V,

HPVDD=1.65V-3.6V, IOVDD=1.65V-3.6V, Ta=-20-85°C, CL=30pF

Unit

Parameter

Symbol

Min

Max.

Power Off VDD width

tW_POFF

DVDD

IOVDD

HPLVDD

HPRVDD

PLLVDD

tW_POFF

Version 1.1

17 / 20

ML2650 DATASHEET (Digest)

Sleep

DVDD=1.1V-1.65V, PLLVDD=2.375V-3.6V,

HPVDD=1.65V-3.6V, IOVDD=1.65V-3.6V, Ta=-20-85°C, CL=30pF

Unit

Parameter

DVDD OFF Delay

Symbol

Min

Max.

tD_DVOF

tD_HPOF

HPLVDD, HPRVDD OFF Delay

IOVDD

PLLVDD

Const ON

RESETB

DVDD

tD_DVOF

HPLVDD

HPRVDD

tD_HPOF

Wakeup

DVDD=1.1V-1.65V, PLLVDD=2.375V-3.6V,

HPVDD=1.65V-3.6V, IOVDD=1.65V-3.6V, Ta=-20-85°C, CL=30pF

Unit

Parameter

DVDD ON Delay

HPLVDD, HPRVDD ON Delay

Symbol

Min

Max.

tD_DVON

tD_HPON

Version 1.1

18 / 20

ML2650 DATASHEET (Digest)

IOVDD

PLLVDD

Const ON

RESETB

DVDD

tD_DVON

HPLVDD

HPRVDD

tD_HPON

Version 1.1

19 / 20

ML2650 DATASHEET (Digest)

NOTICE

1. The information contained herein can change without notice owing to product and/or technical improvements.

Before using the product, please make sure that the information being referred to is up-to-date.

2. The outline of action and examples for application circuits described herein have been chosen as an

explanation for the standard action and performance of the product. When planning to use the product, please

ensure that the external conditions are reflected in the actual circuit, assembly, and program designs.

3. When designing your product, please use our product below the specified maximum ratings and within the

specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating

temperature.

4. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation

resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or

unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the

specified maximum ratings or operation outside the specified operating range.

5. Neither indemnity against nor license of a third party’s industrial and intellectual property right, etc. is

granted by us in connection with the use of the product and/or the information and drawings contained herein.

No responsibility is assumed by us for any infringement of a third party’s right which may result from the

use thereof.

6. The products listed in this document are intended for use in general electronics equipment for commercial

applications (e.g., office automation, communication equipment, measurement equipment, consumer

electronics, etc.). These products are not authorized for use in any system or application that requires special

or enhanced quality and reliability characteristics nor in any system or application where the failure of such

system or application may result in the loss or damage of property, or death or injury to humans.

Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace

equipment, nuclear power control, medical equipment, and life-support systems.

7. Certain products in this document may need government approval before they can be exported to particular

countries. The purchaser assumes the responsibility of determining the legality of export of these products

and will take appropriate and necessary steps at their own expense for these.

8. No part of the contents contained herein may be reprinted or reproduced without our prior permission.

Version 1.1

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ML26188+(IMI6080-0相关文章

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首天国际（深圳）科技有限公司服务专线: 0755-82807802/82807803 在线联系:

QQ：528164397 复制

QQ：1318502189 复制

北京元坤伟业科技有限公司服务专线: 010-62104931621064316210489162104791 在线联系:

QQ：857273081 复制

QQ：1594462451 复制

深圳市中利达电子科技有限公司服务专线: 0755-13686833545 在线联系:

QQ：1902134819 复制

QQ：2881689472 复制

柒号芯城电子商务（深圳）有限公司服务专线: 18922803401 在线联系:

QQ：2881677436 复制

QQ：2881620402 复制

深圳市芯福林电子有限公司服务专线: 13418564337 在线联系:

QQ：2881495808 复制

QQ：308365177 复制

ML2650产品参数

型号:	ML2650
生命周期：	Contact Manufacturer
IHS 制造商：	OKI ELECTRIC INDUSTRY CO LTD
零件包装代码：	BGA
包装说明：	BGA,
针数：	36
Reach Compliance Code：	unknown
ECCN代码：	EAR99
HTS代码：	8542.33.00.01
风险等级：	5.77
商用集成电路类型：	AUDIO AMPLIFIER
JESD-30 代码：	R-PBGA-B36
信道数量：	2
功能数量：	1
端子数量：	36
最高工作温度：	85 °C
最低工作温度：	-20 °C
标称输出功率：	0.01 W
封装主体材料：	PLASTIC/EPOXY
封装代码：	BGA
封装形状：	RECTANGULAR
封装形式：	GRID ARRAY
认证状态：	Not Qualified
最大供电电压 (Vsup)：	1.65 V
最小供电电压 (Vsup)：	1.1 V
表面贴装：	YES
温度等级：	OTHER
端子形式：	BALL
端子位置：	BOTTOM
Base Number Matches：	1

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