MSM6789A各脚功能电路原理芯片引脚定义引脚图及功能IC贸易商-中国IC网-芯三七

¡ Semiconductor

MSM6789A/6789L

¡ Semiconductor

MSM6789A/6789L

SBC Solid-State Recorder IC

GENERAL DESCRIPTION

TheMSM6789A/6789L,animprovedversionofMSM6788,isasolid-staterecorderdevelopedusing

the Sub Band Coding (SBC) method.

Just like MSM6788, the MSM6789A/6789L has a stand-alone mode and a microcontroller interface

mode. In the stand-alone mode, record/playback conditions can be selected from pins and the

MSM6789A/6789Lcanbecontrolledbyasimpledrivetiming.Inthemicrocontrollerinterfacemode,

record/playback can be controlled by commands from the microcontroller, and more functions are

available than in the stand-alone mode.

The MSM6789A/6789L can directly drive serial voice ROM as external memory as well as serial

register or general-purpose DRAM* (1-bit ¥ or 4-bit ¥ type selectable) as external memories, which

allows a recording and playback circuit with fixed messages to be built easily. The method from

microcontroller is the same as the MSM6788.

* Only for MSM6789A

• Difference between MSM6788 and MSM6789A

MSM6788

MSM6789A

Available

Yes

General DRAM

Unavailable

Unvoiced-part elimination function No

PCM playback

• SBC method:

No

Yes

The SBC method divides voice frequencies into five bands and codes the component for each of

the bands separately, as shown below.

@fs=8.0 Hz

Gain

ch 1

ch 2

ch 3

ch 4

ch 5

kHz

0

1

2

3

f (Hz)

Note: Thisdatasheetexplainsastand-alonemodeandamicrocontrollerinterfacemode,separately.

MSM6789A/6789L

¡ Semiconductor

• Difference between MSM6789A and MSM6789L

Parameter

Operating voltage

External memory

MSM6789A

MSM6789L

3.0 to 3.6 V

4.5 to 5.5 V

General-purpose DRAM, 32 Mbits (max.)

1-Mbit DRAM (MSM514256B, MSM511000B)

4-Mbit DRAM (MSM514400C, MSM514100C)

16-Mbit DRAM (MSM511740CA, MSM5116100A)

ARAM*, 32 Mbits (max.)

16 Mbits (max.)

4 Mbits (MSM66V84B)

Serial register, 32 Mbits (max.)

4 Mbits (MSM6684B)

8 Mbits (MSM6685)

*

Use ARAM which has no failed bits in its first 64 Kbits.

¡ Semiconductor

STAND-ALONE MODE

FEATURES

MSM6789A/6789L

• SBC method

• Built-in 12-bit AD converter

• Built-in 12-bit DA converter

• Built-in microphone amplifier

• Built-in low-pass filter

Attenuation characteristics –40 dB/oct

• External memories

MSM6789A (5 V version)

General-purpose DRAM, 32 Mbits maximum (for variable messages)

1-Mbit DRAM : Can be directly driven (MSM514256B, MSM511000B)

4-Mbit DRAM : Can be directly driven (MSM514400C, MSM514100C)

16-Mbit DRAM: Can be directly driven (MSM5117400A, MSM5116100A)

ARAM, 32 Mbits maximum (for variable messages)

Note :Use the first 64 Kbits with no failed bits for the ARAM.

Serial register, 32 Mbits maximum (for variable messages)

4-Mbit serial register : Can be directly driven (MSM6684B)

8-Mbit serial register : Can be directly driven (MSM6685)

MSM6789L (3.3 V version)

Serial register, 16 Mbits maximum (for variable messages)

4-Mbit serial resister: Can be directly driven (MSM66V84B)

MSM6789A (5 V version) and MSM6789L (3.3 V version)

Serial voice ROM, 4 Mbits maximum (for fixed messages)

1-Mbit serial voice ROM : Can be directly driven (MSM6595A)

2-Mbit serial voice ROM : Can be directly driven (MSM6596A)

3-Mbit serial voice ROM : Can be directly driven (MSM6597A)

• Bit rate

10.0, 12.6, 16.0 kbps (at 8 kHz sampling freq.)

7.5, 9.5, 12.0 kbps (at 6 kHz sampling freq.)

• Maximum recording time (when one 8-Mbit serial register is connected)

13.8 minutes (for 10.0 kbps SBC)

11.0 minutes (for 12.6 kbps SBC)

8.6 minutes (for 16.0 kbps SBC)

• Number of phrases

18.4 minutes (for 7.5 kbps SBC)

14.6 minutes (for 9.5 kbps SBC)

11.5 minutes (for 12.0 kbps SBC)

63 phrases for variable messages

63 phrases for fixed messages

• Standard linear PCM playback or OKI nonlinear PCM playback can be selected.

• Voice triggered starting function (voice detect level can be set)

• Unvoiced-part elimination function (voice detect level can be set)

• Pausing function

• Master clock frequency:

• Power supply voltage:

6.0 MHz to 8.192 MHz

MSM6789A : Single 5 V power supply

MSM6789L : Single 3.3 V power supply

• Package options:

MSM6789A : 100-pin plastic QFP (QFP100-P-1420-BK) (Product name: MSM6789AGS-BK)

MSM6789L : 100-pin plastic QFP (QFP100-P-1420-BK) (Product name: MSM6789LGS-BK)

MSM6789A/6789L

¡ Semiconductor

BLOCK DIAGRAM (for MSM6789A (5 V Version))

Memory Controller

¡ Semiconductor

MSM6789A/6789L

PIN CONFIGURATION (TOP VIEW) (for MSM6789A (5 V Version))

1

2

3

4

80

79

78

77

A10

A9

A8

A7

A6

NC

A0 (SADY)

A1 (SADX)

A2 (TAS)

A3 (SAS)

A4 (RWCK)

WE

5

6

7

8

9

76

75

74

73

72

71

A5

NC

TMD4

TMD3

TMD2

DI/O

MON

NAR

10

11

70 VD3

69 VD2

TMD1

TMD0 12

VD1

68

TDT7

TDT6

13

14

VD0

DRAM/SR

REC/PLAY

67

66

65

TDT5 15

TDT4

16

[DQ4] TDT3 17

[DQ3] TDT2

64 ST

SP

18

63

RESET

TEST

PDWN

MSEL2

MSEL1

[DQ2] TDT1 19

[DQ1] TDT0 20

SYNC 21

62

61

60

59

58

TST

22

TCK 23

CA0

CA1

CA2

CA3

24

25

26

27

57 RSEL2

56

RSEL1

55

DGND

54

53

52

51

AGND

MIN

MOUT

LIN

NC 28

29

CA4

CA5 30

100-Pin Plastic QFP

(

[

) : Pins for connecting serial voice ROM

] : Pins for connecting 4-bit ¥ type DRAM

NC : No-connection pin

MSM6789A/6789L

¡ Semiconductor

PIN DESCRIPTIONS (for MSM6789A (5 V Version))

Symbol Type

Description

Digital power supply. Insert a bypass capacitor of 0.1 mF or more between this

pin and the DGND pin.

90

DV_DD

AV_DD

—

Analog power supply. Insert a bypass capacitor of 0.1 mF or more between this

pin and the AGND pin.

47

40, 55

54

DGND

AGND

SG, SGC

MIN

—

Digital ground.

Analog ground.

48, 49

53

Output for analog circuit reference voltage (signal ground).

Inverting input of the built-in OP amplifier. The non-inverting input pin is

internally connected to SG (signal ground).

I

51

LIN

52

MOUT

LOUT

O

Output of the built-in OP amplifier for MIN and LIN.

50

Connected to the LOUT pin in the recording mode and to the DA converter

output in the playback mode. This pin connects the built-in LPF input (FIN pin).

Input of the built-in LPF.

46

AMON

45

43

42

FIN

I

O

I

FOUT

ADIN

Output of the built-in LPF. This pin connects the AD converter input (ADIN pin).

Input of the built-in 12-bit AD converter.

Output of the built-in LPF. This pin outputs playback waveforms and connects

an external speaker drive amplifier.

44

AOUT

O

This pin selects whether memory to be connected externally is DRAM or serial register.

Low level : Serial register

66

DRAM/SR

I

High level : DRAM

This pin selects either 1-bit ¥ type DRAM or 4-bit ¥ type DRAM.

Low level : 1-bit ¥ type

88

4B/1B

I

High level : 4-bit ¥ type

These pins connect to A0 and A1 of DRAM at the time of DRAM selection. They also

connect to SAD pin of serial register and serial voice ROM at the time of serial

register selection. These pins output leading addresses of read/write.

This pin connects to A2 of DRAM at the time of DRAM selection. It also connects

to TAS pin of serial register and serial voice ROM at the time of serial register selection.

This pin is used to set serial addresses from the SADX and SADY pins into the

internal address counter of the serial register and serial voice ROM.

This pin connects to A3 of DRAM at the time of DRAM selection. It also connects

to the SAS pin of the serial register and the SASX and SASY pins of the serial voice

ROM at the time of serial register selection. Clock pin to write serial addresses.

This pin connects to A4 of DRAM at the time of DRAM selection. It also connects

to the RWCK pin of the serial register and the RDCK pin of the serial voice ROM at

the time of serial register selection. Clock pin to read data from and write data into

the serial register.

79

78

A0 (SADY)

A1 (SADX)

O

77

76

A2 (TAS)

A3 (SAS)

O

75

A4 (RWCK)

O

This pin connects to pins A5-A10 of DRAM at the time of DRAM selection.

This pin outputs addresses of read/write.

1-6

A10-A5

¡ Semiconductor

MSM6789A/6789L

PIN DESCRIPTIONS (for MSM6789A (5 V Version)) (Continued)

Symbol

Description

Type

Write Enable. This pin connects to the WE pin of the serial register and DRAM.

This pin selects either read or write mode.

74

WE

O

Data I/O. This pin connects to the DIN and DOUT pins of the serial register and

DRAM. This pin outputs write data and inputs read data.

73

DI/O

I/O

85

89

DROM

I

Data ROM. This pin connects to the DOUT pin of the serial voice ROM.

This is a row address strobe pin of DRAM at the time of DRAM selection.

These are the column address strobe pins of DRAM at the time of DRAM selection.

CAS7, an addresss output pin, is connected to pin A11 of DRAM at the time 16-Mbit

DRAM selection.

RAS

O

CAS0-

CAS7

93-100

O

81

82

83

84

58

59

CS1

CS2

Chip Select. These pins connect to CS pin of the serial register and the CS (CS1,

CS2, CS3) pins of the serial voice ROM.

CS3

CS4

MSEL1

MSEL2

I

These pins select the capacity of the memory to be connected externally.

These pins select the number of DRAMs and serial registers to be connected externallly.

• When DRAM is selected (DRAM/SR = High level)

MSEL2

MSEL1

RSEL2

RSEL1

Memory capacity

1M ¥ 4

L

H

L

4M ¥ 1

L

H

L

1M ¥ 8

L

H

L

1M ¥ 4 + 4M ¥ 1

4M ¥ 2

L

H

L

H

L

4M ¥ 2

56

57

RSEL1

RSEL2

I

L

H

L

4M ¥ 3

L

H

L

4M ¥ 3

H

4M ¥ 4

L

H

L

16M ¥ 1

4M ¥ 6

L

H

L

H

L

4M ¥ 6

H

4M ¥ 8

L

H

L

4M ¥ 8

H

16M ¥ 2

H

MSM6789A/6789L

¡ Semiconductor

PIN DESCRIPTIONS (for MSM6789A (5 V Version)) (Continued)

Symbol Type

Description

• When serial register is selected (DRAM/SR = Low level)

MSEL2

MSEL1

RSEL2

RSEL1

Memory capacity

4M ¥ 1

L

H

L

4M ¥ 2

L

H

L

4M ¥ 3

56

57

RSEL1

RSEL2

I

L

H

L

4M ¥ 4

H

8M ¥ 1

L

H

L

8M ¥ 2

H

8M ¥ 3

H

8M ¥ 4

This pin selects CAS-before-RAS refresh period of DRAM at the time of

power down when DRAM is selected.

87

LOWPWR

I

Low level : 15 µs max.

High level : 125 µs max.

Mode Selection.

34

62

MCUM

RESET

I

Low level : Stand-alone mode

High level : Microcontroller interface mode

A high input level causes the MSM6789A to be initialized and to go into the power

down state.

Power Down. When a low level is input, the MSM6789A goes to the power down

state. Unlike the RESET pin, this pin does not force the MSM6789A to be reset.

When a Low level is applied to this pin during recording operation, the MSM6789A

is halted, and will be maintained in the power down state while PDWN is low level.

After this pin is restored to a high level, postprocessing for recording will be performed.

Oscillator Connection. When an external clock is used, input the clock through

this pin. During the power down state, this pin must be set to the ground level.

Oscillator Connection. When an external clock is used, this pin must be left

open.

60

PDWN

I

91

92

XT

I

O

I

XT

37

61

TEST

MSM6789A Test. Input a low level to the TEST pin and a high level to the TEST pin.

TEST

9-12

13-20

21

TMD3-TMD0

TDT7-TDT0

SYNC

I/O MSM6789A Test. This pin must be left open.

TDT3-TDT0

[DQ4]-[DQ1]

TST

Connect these pins to DQ1-DQ4 of DRAM at the time of 4-bit ¥ type DRAM

17-20

I/O

selection. Otherwise these pins must be left open as they are MSM6789A test pins.

22

23

8

TCK

I

MSM6789A Test. Input a low level signal.

TMD4

¡ Semiconductor

MSM6789A/6789L

PIN DESCRIPTIONS (for MSM6789A (5 V Version)) (Continued)

Symbol Type

Description

Playback Operation. When set to low, this pin selects the record/playback

operation (only for the SBC method). When set to high, it selects the ROM playback

operation (for the SBC and PCM methods).

39

ROM

I

Recording mode or playback mode selection. This pin is invalid during

the ROM playback operation. When set to low, it selects the playback mode.

When set to high, it selects the recording mode.

65

64

REC/PLAY

Start Playback. When a low-level pulse is applied to this pin, the record/playback

or ROM playback is started.

ST

I

Stop Playback.When a low-level pulse is applied to this pin, the record/playback

or ROM playback is stopped.

SP

Playback Pause. When a low-level pulse is applied to this pin, the record/playback

or ROM operation is stopped temporarily.

32

31

PAUSE

Phrase Delection. When a low level pulse is applied to this pin, all phrase deletion

or specified phrase deletion can be performed according to the setting of pins CA0

through CA5,

DEL

I

ch00:

All phrase deletion

ch01 to ch3F: Specified phrase deletion

After power up, be sure to input a RESET signal and then delete all phrases.

After completing this procedure, start the record/playback operation.

Desired Phrase Specification.

A total of 63 phrases can be specified indepedently for the record/playback operation

and the ROM playback operation.

CA5 CA4 CA3 CA2 CA1 CA0

Phrase No.

ch00

Remarks

L

H

L

All phrase deletion

24-30 CA0-CA5

I

ch01

A total of 63 phrases can

be used for both record

/playback and ROM

H

ch02

.

H

L

ch3E

ch3F

playback operation.

H

MSM6789A/6789L

¡ Semiconductor

PIN DESCRIPTIONS (for MSM6789A (5 V Version)) (Continued)

Symbol Type

Description

Bit Rate Selection. This pin selects one of the following three types of bit rate (master

clock frequency f_OSC= 8.192 MHz). This pin is invalid during the ROM playback operation.

BR1

L

BR0

L

Bit rate

16.0 kbps

12.6 kbps

10.0 kbps

Unused

35

36

BRO

I

BR1

L

H

L

H

Transition to the Power-down State.

Low level: The MSM6789A automatically goes to the power-down state, except

when the record/playback operation is performed.

High level: The MSM6789A automatically goes to the standby state, instead of the

power-down state, except when the record/playback operation

is performed. In this case, the MSM6789A can be placed in the

power-down state by setting the RESET or PDWN pin to a high level.

If an external circuit is used for the built-in LPF, this standby mode

must be selected by applying a high level to the PDMD pin.

These pins set the voice detect level for the voice triggered starting and unvoiced-part

elimination.

33

PDMD^*1

I

67-70 VD0-VD3

I

This pin selects the voice triggered starting or the unvoiced-part elimination.

Voice triggered starting: Input a High level to the VDS pin. Then set the voice

detect level with VD0 to VD3 pins.

38

VDS

Unvoiced-part elimination: Input a Low level to the VDS pin. Then set the voice

detect level with VD0 to VD3 pins.

Note: When neither the voice triggered starting nor the unvoiced-part elimination is

used, input a Low level to VD0 to VD3.

72

71

MON

NAR

O

This pin outputs a high level while the record/playback operation is being performed.

Output to indicate the enable or disable state of the operation for specifying a

phrase. When continuous ROM playback is performed, the next phrase can

be specified after the NAR pin goes to high positively.

*1 When DRAM is selected, be sure to set the PDMD pin to a High level.

¡ Semiconductor

MSM6789A/6789L

ABSOLUTE MAXIMUM RATINGS (for MSM6789A (5 V Version))

Parameter

Power supply voltage

Input voltage

Symbol

Condition

Ta=25°C

—

Rating

–0.3 to +7.0

Unit

V

DD

V

IN

–0.3 to V_DD+0.3

–55 to +150

V

Storage temperature

T

STG

°C

RECOMMENDED OPERATING CONDITIONS (for MSM6789A (5 V Version))

Parameter

Power supply voltage

Operating temperature

Master clock frequencuy

Symbol

V_DD

Condition

Range

+3.5 to +5.5^*4

0 to +70

Unit

V

DGND=AGND=0 V

T_op

—

°C

f_OSC

6.0 to 8.192

MHz

ELECTRICAL CHARACTERISTICS (for MSM6789A (5 V Version))

DC Characteristics

DV_DD=AV_DD=4.5 to 5.5 V^*4

DGND=AGND=0 V, Ta=0 to 70°C

Parameter

High input voltage

Symbol

Condition

Min.

0.8¥V_DD

—

Typ.

—

Max.

—

Unit

V

IH

—

Low input voltage

V

IL

—

0.2¥V_DD

—

V

High output voltage

Low output voltage

High input current ^*1

High input current ^*2

Low input currcent ^*1

Low input current ^*2

Low input current ^*3

Operating current consumption

V

OH

I_OH=–40 mA

V –0.3

DD

—

V

OL

I_OL=2 mA

—

0.45

10

V

I_IH1

I_IH2

I_IL1

I_IL2

I_IL3

V_IH=V_DD

—

mA

V_IH=V_DD

—

20

V_IL=GND

–10

–20

–400

—

V_IL=GND

—

20

—

V_IL=GND

–20

35

I

DD

f_OSC=8 MHz, no load

No load

mA

I_DDS1

I_DDS2

—

10

—

mA

Serial register connected

No load

Power down current

200

DRAM connected

*1 Applies to all inputs excluding the XT pin.

*2 Applies to the XT pin.

*3 Applies to the input pins with pull-up resistor (ST, SP, PAUSE, DEL) excluding the XT pin.

*4 The record/playback operation must be performed at the power supply voltage of 4.5 to 5.5 V.

The MSM6789A operates at 3.5 to 5.5 V when the serial register is backed up.

MSM6789A/6789L

¡ Semiconductor

Analog Characteristics

DV_DD=AV_DD=4.5 to 5.5 V

DGND=AGND=0 V Ta=0 to 70°C

Parameter

DA output relative error

FIN admissible input voltage range

FIN input impedance

Symbol

ΩV_DAE

Condition

Min.

—

1

Typ.

—

Max.

10

Unit

mV

V

Ω

no load

V

FIN

—

V_DD–1

—

R

FIN

—

1

—

WM

Op-map open loop gain

Op-amp input impedance

Op-amp load resistance

AOUT load resistance

G

f_IN=0 to 4kHz

40

1

—

dB

OP

R

INA

—

WM

Wk

R

OUTA

200

50

—

R

AOUT

—

FOUT load resistance

R

FOUT

—

¡ Semiconductor

MSM6789A/6789L

BLOCK DIAGRAM (for MSM6789L (3.3 V Version))

Memory Controller

MSM6789A/6789L

¡ Semiconductor

PIN CONFIGURATION (TOP VIEW) (for MSM6789L (3.3 V Version))

1

2

3

4

80

79

78

77

NC

SADY

SADX

TAS

SAS

RWCK

WE

5

6

7

8

9

76

75

74

73

72

71

NC

TMD4

TMD3

TMD2

DI/O

MON

NAR

10

11

70 VD3

69 VD2

TMD1

TMD0 12

VD1

68

TDT7

TDT6

13

14

VD0

TEST

REC/PLAY

67

66

65

TDT5 15

TDT4

16

TDT3 17

TDT2

64 ST

SP

18

63

RESET

TEST

PDWN

MSEL2

MSEL1

TDT1 19

TDT0 20

SYNC 21

TST

22

TCK 23

62

61

60

59

58

CA0

CA1

CA2

CA3

24

25

26

27

57 RSEL2

56

RSEL1

55

DGND

54

53

52

51

AGND

MIN

MOUT

LIN

NC 28

29

CA4

CA5 30

100-Pin Plastic QFP

NC : No-connection pin

¡ Semiconductor

MSM6789A/6789L

PIN DESCRIPTIONS (for MSM6789L (3.3 V Version))

Symbol Type

Description

Digital power supply. Insert a bypass capacitor of 0.1 mF or more between this

pin and the DGND pin.

90

DV_DD

AV_DD

—

Analog power supply. Insert a bypass capacitor of 0.1 mF or more between this

pin and the AGND pin.

47

40, 55

54

DGND

AGND

SG, SGC

MIN

—

Digital ground.

—

Analog ground.

48, 49

53

Output for analog circuit reference voltage (signal ground).

Inverting input of the built-in OP amplifier. The non-inverting input pin is

internally connected to SG (signal ground).

I

51

LIN

52

MOUT

LOUT

O

Output of the built-in OP amplifier for MIN and LIN.

50

Connected to the LOUT pin in the recording mode and to the DA converter

output in the playback mode. This pin connects the built-in LPF input (FIN pin).

Input of the built-in LPF.

46

AMON

O

45

43

42

FIN

I

O

I

FOUT

ADIN

Output of the built-in LPF. This pin connects the AD converter input (ADIN pin).

Input of the built-in 12-bit AD converter.

Output of the built-in LPF. This pin outputs playback waveforms and connects

an external speaker drive amplifier.

44

AOUT

O

79

78

SADY

SADX

They also connect to SAD pin of serial register and serial voice ROM. These pins

output leading addresses of read/write.

O

This pin connects to TAS pin of serial register and serial voice ROM.

This pin is used to set serial addresses from the SADX and SADY pins into the

internal address counter of the serial register and serial voice ROM.

This pin connects to the SAS pin of the serial register and the SASX and SASY pins

of the serial voice ROM. Clock pin to write serial addresses.

77

TAS

O

76

75

74

73

SAS

RWCK

WE

O

This pin connects to the RWCK pin of the serial register and the RDCK pin of the

serial voice ROM. Clock pin to read data from and write data into the serial register.

Write Enable. This pin connects to the WE pin of the serial register and DRAM.

This pin selects either read or write mode.

Data I/O. This pin connects to the DIN and DOUT pins of the serial register and

DRAM. This pin outputs write data and inputs read data.

DI/O

I/O

85

81

82

83

84

DROM

CS1

I

Data ROM. This pin connects to the DOUT pin of the serial voice ROM.

CS2

Chip Select. These pins connect to CS pin of the serial register and the CS (CS1,

CS2, CS3) pins of the serial voice ROM.

O

CS3

CS4

MSM6789A/6789L

¡ Semiconductor

PIN DESCRIPTIONS (for MSM6789L (3.3 V Version)) (Continued)

58

Symbol

MSEL1

Description

Type

I

These pins select the capacity of the memory to be connected externally.

These pins select the number of and serial registers to be connected externallly.

59

MSEL2

MSEL1

RSEL2

RSEL1

Memory capacity

4M ¥ 1

L

H

L

56

57

RSEL1

RSEL2

I

4M ¥ 2

H

4M ¥ 3

H

4M ¥ 4

Mode Selection.

34

62

MCUM

RESET

I

Low level : Stand-alone mode

High level : Microcontroller interface mode

A high input level causes the MSM6789L to be initialized and to go into the power

down state.

Power Down. When a low level is input, the MSM6789L goes to the power down

state. Unlike the RESET pin, this pin does not force the MSM6789L to be reset.

When a Low level is applied to this pin during recording operation, the MSM6789L

is halted, and will be maintained in the power down state while PDWN is low level.

After this pin is restored to a high level, postprocessing for recording will be performed.

Oscillator Connection. When an external clock is used, input the clock through

this pin. During the power down state, this pin must be set to the ground level.

Oscillator Connection. When an external clock is used, this pin must be left

open.

60

PDWN

I

91

92

XT

I

O

I

XT

37

61

TEST

MSM6789L Test. Input a low level to the TEST pin and a high level to the TEST pin.

TEST

9-12

13-20

21

TMD3-TMD0

TDT7-TDT0

SYNC

I/O MSM6789L Test. This pin must be left open.

17-20 TDT3-TDT0 I/O These pins must be left open as they are MSM6789L test pins.

22

23

8

TST

TCK

I

MSM6789L Test. Input a low level signal.

TMD4

¡ Semiconductor

MSM6789A/6789L

PIN DESCRIPTIONS (for MSM6789L (3.3 V Version)) (Continued)

Symbol Type

Description

Playback Operation. When set to low, this pin selects the record/playback

operation (only for the SBC method). When set to high, it selects the ROM playback

operation (for the SBC and PCM methods).

39

ROM

I

Recording mode or playback mode selection. This pin is invalid during

the ROM playback operation. When set to low, it selects the playback mode.

When set to high, it selects the recording mode.

65

REC/PLAY

Start Playback. When a low-level pulse is applied to this pin, the record/playback

or ROM playback is started.

64

63

32

ST

I

Stop Playback.When a low-level pulse is applied to this pin, the record/playback

or ROM playback is stopped.

SP

Playback Pause. When a low-level pulse is applied to this pin, the record/playback

or ROM operation is stopped temporarily.

PAUSE

Phrase Delection. When a low level pulse is applied to this pin, all phrase deletion

or specified phrase deletion can be performed according to the setting of pins CA0

through CA5,

31

DEL

I

ch00:

All phrase deletion

ch01 to ch3F: Specified phrase deletion

After power up, be sure to input a RESET signal and then delete all phrases.

After completing this procedure, start the record/playback operation.

Desired Phrase Specification.

A total of 63 phrases can be specified indepedently for the record/playback operation

and the ROM playback operation.

CA5 CA4 CA3 CA2 CA1 CA0

Phrase No.

ch00

Remarks

L

H

L

All phrase deletion

24-30 CA0-CA5

I

ch01

A total of 63 phrases can

be used for both record

/playback and ROM

H

ch02

.

H

L

ch3E

ch3F

playback operation.

H

MSM6789A/6789L

¡ Semiconductor

PIN DESCRIPTIONS (for MSM6789L (3.3 V Version)) (Continued)

Symbol Type

Description

Bit Rate Selection. This pin selects one of the following three types of bit rate (master

clock frequency f_OSC= 8.192 MHz). This pin is invalid during the ROM playback operation.

BR1

L

BR0

L

Bit rate

16.0 kbps

12.6 kbps

10.0 kbps

Unused

35

36

BRO

I

BR1

L

H

L

H

Transition to the Power-down State.

Low level: The MSM6789L automatically goes to the power-down state, except

when the record/playback operation is performed.

High level: The MSM6789L automatically goes to the standby state, instead of the

power-down state, except when the record/playback operation

is performed. In this case, the MSM6789L can be placed in the

power-down state by setting the RESET or PDWN pin to a high level.

If an external circuit is used for the built-in LPF, this standby mode

must be selected by applying a high level to the PDMD pin.

These pins set the voice detect level for the voice triggered starting and unvoiced-part

elimination.

33

PDMD^*1

I

67-70 VD0-VD3

I

This pin selects the voice triggered starting or the unvoiced-part elimination.

Voice triggered starting: Input a High level to the VDS pin. Then set the voice

detect level with VD0 to VD3 pins.

38

VDS

Unvoiced-part elimination: Input a Low level to the VDS pin. Then set the voice

detect level with VD0 to VD3 pins.

Note: When neither the voice triggered starting nor the unvoiced-part elimination is

used, input a Low level to VD0 to VD3.

72

71

MON

NAR

O

This pin outputs a high level while the record/playback operation is being performed.

Output to indicate the enable or disable state of the operation for specifying a

phrase. When continuous ROM playback is performed, the next phrase can

be specified after the NAR pin goes to high positively.

*1 When DRAM is selected, be sure to set the PDMD pin to a High level.

¡ Semiconductor

MSM6789A/6789L

ABSOLUTE MAXIMUM RATINGS (for MSM6789L (3.3 V Version))

Parameter

Power supply voltage

Input voltage

Symbol

V_DD

Condition

Ta=25°C

—

Rating

Unit

V

–0.3 to +7.0

–0.3 to V_DD+0.3

–55 to +150

V_IN

V

Storage temperature

T_STG

°C

RECOMMENDED OPERATING CONDITIONS (for MSM6789L (3.3 V Version))

Parameter

Power supply voltage

Operating temperature

Master clock frequencuy

Symbol

V_DD

Condition

Range

+3.0 to +3.6

0 to +70

Unit

V

DGND=AGND=0 V

T_op

—

°C

f_OSC

6.0 to 8.192

MHz

ELECTRICAL CHARACTERISTICS (for MSM6789L (3.3 V Version))

DC Characteristics

DV_DD=AV_DD=3.0 to 3.6 V

DGND=AGND=0 V, Ta=0 to 70°C

Parameter

High input voltage

Symbol

Condition

Min.

0.85¥V_DD

—

Typ.

—

Max.

—

Unit

V

IH

—

Low input voltage

V

IL

—

0.15¥V_DD

—

V

High output voltage

V

OH

I_OH=–40 mA

V –0.3

DD

—

V

Low output voltage

V

I_OL=2 mA

—

0.45

10

V

OL

High input current ^*1

High input current ^*2

Low input currcent ^*1

Low input current ^*2

Low input current ^*3

Operating current consumption

I_IH1

I_IH2

I_IL1

I_IL2

I_IL3

V_IH=V_DD

—

mA

V_IH=V_DD

—

20

V_IL=GND

–10

–20

–400

—

V_IL=GND

—

20

—

V_IL=GND

–20

35

I

DD

f_OSC=8 MHz, no load

No load

mA

I_DDS1

I_DDS2

—

10

—

mA

Serial register connected

No load

Power down current

200

DRAM connected

*1 Applies to all inputs excluding the XT pin.

*2 Applies to the XT pin.

*3 Applies to the input pins with pull-up resistor (ST, SP, PAUSE, DEL) excluding the XT pin.

MSM6789A/6789L

¡ Semiconductor

Analog Characteristics

DV_DD=AV_DD=3.0 to 3.6 V

DGND=AGND=0 V Ta=0 to 70°C

Parameter

DA output relative error

FIN admissible input voltage range

FIN input impedance

Symbol

Condition

Min.

—

Typ.

—

Max.

20

Unit

mV

V

ΩV_DAE

Ω

no load

V_FIN

—

1

—

V_DD–1

—

R_FIN

G_OP

—

1

—

MW

dB

Op-map open loop gain

Op-amp input impedance

Op-amp load resistance

AOUT load resistance

f_IN=0 to 4kHz

40

—

R_INA

—

1

—

MW

kW

R_OUTA

R_AOUT

R_FOUT

400

100

—

FOUT load resistance

—

¡ Semiconductor

MSM6789A/6789L

APPLICATION CIRCUITS (for MSM6789A (5 V version))

This is an application circuit example when the MSM6789A is used in stand-alone mode with four

8-Mbit serial registers and two 2-Mbit serial voice ROMs.

MSM6596A-XXX

2M Serial Voice ROM

MSM6596A-XXX

MSM6685

8M Serial Register MSM6685

RECORDER IC

MSM6789A

MSM6789A/6789L

¡ Semiconductor

APPLICATION CIRCUITS (for MSM6789A (5 V version)) (Continued)

This is an application circuit example when the MSM6789A is used in stand-alone mode with four

4-Mbit DRAMs (1-bit ¥ type) and two 2-Mbit serial voice ROMs.

MSM6596A-XXX

2M Serial Voice ROM

MSM6596A-XXX

MSM514100C

4-Mbit DRAM MSM514100C

RECORDER IC MSM6789A

¡ Semiconductor

MSM6789A/6789L

APPLICATION CIRCUITS (for MSM6789A (5 V version)) (Continued)

This is an application circuit example when the MSM6789A is used in stand-alone mode with one

4-Mbit DRAM, four 1-Mbit DRAMs (1-bit ¥ type) and two 2-Mbit serial voice ROMs.

MSM6596A-XXX

2M Serial Voice ROM

MSM6596A-XXX

MSM511000B

1-Mbit DRAM MSM511000B

4-Mbit DRAM MSM514100C

RECORDER IC MSM6789A

MSM6789A/6789L

¡ Semiconductor

APPLICATION CIRCUITS (for MSM6789A (5 V version)) (Continued)

This is an application circuit example when the MSM6789A is used in stand-alone mode with two

16-Mbit DRAMs (1-bit ¥ type) and two 2-Mbit serial voice ROMs.

MSM6596A-XXX

2M Serial Voice ROM

MSM6596A-XXX

MSM5116100A

16-Mbit DRAM MSM5116100A

RECORDER IC MSM6789A

¡ Semiconductor

MSM6789A/6789L

APPLICATION CIRCUITS (for MSM6789A (5 V version)) (Continued)

This is an application circuit example when the MSM6789A is used in stand-alone mode with four

4-Mbit DRAMs (4-bit ¥ type) and two 2-Mbit serial voice ROMs.

MSM6596A-XXX

2M Serial Voice ROM

MSM6596A-XXX

MSM514400C

4-Mbit DRAM MSM514400C

RECORDER IC MSM6789A

MSM6789A/6789L

¡ Semiconductor

APPLICATION CIRCUITS (for MSM6789A (5 V version)) (Continued)

This is an application circuit example when the MSM6789A is used in stand-alone mode with one

4-Mbit DRAM, four 1-Mbit DRAMs (4-bit ¥ type), and two 2-Mbit serial voice ROMs.

MSM6596A-XXX

2M Serial Voice ROM

MSM6596A-XXX

MSM514256B

1-Mbit DRAM MSM514256B

4-Mbit DRAM MSM514400C

RECORDER IC MSM6789A

¡ Semiconductor

MSM6789A/6789L

APPLICATION CIRCUITS (for MSM6789A (5 V version)) (Continued)

This is an application circuit example when the MSM6789A is used in stand-alone mode with two

16-Mbit DRAMs (4-bit ¥ type) and two 2-Mbit serial voice ROMs.

MSM6596A-XXX

2M Serial Voice ROM

MSM6596A-XXX

MSM5117400A

16-Mbit DRAM MSM5117400A

RECORDER IC MSM6789A

MSM6789A/6789L

¡ Semiconductor

APPLICATION CIRCUITS (for MSM6789L (3.3 V Version))

This is an application circuit example when the MSM6789L is used in stand-alone mode with four

4-Mbit serial registers and two 2-Mbit serial voice ROMs.

MSM6596A-XXX

2M Serial Voice ROM

MSM6596A-XXX

MSM66V84B

4M Serial Register MSM66V84B

RECORDER IC

MSM6789L

¡ Semiconductor

MSM6789A/6789L

MICROCONTROLLER INTERFACE MODE

FEATURES

• SBC method

• Built-in 12-bit AD converter

• Built-in 12-bit DA converter

• Built-in microphone amplifier

• Built-in low-pass filter

Attenuation characteristics –40 dB/oct

• External memories

MSM6789A (5 V version)

General-purpose DRAM, 32 Mbits maximum (for variable messages)

1-Mbit DRAM : Can be directly driven (MSM514256B, MSM511000B)

4-Mbit DRAM : Can be directly driven (MSM514400C, MSM514100C)

16-Mbit DRAM : Can be directly driven (MSM5117400A, MSM5116100A)

ARAM, 32 Mbits maximum (for variable messages)

Note: Use the first 64 Kbits with no failed bits for the ARAM.

Serial register, 32 Mbits maximum (for variable messages)

4-Mbit serial register : Can be directly driven (MSM6684B)

8-Mbit serial register : Can be directly driven (MSM6685)

MSM6789L (3.3 V version)

Serial register, 16 Mbits maximum (for variable messages)

4-Mbit serial register: Can be directly driven (MSM66V84B)

MSM6789A (5 V version) and MSM6789L (3.3 V version)

Serial voice ROM, 4 Mbits maximum (for fixed messages)

1-Mbit serial voice ROM : Can be directly driven (MSM6595A)

2-Mbit serial voice ROM : Can be directly driven (MSM6596A)

3-Mbit serial voice ROM : Can be directly driven (MSM6597A)

• Bit rate

10.0, 12.6, 16.0 kbps (at 8 kHz sampling freq.)

7.5, 9.5, 12.0 kbps (at 6 kHz sampling freq.)

• Maximum recording time (when one 8-Mbit serial register is connected)

13.8 minutes (for 10.0 kbps SBC)

11.0 minutes (for 12.6 kbps SBC)

8.6 minutes (for 16.0 kbps SBC)

• Number of phrases

18.4 minutes (for 7.5 kbps SBC)

14.6 minutes (for 9.5 kbps SBC)

11.5 minutes (for 12.0 kbps SBC)

63 phrases for variable messages

255 phrases for fixed messages

• Standard linear PCM playback or OKI nonlinear PCM playback can be selected.

• Voice triggered starting function (voice detect level can be set)

• Uuvoiced-part elimination function (voice detect level can be set)

• Pausing function

• Master clock frequency:

• Power supply voltage:

6.0 MHz to 8.192 MHz

MSM6789A: Single 5 V power supply

MSM6789L: Single 3.3 V power supply

• Package options:

MSM6789A: 100-pin plastic QFP (QFP100-P-1420-BK) (Product name: MSM6789AGS-BK)

MSM6789L: 100-pin plastic QFP (QFP100-P-1420-BK) (Product name: MSM6789LGS-BK)

MSM6789A/6789L

¡ Semiconductor

BLOCK DIAGRAM (for MSM6789A (5 V Version))

Memory Controller

¡ Semiconductor

MSM6789A/6789L

PIN CONFIGURATION (TOP VIEW) (for MSM6789A (5 V Version))

1

2

3

4

80

79

78

77

A10

A9

A8

A7

A6

A0 (SADY)

A1 (SADX)

A2 (TAS)

A3 (SAS)

A4 (RWCK)

WE

5

6

7

8

9

76

75

74

73

72

71

A5

NC

TMD4

TMD3

TMD2

DI/O

MON

NAR

10

11

70 TEST

69 TEST

TMD1

TMD0 12

TEST

68

TDT7

TDT6

13

14

TEST

DRAM/SR

CE

67

66

65

TDT5 15

TDT4

16

[DQ4] TDT3 17

[DQ3] TDT2

64 RD

WR

18

63

RESET

TEST

PDWN

MSEL2

MSEL1

[DQ2] TDT1 19

[DQ1] TDT0 20

SYNC 21

62

61

60

59

58

TST

22

TCK 23

D0

D1

D2

D3

24

25

26

27

57 RSEL2

56

RSEL1

55

DGND

54

53

52

51

AGND

MIN

MOUT

LIN

NC 28

29

BUSY

RPM 30

100-Pin Plastic QFP

(

[

) : Pins for connecting serial voice ROM.

] : Pins for connecting 4-bit ¥ type DRAM.

NC : No-connection pin

MSM6789A/6789L

¡ Semiconductor

PIN DESCRIPTIONS (for MSM6789A (5 V Version))

Symbol Type

Description

Digital power supply. Insert a bypass capacitor of 0.1mF or more between this

pin and the DGND pin.

90

DV_DD

AV_DD

—

Analog power supply. Insert a bypass capacitor of 0.1mF or more between this

pin and the AGND pin.

47

40, 55 DGND

54 AGND

48, 49 SG, SGC

—

Digital ground.

—

O

Analog ground.

Output for analog circuit reference voltage (signal ground).

Inverting input of the built-in OP amplifier. The non-inverting input pin is

internally connected to SG (signal ground).

53

51

52

50

MIN

I

LIN

MOUT

LOUT

O

Output of the built-in OP amplifier for MIN and LIN.

Connected to the LOUT pin in the recording mode and to the DA converter

output in the playback mode. This pin connects the built-in LPF input (FIN pin).

Input of the built-in LPF.

46

AMON

O

45

43

42

FIN

I

O

I

FOUT

ADIN

Output of the built-in LPF. This pin connects the AD converter input (ADIN pin).

Input of the built-in 12-bit AD converter.

Output of the built-in LPF. This pin outputs playback waveforms and connects

an external speaker drive amplifier.

44

AOUT

O

This pin selects whether memory to be connected externally is DRAM or serial

register.