NC7WZ32K8X原理图各脚功能电路原理芯片引脚定义引脚图及功能-中国IC网-芯三七

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产品型号NC7WZ32K8X的概述

芯片 NC7WZ32K8X 概述 NC7WZ32K8X 是由 Nexperia 公司生产的一款高速 CMOS 四输入 NAND 门。其设计素有优良的性能，适用于各种数字电路和逻辑应用。与传统的 TTL 门电路相比，NC7WZ32K8X 在速度、功耗和电气信号的兼容性方面表现更优，广泛应用于计算机、通讯设备及其他数字系统中。此芯片采用了小型化封装，促进了高密度电路设计，并且满足了当今电子产品对集成电路小型化和低功耗的需求。NC7WZ32K8X 支持广泛的电源电压范围，常规应用中一般工作在 2.7V 至 3.6V 之间，表现出较好的电气性能和温度稳定性。该芯片主要由四个 NAND 门单元组成，能够在同一芯片上实现多个功能，使用简便且适用范围广。芯片详细参数以下为 NC7WZ32K8X 的详细参数信息： | 参数 | 描述 ...

产品型号NC7WZ32K8X的Datasheet PDF文件预览

April 2000

Revised June 2003

NC7WZ32

TinyLogic UHS Dual 2-Input OR Gate

General Description

Features

The NC7WZ32 is a dual 2-Input OR Gate from Fairchild’s

Ultra High Speed Series of TinyLogic . The device is fabri-

cated with advanced CMOS technology to achieve ultra

high speed with high output drive while maintaining low

static power dissipation over a very broad V_CCoperating

■ Space saving US8 surface mount package

■ MicroPak leadless package

■ Ultra high speed t_PD2.4 ns Typ into 50 pF at 5V V_CC

■ High output drive ±24 mA at 3V V_CC

range. The device is specified to operate over the 1.65V to

5.5V V_CCrange. The inputs and output are high impedance

■ Broad V_CCoperating range 1.65V to 5.5V

■ Matches the performance of LCX when operated at

3.3V V_CC

when V_CCis 0V. Inputs tolerate voltages up to 7V indepen-

dent of V_CCoperating voltage.

■ Power down high impedance inputs/output

■ Overvoltage tolerant inputs facilitate 5V to 3V translation

■ Patented noise/EMI reduction circuitry implemented

Ordering Code:

Product

Order

Package Code

Number Top Mark

Package Description

Supplied As

Number

NC7WZ32K8X MAB08A

NC7WZ32L8X MAC08A

WZ32

8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel

8-Lead MicroPak, 1.6 mm Wide

5k Units on Tape and Reel

Logic Symbol

Connection Diagrams

IEEE/IEC

Pin Descriptions

(Top View)

Pin One Orientation Diagram

Pin Names

A_n, B_n

Y_n

Description

Inputs

Output

AAA represents Product Code Top Mark - see ordering code

Function Table

Note: Orientation of Top Mark determines Pin One location. Read the top

product code mark left to right, Pin One is the lower left pin (see diagram).

Y = A + B

Input

Output

Pad Assignments for MicroPak

H = HIGH Logic Level

L = LOW Logic Level

(Top Thru View)

TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.

MIcroPak is a trademark of Fairchild Semiconductor Corporation.

DS500270

www.fairchildsemi.com

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 2)}

Supply Voltage (V_CC

DC Input Voltage (V_IN

DC Output Voltage (V_OUT

)

−0.5Vto +7V

−0.5V to +7V

)

Supply Voltage Operating (V_CC

Supply Voltage Data Retention (V_CC

Input Voltage (V_IN

Output Voltage (V_OUT

)

1.65V to 5.5

1.5V to 5.5V

0V to 5.5V

)

DC Input Diode Current (I_IK

)

@V_IN< −0.5V

−50 mA

)

0V to V_CC

DC Output Diode Current (I_OK

)

Operating Temperature (T_A)

Input Rise and Fall Time (t_r, t_f)

−40°C to +85°C

@V_OUT< −0.5V

−50 mA

±50 mA

DC Output Current (I_OUT

DC V_CC/GND Current (I_CC/I_GND

Storage Temperature (T_STG

)

_CC= 1.80V ± 0.15V, 2.5V ± 0.2V 0 ns/V to 20 ns/V

)

±100 mA

_CC= 3.3V ± 0.3V

_CC= 5.0V ± 0.5V

0 ns/V to 10 ns/V

0 ns/V to 5 ns/V

250°C/W

)

−65°C to +150°C

150°C

Junction Temperature under Bias (T_J)

Junction Lead Temperature (T_L);

Soldering, 10 seconds

Thermal Resistance (θ_JA)

260°C

Note 1: Absolute Maximum Ratings are DC values beyond which the

device may be damaged or have its useful life impaired. The datasheet

specifications should be met, without exception, to ensure that the system

design is reliable over its power supply, temperature, and output/input load-

ing variables. Fairchild does not recommend operation outside datasheet

specifications.

Power Dissipation (P_D) @ +85°C

250 mW

Note 2: Unused inputs must be held HIGH or LOW. They may not float.

DC Electrical Characteristics

V_CC

_A= +25°C

T_A= −40°C to +85°C

Symbol

V_IH

Parameter

Units

Conditions

(V)

Min

Typ

Max

Min

Max

HIGH Level Input Voltage

1.65 to 1.95 0.75 V_CC

0.75 V_CC

0.7 V_CC

2.3 to 5.5

1.65 to 1.95

2.3 to 5.5

1.65

2.3

0.7 V_CC

V_IL

LOW Level Input Voltage

HIGH Level Output Voltage

0.25 V_CC

0.3 V_CC

0.25 V_CC

0.3 V_CC

V_OH

1.55

2.2

2.9

4.4

1.29

1.9

2.4

2.3

3.8

1.65

2.3

1.55

2.2

2.9

4.4

1.29

1.9

2.4

2.3

3.8

_IN= V_IH

_OH= –100 µA

3.0

4.5

1.65

2.3

1.52

2.15

2.80

2.68

4.20

0.0

_OH= −4 mA

_OH= −8 mA

_OH= −16 mA

_OH= −24 mA

_OH= −32 mA

3.0

4.5

V_OL

LOW Level Output Voltage

1.65

2.3

0.1

0.24

0.3

0.4

0.55

±0.1

0.1

0.24

0.3

0.4

0.55

±1

0.0

_IN= V_IL

_OL= 100 µA

3.0

0.0

4.5

0.0

1.65

2.3

0.08

0.10

0.15

0.22

_OL= 4 mA

_OL= 8 mA

_OL= 16 mA

_OL= 24 mA

_OL= 32 mA

3.0

4.5

I_IN

Input Leakage Current

0 to 5.5

0.0

µA

V_INor V_OUT= 5.5V

_IN= 5.5V, GND

I_OFF

I_CC

Power Off Leakage Current

Quiescent Supply Current

1.65 to 5.5

www.fairchildsemi.com

AC Electrical Characteristics

V_CC

_A= +25°C

T_A= −40°C to +85°C

Figure

Symbol

Parameter

Units

Conditions

(V)

1.8 ± 0.15

2.5 ± 0.2

3.3 ± 0.3

5.0 ± 0.5

3.3 ± 0.3

5.0 ± 0.5

Min

2.0

1.0

0.8

0.5

1.2

0.8

Typ

5.8

3.5

2.6

1.8

3.2

2.4

2.5

Max

10.5

5.8

Min

2.0

1.0

0.8

0.5

1.2

0.8

Max

11.0

6.2

Number

t_PLH

Propagation Delay

t_PHL

C_L= 15 pF,

Figures

1, 3

3.9

4.3

R_L= 1MΩ

3.1

3.3

t_PLH

t_PHL

C_IN

Propagation Delay

4.8

5.2

C_L= 50 pF,

Figures

1, 3

3.7

4.0

R_L= 500Ω

Input Capacitance

Power Dissipation

Capacitance

C_PD

3.3

(Note 3)

Figure 2

5.0

Note 3: C_PDis defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I_CCD) at no output

loading and operating at 50% duty cycle. (See Figure 2.) C_PDis related to I_CCDdynamic operating current by the expression:

I_CCD= (C_PD) (V_CC) (f_IN) + (I_CCstatic).

AC Loading and Waveforms

C_Lincludes load and stray capacitance.

Input PRR = 1.0 MHz, t_w= 500 ns.

FIGURE 1. AC Test Circuit

FIGURE 3. AC Waveforms

Input = AC Waveforms; t_r= t_f= 1.8 ns;

PRR = 10 MHz; Duty Cycle = 50%

FIGURE 2. I_CCDTest Circuit

www.fairchildsemi.com

Tape and Reel Specification

TAPE FORMAT for US8

Package

Tape

Number

Cavities

125 (typ)

3000

Cavity

Status

Empty

Filled

Cover Tape

Status

Designator

Section

Leader (Start End)

Sealed

K8X

Carrier

Sealed

Trailer (Hub End)

75 (typ)

Empty

Sealed

TAPE DIMENSIONS inches (millimeters)

TAPE FORMAT for MicroPak

Package

Tape

Number

Cavities

125 (typ)

3000

Cavity

Status

Empty

Filled

Cover Tape

Status

Designator

Section

Leader (Start End)

Sealed

L8X

Carrier

Sealed

Trailer (Hub End)

75 (typ)

Empty

Sealed

TAPE DIMENSIONS inches (millimeters)

www.fairchildsemi.com

Tape and Reel Specification (Continued)

REEL DIMENSIONS inches (millimeters)

Tape

Size

7.0

0.059

0.512

0.795

2.165 0.331 + 0.059/−0.000

0.567

W1 + 0.078/−0.039

(W1 + 2.00/−1.00)

8 mm

(177.8) (1.50) (13.00) (20.20) (55.00) (8.40 + 1.50/−0.00)

(14.40)

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide

Package Number MAB08A

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

8-Lead MicroPak, 1.6 mm Wide

Package Number MAC08A

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

NC7WZ32K8X相关文章

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NC7WZ32K8X产品参数

型号:	NC7WZ32K8X
Brand Name：	Fairchild Semiconductor
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Transferred
IHS 制造商：	FAIRCHILD SEMICONDUCTOR CORP
零件包装代码：	VSOP
包装说明：	VSSOP, TSSOP8,.12,20
针数：	8
制造商包装代码：	8LD, US8, JEDEC MO-187, 2.3MM WIDE
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
风险等级：	3.05
Is Samacsys：	N
系列：	LVC/LCX/Z
JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e3
长度：	2.3 mm
负载电容（CL）：	50 pF
逻辑集成电路类型：	OR GATE
最大I（ol）：	0.024 A
湿度敏感等级：	1
功能数量：	2
输入次数：	2
端子数量：	8
最高工作温度：	85 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	VSSOP
封装等效代码：	TSSOP8,.12,20
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
包装方法：	TAPE AND REEL
峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	3.3 V
Prop。Delay @ Nom-Sup：	5.2 ns
传播延迟（tpd）：	11 ns
认证状态：	Not Qualified
施密特触发器：	NO
座面最大高度：	0.9 mm
子类别：	Gates
最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	1.65 V
标称供电电压 (Vsup)：	1.8 V
表面贴装：	YES
技术：	CMOS
温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn)
端子形式：	GULL WING
端子节距：	0.5 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	2 mm
Base Number Matches：	1

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