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产品型号NCP431BVSNT1G的概述

NCP431BVSNT1G 芯片概述 NCP431BVSNT1G 是一种高精度、可调节的电压参考器件,属于 ON Semiconductor 公司的产品线。该芯片的功能是提供一个可调输出电压,适用于不同的电子设备和电路设计中。由于其具备较低的温度系数和良好的稳定性,NCP431BVSNT1G 被广泛应用于电源管理、信号处理、和其他对电压稳定性要求较高的电路。 该器件采用了三端设计,通常用于替代传统的分压器和低压降线性稳压器。NCP431BVSNT1G 的工作电压范围广,适合各种不同的应用场景。它非常适合需要高精度和快速响应时间的系统,比如开关电源、线性稳压电源及相关的反馈控制系统。 NCP431BVSNT1G 详细参数 以下是 NCP431BVSNT1G 的一些主要参数: - 工作电压范围: 2.5V 至 36V - 输出电压范围: 1.25V 至 37V - 输出精度: ±1% @ ...

产品型号NCP431BVSNT1G的Datasheet PDF文件预览

NCP431A, SC431A,  
NCP431B, SC431B,  
NCP432B, SC432B Series  
Programmable Precision  
References  
www.onsemi.com  
The NCP431/NCP432 integrated circuits are three−terminal  
programmable shunt regulator diodes. These monolithic IC voltage  
references operate as a low temperature coefficient zener which is  
programmable from Vref to 36 V using two external resistors. These  
devices exhibit a wide operating current range of 40 mA to 100 mA  
with a typical dynamic impedance of 0.22 W. The characteristics of  
these references make them excellent replacements for zener diodes in  
many applications such as digital voltmeters, power supplies, and op  
amp circuitry. The 2.5 V reference makes it convenient to obtain a  
stable reference from 5.0 V logic supplies, and since the NCP431/  
NCP432 operates as a shunt regulator, it can be used as either a  
positive or negative voltage reference. Low minimum operating  
current makes this device an ideal choice for secondary regulators in  
SMPS adapters with extremely low no−load consumption.  
TO−92  
LP SUFFIX  
CASE 29−11  
Pin 1. Reference  
2. Anode  
3. Cathode  
1
2
8
3
SOIC−8 NB  
D SUFFIX  
CASE 751  
1
Features  
1
Cathode  
Anode  
Anode  
NC  
Reference  
Anode  
Anode  
NC  
Programmable Output Voltage to 36 V  
Low Minimum Operating Current: 40 mA, Typ @ 25°C  
Voltage Reference Tolerance: 0.5%, Typ @ 25°C  
(NCP431B/NCP432B)  
(Top View)  
Low Dynamic Output Impedance, 0.22 W Typical  
Sink Current Capability of 40 mA to 100 mA  
3
SOT−23−3  
SN SUFFIX  
CASE 318  
Equivalent Full−Range Temperature Coefficient of 50 ppm/°C  
Typical  
1
Temperature Compensated for Operation over Full Rated Operating  
2
Temperature Range  
NCP431/SC431  
Pin 1. Reference  
2. Cathode  
NCP432/SC432  
Pin 1. Cathode  
2. Reference  
3. Anode  
SC Prefix for Automotive and Other Applications Requiring Unique  
Site and Control Change Requirements; AEC−Q100 Qualified and  
PPAP Capable  
3. Anode  
These are Pb−Free Devices  
Typical Applications  
Voltage Adapters  
Switching Power Supply  
Precision Voltage Reference  
Charger  
ORDERING AND MARKING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 14 of this data sheet.  
Instrumentation  
© Semiconductor Components Industries, LLC, 2016  
1
Publication Order Number:  
June, 2016 − Rev. 14  
NCP431/D  
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series  
Reference  
Cathode  
(K)  
Cathode  
(R)  
(K)  
2.5Vref  
Reference  
(R)  
Anode  
(A)  
Anode  
(A)  
Figure 1. Symbol  
Figure 2. Representative Block diagram  
This device contains 20 active transistors  
MAXIMUM RATINGS (Full operating ambient temperature range applies, unless otherwise noted)  
Symbol Rating  
Value  
37  
Unit  
V
V
KA  
Cathode to Anode Voltage  
I
Cathode Current Range, Continuous  
−100 to +150  
−5 to +10  
150  
mA  
mA  
°C  
K
I
ref  
Reference Input Current Range, Continuous  
Operating Junction Temperature  
T
J
T
Operating Ambient Temperature Range  
Storage Temperature Range  
−40 to +125  
−65 to +150  
°C  
A
T
stg  
°C  
P
Total Power Dissipation @ T = 25°C  
W
D
D
A
Derate above 25°C Ambient Temperature  
D, LP Suffix Plastic Package  
SN1 Suffix Plastic Package  
0.70  
0.52  
P
Total Power Dissipation @ T = 25°C  
1.5  
W
V
C
Derate above 25°C Case Temperature  
D, LP Suffix Plastic Package  
ESD Rating (Note 1)  
HBM  
CDM  
Human Body Model per JEDEC JESD22−A114F  
Charged Device Model per JEDEC JESD22−C101E  
>2000  
>1000  
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality  
should not be assumed, damage may occur and reliability may be affected.  
1. This device contains latch−up protection and exceeds 100 mA per JEDEC standard JESD78.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Condition  
Min  
Max  
36  
Unit  
V
V
KA  
Cathode to Anode Voltage  
Cathode Current  
V
ref  
I
K
0.04  
100  
mA  
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond  
the Recommended Operating Ranges limits may affect device reliability.  
THERMAL CHARACTERISTICS  
LP Suffix Package  
(50 mm x 35 mm Cu)  
D Suffix Package  
(50 mm x 35 mm Cu)  
SN Suffix Package  
(10 mm x 35 mm Cu)  
2
2
2
Symbol  
Characteristic  
Unit  
R
Thermal Resistance,  
Junction−to−Ambient  
176  
210  
255  
°C/W  
Q
JA  
R
Thermal Resistance,  
Junction−to−Lead (Lead 3)  
75  
68  
80  
°C/W  
Q
JL  
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2
 
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series  
ELECTRICAL CHARACTERISTICS (T = 25°C, unless otherwise noted.)  
A
NCP431AV/  
SC431AV  
NCP431AC  
Min Typ Max  
NCP431AI  
Typ Max  
Min  
Min Typ  
Max  
Symbol  
Characteristic  
Unit  
V
ref  
Reference Input Voltage  
= V , I = 1 mA  
V
V
KA  
ref  
K
T = 25°C  
2.475 2.500 2.525 2.475 2.500 2.525 2.475 2.500 2.525  
2.475 2.500 2.525 2.465 2.500 2.525 2.460 2.500 2.525  
A
T = T  
to T (Figure 3, Note 2)  
high  
A
low  
DV  
Reference Input Voltage Deviation Over Temperat-  
ure Range (Figure 3, Notes 3, 4)  
5.0  
10  
10  
15  
mV  
refT  
V
KA  
= V , I = 1 mA  
ref K  
DV  
Ratio of Change in Reference Input Voltage to  
Change in Cathode to Anode Voltage  
mV/  
V
ref  
DV  
KA  
I
K
= 1 mA (Figure 4),  
DV = 10 V to V  
−1.85 −3.1  
−0.80 −1.8  
−1.85 −3.1  
−0.80 −1.8  
−1.85 −3.1  
−0.80 −1.8  
KA  
ref  
DV = 36 V to 10 V  
KA  
I
Reference Input Current (Figure 4)  
nA  
nA  
ref  
I
= 1 mA, R1 = 220 k, R2 = R  
81  
190  
81  
190  
81  
190  
K
T = −40°C to +125°C  
A
DI  
Reference Input Current Deviation Over Temperat-  
ure Range (Figure 4, Note 3)  
refT  
22  
55  
60  
22  
55  
60  
22  
55  
60  
I
K
= 1 mA, R1 = 10 k, R2 = R  
I
Minimum Cathode Current For Regulation  
= V (Figure 3)  
40  
40  
40  
mA  
nA  
W
min  
V
KA  
ref  
I
Off−State Cathode Current (Figure 5)  
= 36 V, V = 0 V  
180 1000  
180 1000  
180 1000  
off  
V
KA  
ref  
|Z  
|
Dynamic Impedance (Figure 3, Note 5)  
= V , DI = 1.0 mA to 100 mA  
0.22  
0.5  
0.22  
0.5  
0.22  
0.5  
KA  
V
KA  
ref  
K
f v 1.0 kHz  
2. T  
T
= −40°C for NCP431AI, NCP431AV, SC431AV  
= 0°C for NCP431AC  
low  
= 70°C for NCP431AC  
high  
= 85°C for NCP431AI  
= 125°C for NCP431AV, SC431AV  
3. Guaranteed by design  
4. The deviation parameter DV  
is defined as the difference between the maximum and minimum values obtained over the full operating  
refT  
ambient temperature range that applies.  
The average temperature coefficient of the reference input voltage, Vref is defined as:  
DV  
ref  
6
ǒ Ǔ  10  
6
V
@25° C  
DV   10  
ref  
ppm  
ref  
V
+
+
ref  
° C  
DT  
AǒVref@25° CǓ  
DT  
A
aVref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature.  
Example: DV  
= 17 mV and slope is positive  
refT  
V
ref  
= 2.5 V, DT = 165°C (from −40°C to +125°C)  
A
6
0.017 @ 10  
165 @ 2.5  
aV  
+
+ 41.2 ppmń° C  
ref  
5. The dynamic impedance Z is defined as: (|Z | = (DV /DI ). When the device is programmed with two external resistors, R1 and R2,  
KA  
KA  
KA  
K
the total dynamic impedance of the circuit is defined as: |Z ’| [ |Z | (1 + (R1/R2)).  
KA  
KA  
6. SC431AVSNT1G T = 40°C, T  
= 125°C. Guaranteed by design. SC Prefix for Automotive and Other Applications Requiring Unique  
Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.  
low  
high  
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3
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series  
ELECTRICAL CHARACTERISTICS (T = 25°C, unless otherwise noted.)  
A
NCP431BC  
NCP432BC  
NCP431BI  
NCP432BI  
NCP/SC431BV  
NCP/SC432BV  
Min  
Typ  
Max  
Min  
Typ  
Max  
Min  
Typ  
Max  
Symbol  
Characteristic  
Reference Input Voltage  
Unit  
V
ref  
V
V
= V , I = 1 mA  
KA  
ref K  
T = 25°C  
2.4875 2.500 2.5125 2.4875 2.500 2.5125 2.4875 2.500 2.5125  
2.4875 2.500 2.5125 2.4775 2.500 2.5125 2.4725 2.500 2.5125  
A
T = T  
to T  
(Figure 3, Note 7)  
A
low  
high  
DV  
Reference Input Voltage Deviation Over Tem-  
perature Range (Figure 3, Notes 8, 9)  
5.0  
10  
1−  
10  
15  
15  
mV  
refT  
V
KA  
= V , I = 1 mA  
ref K  
DV  
Ratio of Change in Reference Input Voltage to  
Change in Cathode to Anode Voltage  
mV/  
V
ref  
DV  
KA  
I
K
= 1 mA (Figure 4),  
DV = 10 V to V  
−1.85 −3.1  
−0.80 −1.8  
−1.85 −3.1  
−0.80 −1.8  
−1.85 −3.1  
−0.80 −1.8  
KA  
ref  
DV = 36 V to 10 V  
KA  
I
Reference Input Current (Figure 4)  
nA  
nA  
ref  
I
= 1 mA, R1 = 220 k, R2 = R  
81  
190  
81  
190  
81  
190  
K
T = −40°C to +125°C  
A
DI  
Reference Input Current Deviation Over Tem-  
perature Range (Figure 4, Note 8)  
refT  
22  
55  
60  
22  
55  
60  
22  
55  
60  
I
K
= 1 mA, R1 = 10 k, R2 = R  
I
Minimum Cathode Current For Regulation  
= V (Figure 3)  
40  
40  
40  
mA  
nA  
W
min  
V
KA  
ref  
I
Off−State Cathode Current (Figure 5)  
= 36 V, V = 0 V  
180 1000  
180 1000  
180 1000  
off  
V
KA  
ref  
|Z  
|
Dynamic Impedance (Figure 3, Note 10)  
= V , DI = 1.0 mA to 100 mA  
0.22  
0.5  
0.22  
0.5  
0.22  
0.5  
KA  
V
KA  
ref  
K
f v 1.0 kHz  
7. T  
T
= −40°C for NCP431BI, NCP431BV, NCP432BI, NCP432BV, SC431B, SC432B  
= 0°C for NCP431BC, NCP432BC  
low  
= 70°C for NCP431BC, NCP432BC  
high  
= 85°C for NCP431BI, NCP432BI  
= 125°C for NCP431BV, NCP432BV, SC431BV, SC432BV  
8. Guaranteed by design  
9. The deviation parameter DV  
is defined as the difference between the maximum and minimum values obtained over the full operating  
refT  
ambient temperature range that applies.  
The average temperature coefficient of the reference input voltage, Vref is defined as:  
DV  
ref  
6
ǒ Ǔ  10  
6
V
@25° C  
DV   10  
ref  
ppm  
ref  
V
+
+
ref  
° C  
DT  
AǒVref@25° CǓ  
DT  
A
aVref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature.  
Example: DV  
= 17 mV and slope is positive  
refT  
V
ref  
= 2.5 V, DT = 165°C (from −40°C to +125°C)  
A
6
0.017 @ 10  
165 @ 2.5  
aV  
+
+ 41.2 ppmń° C  
ref  
10.The dynamic impedance Z is defined as: (|Z | = (DV /DI ). When the device is programmed with two external resistors, R1 and R2,  
KA  
KA  
KA  
K
the total dynamic impedance of the circuit is defined as: |Z ’| [ |Z | (1 + (R1/R2))  
KA  
KA  
11. SC431BVSNT1G, SC432BVSNT1G − T = −40°C, T  
= 125°C. Guaranteed by design. SC Prefix for Automotive and Other Applica-  
low  
high  
tions Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
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4
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series  
Input  
V
KA  
Input  
V
KA  
Input  
V
KA  
IK  
I
off  
R1  
R2  
Iref  
IK  
Vref  
Vref  
R1  
refǒ1 ) Ǔ) I  
V
+ V  
@ R1  
KA  
ref  
R2  
Figure 3. Test Circuit for VKA = Vref  
Figure 4. Test Circuit for VKA > Vref  
Figure 5. Test Circuit for Ioff  
60.0  
150.0  
VKA = Vref  
TA = 25°C  
VKA = Vref  
TA = 25°C  
Input  
VKA  
Input  
VKA  
40.0  
I
Min  
IK  
100.0  
50.0  
IK  
20.0  
0.0  
0.0  
−20.0  
−40.0  
−60.0  
−50.0  
−100.0  
−1.0  
0.0  
1.0  
2.0  
3.0  
−1.0  
0.0  
1.0  
2.0  
3.0  
V
KA  
, CATHODE VOLTAGE (V)  
V
KA  
, CATHODE VOLTAGE (V)  
Figure 6. Cathode Current versus Cathode  
Voltage  
Figure 7. Cathode Current versus Cathode  
Voltage  
80.00  
70.00  
60.00  
50.00  
40.00  
30.00  
20.00  
10.00  
0.00  
−50  
−25  
0
25  
50  
75  
100  
125  
T , AMBIENT TEMPERATURE (°C)  
A
Figure 8. Minimum Cathode Current Regulation  
versus Ambient Temperature  
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5
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series  
120  
2540  
2530  
2520  
2510  
2500  
2490  
2480  
2470  
2460  
V
Input  
KA  
V
= V  
KA ref  
= 1 mA  
I
K
= 1 mA  
V
K
Input  
220k  
KA  
I
K
110  
100  
90  
I
K
I
I
ref  
V
ref  
80  
70  
60  
50  
40  
−50  
−25  
0
25  
50  
75  
100  
125  
−50  
−25  
0
25  
50  
75  
100  
125  
T , AMBIENT TEMPERATURE (°C)  
A
T , AMBIENT TEMPERATURE (°C)  
A
Figure 9. Reference Input Voltage versus  
Ambient temperature  
Figure 10. Reference Input Current versus  
Ambient temperature  
100  
10  
1
0
−10  
−20  
−30  
−40  
VKA = 36V  
Vref = 0V  
Input  
V
KA  
Input  
VKA  
I
K
Ioff  
R1  
R2  
V
ref  
V
= V  
ref  
= 1 mA  
KA  
I
K
−50  
−25  
0
25  
50  
75  
100  
125  
0
10  
V
20  
30  
40  
, CATHODE VOLTAGE (V)  
T , AMBIENT TEMPERATURE (°C)  
KA  
A
Figure 11. Change in Reference Input Voltage  
versus Cathode Voltage  
Figure 12. Off−State Cathode Current versus  
Ambient Temperature  
10  
0.320  
0.300  
0.280  
0.260  
0.240  
0.220  
0.200  
1.0k  
Output  
IK  
50  
GND  
1
VKA = Vref  
DIK = 1.0 mA to 100mA  
f<1.0 kHz  
Output  
GND  
IK  
1.0k  
50  
DI = 1 mA to 100 mA  
T = 25°C  
A
K
0.1  
0.001  
0.01  
0.1  
1
10  
100  
−50  
−25  
0
25  
50  
75  
100  
125  
f, FREQUENCY (MHz)  
T , AMBIENT TEMPERATURE (°C)  
A
Figure 13. Dynamic Impedance versus  
Frequency  
Figure 14. Dynamic Impedance versus Ambient  
Temperature  
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NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series  
60  
50  
40  
30  
20  
10  
0
800  
Output  
IK  
700  
9.0mF  
15k  
230  
600  
500  
400  
300  
200  
100  
0
8.25k  
GND  
VKA =Vref  
IK = 1 mA  
T
A = 25°C  
VKA  
Input  
IK  
I
= 100 mA to 10 mA  
K
T = 25°C  
A
−10  
10  
100  
1000  
f, FREQUENCY (Hz)  
10k  
100k  
1000  
10k  
100k  
1M  
10M  
f, FREQUENCY (Hz)  
Figure 15. Open−Loop Voltage Gain versus  
Frequency  
Figure 16. Spectral Noise Density  
Input  
Monitor  
220  
Output  
4.0  
Pulse  
Generator  
f = 100kHz  
3.0  
2.0  
50  
Output  
GND  
1.0  
10  
5.0  
0
Input  
0
4.0 8.0 12  
16 20 24 28 32 36 40  
t, TIME (ms)  
C , LOAD CAPACITANCE (nF)  
L
Figure 17. Pulse Response  
Figure 18. Stability Boundary Conditions  
Figure 19. Stability Boundary Conditions for  
Small Cathode Current  
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NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series  
150  
150  
V
OUT  
V
OUT  
I
K
I
K
10k  
V+  
V+  
C
L
C
L
Figure 20. Test Circuit For Curve A of Stability  
Boundary Conditions  
Figure 21. Test Circuit For Curve B And C of  
Stability Boundary Conditions  
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NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series  
TYPICAL APPLICATIONS  
V+  
V
OUT  
V+  
V
OUT  
R1  
R2  
I
K
R1  
R2  
C
L
R1  
+ ǒ1 ) ǓV  
V
OUT  
ref  
R2  
R1  
+ ǒ1 ) ǓV  
V
OUT  
ref  
R2  
Figure 22. Shunt Regulator  
Figure 23. High Current Shunt  
Regulator  
V+  
V
OUT  
MC7805  
V+  
In  
Out  
Common  
V
OUT  
R1  
R1  
R2  
R2  
R1  
+ ǒ1 ) ǓV  
V
OUT  
ref  
R2  
+ V  
R1  
+ ǒ1 ) ǓV  
V
OUT  
ref  
R2  
V
) 5.0 V  
OUT(min)  
ref  
V
V
+ V  
) V  
IN(min)  
OUT  
be  
+ V  
OUT(min)  
ref  
Figure 24. Output Control for a  
Tree−Terminal Fixed Regulator  
Figure 25. Series Pass  
Regulator  
I
Sink  
V+  
R
CL  
I
V+  
OUT  
V
ref  
I
+
Sink  
R
s
V
R
ref  
R
S
I
+
OUT  
CL  
Figure 26. Constant Current Source  
Figure 27. Constant Current  
Sink  
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NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series  
V
OUT  
V
OUT  
V+  
V+  
R1  
R2  
R1  
R2  
R1  
R1  
(trip) + ǒ1 ) ǓV  
(trip) + ǒ1 ) ǓV  
ref  
V
V
OUT  
ref  
OUT  
R2  
R2  
Figure 28. Triac Crowbar  
Figure 29. SRC Crowbar  
V
OUT  
V+  
V+  
R1  
R3  
I
R1  
V
OUT  
V
IN  
V
OUT  
V
IN  
< V  
V+  
[2.0 V  
ref  
> V  
ref  
V
+ V  
R2  
R4  
th  
ref  
Figure 31. Single−Supply Comparator with  
Temperature−Compensated Threshold  
L.E.D. indicator is ‘on’ when V+ is between the uppper  
and lower limits.  
R1  
Lower Limit + ǒ1 ) ǓV  
ref  
R2  
R3  
Upper Limit + ǒ1 ) ǓV  
ref  
R4  
Figure 30. Voltage Monitoring  
150 mH @ 2.0 A  
Vin = 10 to 20 V  
TIP115  
V
OUT  
= 5.0 V  
I
= 1.0 A  
OUT  
1.0k  
1N5823  
4.7 k  
4.7k  
100k  
MPSA20  
470 mF  
2200 mF  
0.01 mF  
4.7k  
0.1 mF  
2.2k  
51k  
10  
Figure 32. Step−Down Switching Converter  
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10  
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series  
APPLICATIONS INFORMATION  
The NCP431/NCP432 is a programmable precision  
reference which is used in a variety of ways. It serves as a  
reference voltage in circuits where a non−standard reference  
voltage is needed. Other uses include feedback control for  
driving an optocoupler in power supplies, voltage monitor,  
constant current source, constant current sink and series pass  
regulator. In each of these applications, it is critical to  
maintain stability of the device at various operating currents  
and load capacitances. In some cases the circuit designer can  
estimate the stabilization capacitance from the stability  
boundary conditions curve provided in Figure 18. However,  
these typical curves only provide stability information at  
specific cathode voltages and at a specific load condition.  
Additional information is needed to determine the  
capacitance needed to optimize phase margin or allow for  
process variation.  
1
1
P1 +  
P2 +  
Z1 +  
+
+ 7.96 kHz  
+ 60 kHz  
2pRGMCP1  
2p @ 1.0M @ 20 pF  
1
1
+
2pRP2CP2  
2p @ 10M @ 0.265 pF  
1
1
+
+ 500 kHz  
2pRZ1CP1  
2p @ 15.9k @ 20 pF  
In addition, there is an external circuit pole defined by the  
load:  
1
PL +  
2pRLCL  
Also, the transfer dc voltage gain of the NCP431 is:  
G + GMRGMGoRL  
A simplified model of the NCP431/NCP432 is shown in  
Figure 33. When tested for stability boundaries, the load  
resistance is 150 W. The model reference input consists of an  
input transistor and a dc emitter resistance connected to the  
device anode. A dependent current source, Gm, develops a  
current whose amplitude is determined by the difference  
between the 1.78 V internal reference voltage source and the  
input transistor emitter voltage. A portion of Gm flows  
through compensation capacitance, CP2. The voltage across  
CP2 drives the output dependent current source, Go, which  
is connected across the device cathode and anode.  
Example 1:  
I =10 mA, R = 230 W,C = 0. Define the transfer gain.  
C
L
L
The DC gain is:  
(
)(  
)(  
)(  
)
G + GMRGMGoRL + 2.138 1.0M 1.25m 230  
+ 615 + 56 dB  
8.25k  
Loop gain + G  
+ 218 + 47 dB  
8.25k ) 15k  
The resulting transfer function Bode plot is shown in  
Figure 34. The asymptotic plot may be expressed as the  
following equation:  
jf  
Model component values are:  
Vref = 1.78 V  
Gm = 0.3 + 2.7 exp (−IC/26 mA)  
where IC is the device cathode current and Gm is in mhos  
Go = 1.25 (Vcp2) mmhos.  
Resistor and capacitor typical values are shown on the  
model. Process tolerances are 20% for resistors, 10% for  
capacitors, and 40% for transconductances.  
An examination of the device model reveals the location  
of circuit poles and zeroes:  
ǒ1 )  
Ǔ
500 kHz  
Av + 615  
jf  
jf  
ǒ
1 )  
Ǔǒ1 )  
Ǔ
8.0 kHz  
60 kHz  
The Bode plot shows a unity gain crossover frequency of  
approximately 600 kHz. The phase margin, calculated from  
the equation, would be 55.9°. This model matches the  
Open−Loop Bode Plot of Figure 15. The total loop would  
have a unity gain frequency of about 300 kHz with a phase  
margin of about 44°.  
Figure 33. Simplified NCP431/NCP432 Device Model  
www.onsemi.com  
11  
 
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series  
NCP431/NCP432 OPEN−LOOP VOLTAGE GAIN  
VERSUS FREQUENCY  
NCP431/NCP432 OPEN−LOOP BODE PLOT WITH  
LOAD CAP  
Figure 35. Example 2 Circuit Open Loop Gain Plot  
Figure 34. Example 1 Circuit Open Loop Gain Plot  
With three poles, this system is unstable. The only hope  
for stabilizing this circuit is to add a zero. However, that can  
only be done by adding a series resistance to the output  
capacitance, which will reduce its effectiveness as a noise  
filter. Therefore, practically, in reference voltage  
applications, the best solution appears to be to use a smaller  
value of capacitance in low noise applications or a very large  
value to provide noise filtering and a dominant pole rolloff  
of the system.  
Example 2.  
I = 7.5 mA, R = 2.2 kW, C = 0.01 mF. Cathode tied to  
C
L
L
reference input pin. An examination of the data sheet  
stability boundary curve (Figure 18) shows that this value of  
load capacitance and cathode current is on the boundary.  
Define the transfer gain.  
The DC gain is:  
(
)(  
)(  
)(  
)
G + GMRGMGoRL + 2.138 1.0M 1.25m 230  
+ 6389 + 76 dB  
The NCP431/NCP432 is often used as a regulator in  
secondary side of a switch mode power supply (SMPS).  
The benefit of this reference is high and stable gain under  
low bias currents. Figure 36 shows dependence of the gain  
(dynamic impedance) on the bias current. Value of  
minimum cathode current that is needed to assure stable gain  
is 80 mA maximum.  
The resulting open loop Bode plot is shown in Figure 35.  
The asymptotic plot may be expressed as the following  
equation:  
jf  
ǒ1 )  
Ǔ
500 kHz  
Av + 615  
jf  
jf  
jf  
ǒ
1 )  
Ǔǒ1 ) Ǔǒ1 )  
Ǔ
8.0 kHz  
60 kHz  
7.2 kHz  
Note that the transfer function now has an extra pole  
formed by the load capacitance and load resistance.  
Note that the crossover frequency in this case is about  
250 kHz, having a phase margin of about −46°. Therefore,  
instability of this circuit is likely.  
www.onsemi.com  
12  
 
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series  
Figure 37. SMPS Secondary Side and Feedback  
Figure 36. Knee of Reference  
Connection on Primary Side  
Regulator with TL431 or other references in secondary  
The NCP431/NCP432 operates with very low leakage  
side of a SMPS needs bias resistor to increase cathode  
and reference input current. Sum of these currents is lower  
current to reach high and stable gain (refer to Figure 37).  
than 100 nA. Regulator with the NCP431/NCP432  
This bias resistor does not have to be used in regulator with  
minimizes parasitic power consumption.  
NCP431/NCP432 thanks to its low minimum cathode  
The best way to achieve extremely low no−load  
current.  
consumption in SMPS applications is to use  
NCP431/NCP432 as regulator on the secondary side. The  
consumption is reduced by minimum parasitic consumption  
and very low bias current of NCP431/NCP432.  
www.onsemi.com  
13  
 
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series  
MARKING DIAGRAMS  
NCP43  
1xxxx  
YWW G  
G
8
N431xx  
ALYW  
G
xxx MG  
G
1
1
xx, xxx, xxx = Specific Device Code  
A
L
= Assembly Location  
= Wafer Lot  
Y
= Year  
M
W, WW  
= Date Code  
= Work Week  
G
= Pb−Free Package  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
Operating  
Temperature Range  
Device  
Marking Tolerance  
Package  
Shipping  
NCP431ACDR2G  
AC  
VRF  
VRJ  
VRM  
ACLP  
AI  
1%  
SOIC−8  
(Pb−Free)  
2500 / Tape & Reel  
3000 / Tape & Reel  
3000 / Tape & Reel  
3000 / Tape & Reel  
2000 / Tape & Reel  
2500 / Tape & Reel  
3000 / Tape & Reel  
3000 / Tape & Reel  
3000 / Tape & Reel  
2000 / Tape & Reel  
2500 / Tape & Reel  
3000 / Tape & Reel  
2000 / Tape & Reel  
2000 Units / Bag  
NCP431ACSNT1G  
NCP431BCSNT1G  
NCP432BCSNT1G  
NCP431ACLPRAG  
NCP431AIDR2G  
NCP431AISNT1G  
NCP431BISNT1G  
NCP432BISNT1G  
NCP431AILPRAG  
NCP431AVDR2G  
1%  
SOT−23−3  
(Pb−Free)  
0.5%  
0.5%  
1%  
SOT−23−3  
(Pb−Free)  
0°C to 70°C  
SOT−23−3  
(Pb−Free)  
TO−92 (TO−226)  
(Pb−Free)  
1%  
SOIC−8  
(Pb−Free)  
VRG  
VRK  
VRN  
AILP  
AV  
1%  
SOT−23−3  
(Pb−Free)  
0.5%  
0.5%  
1%  
SOT−23−3  
(Pb−Free)  
−40°C to 85°C  
SOT−23−3  
(Pb−Free)  
TO−92 (TO−226)  
(Pb−Free)  
1%  
SOIC−8  
(Pb−Free)  
NCP431AVSNT1G /  
SC431AVSNT1G*  
VRH  
AVLP  
AVLP  
VRL  
VRP  
1%  
SOT−23−3  
(Pb−Free)  
NCP431AVLPRAG  
1%  
TO−92 (TO−226)  
(Pb−Free)  
−40°C to 125°C  
NCP431AVLPG  
1%  
TO−92 (TO−226)  
(Pb−Free)  
NCP431BVSNT1G /  
SC431BVSNT1G*  
0.5%  
0.5%  
SOT−23−3  
(Pb−Free)  
3000 / Tape & Reel  
3000 / Tape & Reel  
NCP432BVSNT1G /  
SC432BVSNT1G*  
SOT−23−3  
(Pb−Free)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
*SC Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP  
Capable.  
www.onsemi.com  
14  
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series  
PACKAGE DIMENSIONS  
TO−92 (TO−226)  
CASE 29−11  
ISSUE AN  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
A
STRAIGHT LEAD  
B
2. CONTROLLING DIMENSION: INCH.  
3. CONTOUR OF PACKAGE BEYOND DIMENSION R  
IS UNCONTROLLED.  
R
4. LEAD DIMENSION IS UNCONTROLLED IN P AND  
BEYOND DIMENSION K MINIMUM.  
P
L
INCHES  
DIM MIN MAX  
MILLIMETERS  
SEATING  
PLANE  
K
MIN  
4.45  
4.32  
3.18  
0.407  
1.15  
2.42  
0.39  
12.70  
6.35  
2.04  
---  
MAX  
5.20  
5.33  
4.19  
0.533  
1.39  
2.66  
0.50  
---  
A
B
C
D
G
H
J
0.175  
0.170  
0.125  
0.016  
0.045  
0.095  
0.015  
0.500  
0.250  
0.080  
---  
0.205  
0.210  
0.165  
0.021  
0.055  
0.105  
0.020  
---  
D
X X  
G
J
H
K
L
---  
---  
V
N
P
R
V
0.105  
0.100  
---  
2.66  
2.54  
---  
C
SECTION X−X  
0.115  
0.135  
2.93  
3.43  
1
N
---  
---  
N
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
A
BENT LEAD  
B
R
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. CONTOUR OF PACKAGE BEYOND  
DIMENSION R IS UNCONTROLLED.  
4. LEAD DIMENSION IS UNCONTROLLED IN P  
AND BEYOND DIMENSION K MINIMUM.  
P
T
SEATING  
PLANE  
MILLIMETERS  
DIM MIN  
MAX  
5.20  
5.33  
4.19  
0.54  
2.80  
0.50  
---  
K
A
B
C
D
G
J
4.45  
4.32  
3.18  
0.40  
2.40  
0.39  
12.70  
2.04  
1.50  
2.93  
3.43  
D
X X  
G
K
N
P
R
V
J
2.66  
4.00  
---  
V
C
---  
SECTION X−X  
1
N
www.onsemi.com  
15  
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series  
PACKAGE DIMENSIONS  
SOIC−8 NB  
CASE 751−07  
ISSUE AK  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSION A AND B DO NOT INCLUDE  
MOLD PROTRUSION.  
−X−  
A
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)  
PER SIDE.  
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.127 (0.005) TOTAL  
IN EXCESS OF THE D DIMENSION AT  
MAXIMUM MATERIAL CONDITION.  
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW  
STANDARD IS 751−07.  
S
M
M
B
0.25 (0.010)  
Y
1
K
−Y−  
MILLIMETERS  
DIM MIN MAX  
INCHES  
G
MIN  
MAX  
0.197  
0.157  
0.069  
0.020  
A
B
C
D
G
H
J
K
M
N
S
4.80  
3.80  
1.35  
0.33  
5.00 0.189  
4.00 0.150  
1.75 0.053  
0.51 0.013  
C
N X 45  
_
SEATING  
PLANE  
1.27 BSC  
0.050 BSC  
−Z−  
0.10  
0.19  
0.40  
0
0.25 0.004  
0.25 0.007  
1.27 0.016  
0.010  
0.010  
0.050  
8
0.020  
0.244  
0.10 (0.004)  
M
J
H
D
8
0
_
_
_
_
0.25  
5.80  
0.50 0.010  
6.20 0.228  
M
S
S
X
0.25 (0.010)  
Z
Y
SOLDERING FOOTPRINT*  
1.52  
0.060  
7.0  
4.0  
0.275  
0.155  
0.6  
0.024  
1.270  
0.050  
mm  
inches  
ǒ
Ǔ
SCALE 6:1  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
www.onsemi.com  
16  
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series  
PACKAGE DIMENSIONS  
SOT−23 (TO−236)  
CASE 318−08  
ISSUE AP  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH  
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM  
D
SEE VIEW C  
3
THICKNESS OF BASE MATERIAL.  
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,  
PROTRUSIONS, OR GATE BURRS.  
H
E
MILLIMETERS  
INCHES  
NOM  
0.040  
0.002  
0.018  
0.005  
0.114  
0.051  
0.075  
0.008  
0.021  
0.094  
−−−  
E
DIM  
A
A1  
b
c
D
E
e
L
L1  
MIN  
0.89  
0.01  
0.37  
0.09  
2.80  
1.20  
1.78  
0.10  
0.35  
2.10  
0°  
NOM  
1.00  
0.06  
0.44  
0.13  
2.90  
1.30  
1.90  
0.20  
0.54  
2.40  
−−−  
MAX  
MIN  
0.035  
0.001  
0.015  
0.003  
0.110  
0.047  
0.070  
0.004  
0.014  
0.083  
0°  
MAX  
0.044  
0.004  
0.020  
0.007  
0.120  
0.055  
0.081  
0.012  
0.029  
0.104  
10°  
1.11  
0.10  
0.50  
0.18  
3.04  
1.40  
2.04  
0.30  
0.69  
2.64  
10°  
c
1
2
b
0.25  
e
q
H
E
q
A
L
A1  
L1  
VIEW C  
SOLDERING FOOTPRINT*  
0.95  
0.037  
0.95  
0.037  
2.0  
0.079  
0.9  
0.035  
mm  
inches  
ǒ
Ǔ
SCALE 10:1  
0.8  
0.031  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
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NCP431/D  
配单直通车
NCP4326DR2产品参数
型号:NCP4326DR2
是否Rohs认证: 不符合
生命周期:Obsolete
零件包装代码:SOIC
包装说明:SOP, SOP16,.25
针数:16
Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01
风险等级:5.63
模拟集成电路 - 其他类型:ANALOG CIRCUIT
JESD-30 代码:R-PDSO-G16
JESD-609代码:e0
长度:9.9 mm
湿度敏感等级:1
功能数量:1
端子数量:16
封装主体材料:PLASTIC/EPOXY
封装代码:SOP
封装等效代码:SOP16,.25
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED
电源:12 V
认证状态:Not Qualified
座面最大高度:1.75 mm
子类别:Power Management Circuits
最大供电电流 (Isup):22 mA
标称供电电压 (Vsup):12 V
表面贴装:YES
端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING
端子节距:1.27 mm
端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mm
Base Number Matches:1
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