NCS20081各脚功能电路原理芯片引脚定义引脚图及功能IC贸易商-中国IC网-芯三七

NCS20081, NCV20081,

NCS20082, NCV20082,

NCS20084, NCV20084

Operational Amplifier,

Rail-to-Rail Input and

Output, 1.2 MHz

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The NCS2008 series operational amplifiers provide rail−to−rail

input and output operation, 1.2 MHz bandwidth, and are available in

single, dual, and quad configurations. Rail−to−rail operation gives

designers use of the entire supply voltage range while taking

advantage of the 1.2 MHz bandwidth. The NCS2008 can operate on

supply voltages from 1.8 to 5.5 V over a temperature range from

−40°C to 125°C. At a 1.8 V supply, this device has a slew rate of 0.4

V/ms while consuming only 42 mA of quiescent current per channel.

Since this is a CMOS device, high input impedance and low bias

currents make it ideal for interfacing to a wide variety of signal

sensors. The NCS2008 devices are available in a variety of compact

packages.

5

1

SC70−5

CASE 419A

TSOP−5/SOT23−5

CASE 483

8

1

Micro8]/MSOP8

SOIC−8

CASE 751

CASE 846A

Features

• Rail−to−Rail Input and Output

• Wide Supply Range: 1.8 to 5.5 V

• Wide Bandwidth: 1.2 MHz

14

1

• High Slew Rate: 0.4 V/ms at V = 1.8 V

S

TSSOP−14

CASE 948G

TSSOP−8

CASE 948S

• Low Supply Current: 42 mA per Channel at V = 1.8 V

S

• Low Input Bias Current: 1 pA Typical

• Wide Temperature Range: −40°C to 125°C

• Available in a Variety of Packages

• NCV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q100

Qualified and PPAP Capable

6

14

1

SOIC−14

CASE 751A

UDFN6

CASE 517AP

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

DEVICE MARKING INFORMATION

See general marking information in the device marking

section on page 2 of this data sheet.

Applications

• Unity Gain Buffer

• Battery Powered / Low Quiescent Current Applications

• Low Cost Current Sensing

• Automotive

ORDERING INFORMATION

See detailed ordering and shipping information on page 3 of

this data sheet.

This document contains information on some products that are still under development.

ON Semiconductor reserves the right to change or discontinue these products without

notice.

1

Publication Order Number:

August, 2016 − Rev. 4

NCS2008/D

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

MARKING DIAGRAMS

Single Channel Configuration

NCS20081, NCV20081

5

1

XXMG

XXXAYWG

XX MG

G

1

SC70−5

CASE 419A

TSOP−5/SOT23−5

CASE 483

UDFN6

CASE 517AP

Dual Channel Configuration

NCS20082, NCV20082

8

XXX

YWW

A G

XXXXXX

ALYW

G

XXXX

AYWG

G

1

Micro8]/MSOP8

SOIC−8

CASE 751

TSSOP−8

CASE 948S

CASE 846A

Quad Channel Configuration

NCS20084, NCV20084

14

XXXX

ALYWG

G

XXXXX

AWLYWWG

1

TSSOP−14

CASE 948G

SOIC−14

CASE 751A

XXXXX = Specific Device Code

= Assembly Location

WL, L = Wafer Lot

= Year

A

Y

WW, W = Work Week

G or G = Pb−Free Package

(Note: Microdot may be in either location)

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2

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

Single Channel Configuration

NCS20081, NCV20081

1

2

3

IN+

1

2

3

5

4

5

OUT

VSS

VDD

IN−

VDD

OUT

1

2

3

VSS

NC

6

5

4

OUT

VDD

IN+

+

−

VSS

IN−

4

IN+

SOT23−5 (TSOP−5)

SN2 Pinout

SC70−5, SOT23−5 (TSOP−5)

SQ3, SN3 Pinout

UDFN6 1.6 x 1.6

Quadruple Channel Configuration

NCS20084, NCV20084

Dual Channel Configuration

OUT 1

1

2

3

4

5

6

7

14

OUT 4

NCS20082, NCV20082

13 IN− 4

12 IN+ 4

IN− 1

IN+ 1

VDD

−

+

−

+

OUT 1

1

2

3

4

8

7

6

5

VDD

−

OUT 2

IN− 1

IN+ 1

VSS

11

+

IN− 2

IN+ 2

−

10

9

IN+ 3

IN− 3

OUT 3

IN+ 2

IN− 2

+

−

+

−

+

OUT 2

8

Figure 1. Pin Connections

ORDERING INFORMATION

†

Device

Configuration

Automotive

Marking

AAP

Package

Shipping

NCS20081SQ3T2G

NCS20081SN2T1G

NCS20081SN3T1G

NCS20081MUTAG

NCV20081SQ3T2G*

NCV20081SN2T1G*

NCV20081SN3T1G*

NCV20081MUTAG*

NCS20082DMR2G

NCS20082DR2G

NCS20082DTBR2G

NCV20082DMR2G*

NCV20082DR2G*

NCV20082DTBR2G*

NCS20084_

SC70

AER

SOT23−5/TSOP−5

UDFN6

No

AEU

AP

Single**

AAP

SC70

AER

SOT23−5/TSOP−5

UDFN6

Yes

AEU

AP

2K82

NCS20082

K82

Micro8/MSOP8

SOIC−8

No

Yes

No

Contact local sales office for

more information

TSSOP−8

Dual

2K82

NCS20082

K82

Micro8/MSOP8

SOIC−8

TSSOP−8

TBD

SOIC−14

NCS20084_

TBD

SOP−14

NCS20084_

TBD

TSSOP−14

SOIC−14

Quad**

NCV20084_

TBD

NCV20084_

TBD

SOP−14

Yes

NCV20084_

TBD

TSSOP−14

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D

*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP

Capable.

**In Development. Not yet released.

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3

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

ABSOLUTE MAXIMUM RATINGS (Note 1)

Rating

Supply Voltage (V – V ) (Note 2)

Symbol

Limit

Unit

V

S

7

DD

SS

Input Voltage

V

I

V

SS

− 0.5 to V + 0.5

V

DD

Differential Input Voltage

Maximum Input Current

V

ID

s

I

10

100

mA

mW

°C

V

I

Maximum Output Current

I

O

Continuous Total Power Dissipation (Note 2)

Maximum Junction Temperature

P

200

D

T

150

J

Storage Temperature Range

T

STG

−65 to 150

260

Mounting Temperature (Infrared or Convection – 20 sec)

T

mount

ESD Capability (Note 3)

Human Body Model

Machine Model

ESD

2000

100

HBM

MM

Charge Device Model

ESD

2000

CDM

Latch−Up Current (Note 4)

I

LU

100

mA

Moisture Sensitivity Level (Note 5)

MSL

Level 1

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

1. Refer to ELECTRICAL CHARACTERISTICS for Safe Operating Area.

2. Continuous short circuit operation to ground at elevated ambient temperature can result in exceeding the maximum allowed junction

temperature of 150°C. Output currents in excess of the maximum output current rating over the long term may adversely affect reliability.

Shorting output to either VDD or VSS will adversely affect reliability.

3. This device series incorporates ESD protection and is tested by the following methods:

ESD Human Body Model tested per AEC−Q100−002 (JEDEC standard: JESD22−A114)

ESD Machine Model tested per AEC−Q100−003 (JEDEC standard: JESD22−A115)

4. Latch−up Current tested per JEDEC standard: JESD78

5. Moisture Sensitivity Level tested per IPC/JEDEC standard: J- STD- 020A

THERMAL INFORMATION

Single Layer

Multi−Layer

Board (Note 6)

Board (Note 7)

Parameter

Symbol

Channels

Package

SC−70

Unit

SOT23−5/TSOP−5

UDFN6

Single

Micro8/MSOP8

SOIC−8

236

190

253

167

131

194

Junction to Ambient

Thermal Resistance

q

Dual

°C/W

JA

TSSOP−8

SOIC−14

SOP−14

Quad

TSSOP−14

2

6. Value based on 1S standard PCB according to JEDEC51−3 with 1.0 oz copper and a 300 mm copper area

2

7. Value based on 1S2P standard PCB according to JEDEC51−7 with 1.0 oz copper and a 100 mm copper area

OPERATING RANGES

Parameter

Symbol

Min

Max

Unit

V

Operating Supply Voltage

Differential Input Voltage

Input Common Mode Range

Ambient Temperature

V

S

1.8

5.5

V

ID

S

V

ICM

V

– 0.2

V + 0.2

DD

V

SS

T

−40

125

°C

A

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond

the Recommended Operating Ranges limits may affect device reliability.

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4

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

ELECTRICAL CHARACTERISTICS AT V_S= 1.8 V

T = 25°C; R ≥ 10 kW; V

= V

= mid−supply unless otherwise noted.

A

L

CM

OUT

Boldface limits apply over the specified temperature range, T = −40°C to 125°C. (Note 8)

A

Parameter

INPUT CHARACTERISTICS

Input Offset Voltage

Symbol

Conditions

Min

Typ

Max

Unit

V

OS

0.5

3.5

mV

mV/°C

pA

4

Offset Voltage Drift

DV /DT

1

OS

Input Bias Current (Note 8)

I

IB

1500

1100

pA

Input Offset Current (Note 8)

I

1

pA

OS

pA

Channel Separation

XTLK

DC

125

10

1

dB

Differential Input Resistance

Common Mode Input Resistance

Differential Input Capacitance

Common Mode Input Capacitance

Common Mode Rejection Ratio

R

C

GW

pF

ID

IN

ID

C

5

pF

CM

CMRR

V

= V – 0.2 to V + 0.2

48

73

dB

CM

SS

DD

= V + 0.2 to V − 0.2

45

CM

SS

DD

OUTPUT CHARACTERISTICS

Open Loop Voltage Gain

A

86

120

dB

mA

mV

VOL

80

Short Circuit Current

Output Voltage High

Output Voltage Low

I

Output to positive rail, sinking current

Output to negative rail, sourcing current

Voltage output swing from positive rail

15

11

3

SC

V

19

20

19

20

OH

V

Voltage output swing from negative rail

3

OL

AC CHARACTERISTICS

Unity Gain Bandwidth

Slew Rate at Unity Gain

Phase Margin

UGBW

SR

1.2

0.4

60

19

5

MHz

V/ms

°

V

= 1.2 Vpp, Gain = 1

ID

y

m

Gain Margin

A

dB

ms

m

S

Settling Time

t

V

IN

= 1.2 Vpp,

Settling time to 0.1%

Settling time to 0.01%

Gain = 1

6

Open Loop Output Impedance

NOISE CHARACTERISTICS

Total Harmonic Distortion plus Noise

Input Referred Voltage Noise

Z

f = 100 Hz

0.8

W

OL

THD+N

V

IN

= 1.2 Vpp, f = 1 kHz, Av = 1

f = 1 kHz

0.005

30

%

e

nV/√Hz

n

f = 10 kHz

24

Input Referred Current Noise

SUPPLY CHARACTERISTICS

Power Supply Rejection Ratio

i

f = 1 kHz

300

fA/√Hz

dB

n

PSRR

No Load

67

90

42

64

Power Supply Quiescent Current

I

Per channel, no load

60

mA

DD

8. Performance guaranteed over the indicated operating temperature range by design and/or characterization.

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5

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

ELECTRICAL CHARACTERISTICS AT V_S= 3.3 V

T = 25°C; R ≥ 10 kW; V

= V

= mid−supply unless otherwise noted.

A

L

CM

OUT

Boldface limits apply over the specified temperature range, T = −40°C to 125°C. (Note 9)

A

Parameter

INPUT CHARACTERISTICS

Input Offset Voltage

Symbol

Conditions

Min

Typ

Max

Unit

V

OS

0.5

3.5

mV

mV/°C

pA

4

Offset Voltage Drift

DV /DT

1

OS

Input Bias Current (Note 9)

I

IB

1500

1100

pA

Input Offset Current (Note 9)

I

1

pA

OS

pA

Channel Separation

XTLK

DC

125

10

1

dB

Differential Input Resistance

Common Mode Input Resistance

Differential Input Capacitance

Common Mode Input Capacitance

Common Mode Rejection Ratio

R

C

GW

pF

ID

IN

ID

C

5

pF

CM

CMRR

V

= V – 0.2 to V + 0.2

53

76

dB

CM

SS

DD

= V + 0.2 to V − 0.2

48

CM

SS

DD

OUTPUT CHARACTERISTICS

Open Loop Voltage Gain

A

90

120

dB

mA

mV

VOL

86

Short Circuit Current

Output Voltage High

Output Voltage Low

I

Output to positive rail, sinking current

Output to negative rail, sourcing current

Voltage output swing from positive rail

15

11

3

SC

V

24

25

24

25

OH

V

Voltage output swing from negative rail

3

OL

AC CHARACTERISTICS

Unity Gain Bandwidth

Slew Rate at Unity Gain

Phase Margin

UGBW

SR

1.2

0.4

60

18

5

MHz

V/ms

°

V

= 2.5 Vpp, Gain = 1

IN

y

m

Gain Margin

A

dB

ms

m

S

Settling Time

t

V

IN

= 2.5 Vpp,

Settling time to 0.1%

Settling time to 0.01%

Gain = 1

6

Open Loop Output Impedance

NOISE CHARACTERISTICS

Total Harmonic Distortion plus Noise

Input Referred Voltage Noise

Z

f = 100 Hz

0.8

W

OL

THD+N

V

IN

= 2.5 Vpp, f = 1 kHz, Av = 1

f = 1 kHz

0.005

30

%

e

nV/√Hz

n

f = 10 kHz

24

Input Referred Current Noise

SUPPLY CHARACTERISTICS

Power Supply Rejection Ratio

i

f = 1 kHz

300

fA/√Hz

dB

n

PSRR

No Load

67

90

42

64

Power Supply Quiescent Current

I

Per channel, no load

60

mA

DD

9. Performance guaranteed over the indicated operating temperature range by design and/or characterization.

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6

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

ELECTRICAL CHARACTERISTICS AT V_S= 5.5 V

T = 25°C; R ≥ 10 kW; V

= V

= mid−supply unless otherwise noted.

A

L

CM

OUT

Boldface limits apply over the specified temperature range, T = −40°C to 125°C. (Note 10)

A

Parameter

INPUT CHARACTERISTICS

Input Offset Voltage

Symbol

Conditions

Min

Typ

Max

Unit

V

OS

0.5

3.5

mV

mV/°C

pA

4

Offset Voltage Drift

DV /DT

1

OS

Input Bias Current (Note 10)

I

IB

1500

1100

pA

Input Offset Current (Note 10)

I

1

pA

OS

pA

Channel Separation

XTLK

DC

125

10

1

dB

Differential Input Resistance

Common Mode Input Resistance

Differential Input Capacitance

Common Mode Input Capacitance

Common Mode Rejection Ratio

R

C

GW

pF

ID

IN

ID

C

5

pF

CM

CMRR

V

= V – 0.2 to V + 0.2

55

79

dB

CM

SS

DD

= V + 0.2 to V − 0.2

51

CM

SS

DD

OUTPUT CHARACTERISTICS

Open Loop Voltage Gain

A

90

120

dB

mA

mV

VOL

86

Short Circuit Current

Output Voltage High

Output Voltage Low

I

Output to positive rail, sinking current

Output to negative rail, sourcing current

Voltage output swing from positive rail

15

11

3

SC

V

24

25

24

25

OH

V

Voltage output swing from negative rail

3

OL

AC CHARACTERISTICS

Unity Gain Bandwidth

Slew Rate at Unity Gain

Phase Margin

UGBW

SR

1.2

0.4

60

17

5

MHz

V/ms

°

V

= 5 Vpp, Gain = 1

ID

y

m

Gain Margin

A

dB

ms

m

S

Settling Time

t

V

IN

= 5 Vpp,

Settling time to 0.1%

Settling time to 0.01%

f = 100 Hz

Gain = 1

6

Open Loop Output Impedance

NOISE CHARACTERISTICS

Total Harmonic Distortion plus Noise

Input Referred Voltage Noise

Z

OL

0.8

W

THD+N

V

IN

= 5 Vpp, f = 1 kHz, Av = 1

f = 1 kHz

0.005

30

%

e

n

nV/√Hz

f = 10 kHz

24

Input Referred Current Noise

SUPPLY CHARACTERISTICS

Power Supply Rejection Ratio

i

f = 1 kHz

300

fA/√Hz

dB

n

PSRR

No Load

67

90

48

64

Power Supply Quiescent Current

I

Per channel, no load

70

mA

DD

10.Performance guaranteed over the indicated operating temperature range by design and/or characterization.

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

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7

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

TYPICAL PERFORMANCE CHARACTERISTICS

T = 25°C, R ≥ 10 kW, V

= V

= mid−supply unless otherwise specified

A

L

CM

OUT

60

50

40

30

20

60

V

S

= 3.3 V

T = 125°C

50

40

30

20

V

= 5.5 V

= 1.8 V

S

T = 25°C

T = −40°C

S

10

0

10

0

1.5 2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

−40 −20

0

20

40

60

80

100 120 140

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

Figure 2. Quiescent Current per Channel vs.

Supply Voltage

Figure 3. Quiescent Current vs. Temperature

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.8

0.7

V

= 1.8 V

S

T = −40°C

T = 25°C

V

S

= 3.3 V

0.6

0.5

0.4

V

S

= 5.5 V

T = 125°C

0.3

0.2

0.1

0

0.1

0

1.5 2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

−40 −20

0

20

40

60

80 100 120 140

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

Figure 4. Offset Voltage vs. Supply Voltage

Figure 5. Offset Voltage vs. Temperature

4

3

2

1

140

120

100

80

180

V

= 5.5 V

S

10 units

Gain

135

90

Phase Margin

60

0

−1

40

R = 10 kW

−2

20

45

0

L

C = 15 pF

L

−3

−4

0

T = 25°C

−20

−2.75 −2.00 −1.25 −0.50

0

0.50

1.25

2.00 2.75

1

10

100

1k

10k 100k 1M

FREQUENCY (Hz)

10M 100M

COMMON MODE VOLTAGE (V)

Figure 6. Offset Voltage vs. Common Mode

Voltage

Figure 7. Open−loop Gain and Phase Margin

vs. Frequency

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8

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

TYPICAL PERFORMANCE CHARACTERISTICS

T = 25°C, R ≥ 10 kW, V

= V

= mid−supply unless otherwise specified

A

L

CM

OUT

60

50

40

30

20

100

V

= 5.5 V

V

f

= 5.5 V

= 1 kHz

S

R = 10 kW

T = 25°C

L

IN

10

1

A = 1

V

0.1

0.01

0.001

10

0

0.0001

0

100

200

300

400

500

0.01

0.1

1

CAPACITIVE LOAD (pF)

OUTPUT VOLTAGE (Vpp)

Figure 8. Phase Margin vs. Capacitive Load

Figure 9. THD + N vs. Output Voltage

1

600

500

400

A = 1

V

S

= 5.5 V

V

S

= 1.8 V

0.1

V

= 3.3 V

S

300

200

V

S

= 5.5 V

0.01

100

0

0.001

10

100

1k

FREQUENCY (Hz)

10k

100k

1

10

100

1k

10k

100k

FREQUENCY (Hz)

Figure 10. THD + N vs. Frequency

Figure 11. Input Voltage Noise vs. Frequency

900

800

700

600

500

400

300

200

120

100

80

V

= 5.5 V, PSRR+

S

V

S

= 5.5 V

V

S

= 5.5 V, PSRR−

V

S

= 1.8 V, PSRR+

= 1.8 V, PSRR−

V

S

60

40

20

0

100

0

1

10

100

1k

10k

100k

10

100

1k

10k

100k

1M

FREQUENCY (Hz)

Figure 12. Input Current Noise vs. Frequency

Figure 13. PSRR vs. Frequency

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9

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

TYPICAL PERFORMANCE CHARACTERISTICS

T = 25°C, R ≥ 10 kW, V

= V

= mid−supply unless otherwise specified

A

L

CM

OUT

120

100

80

500

V

S

= 1.8 V

A = 1

V

= 5.5 V

= 1.8 V

S

400

300

200

V

S

= 3.3 V

V

S

60

V

= 3.3 V

= 5.5 V

S

40

S

100

0

20

0

10

100

1k

10k

100k

1M

0

2

4

6

8

10

12

FREQUENCY (Hz)

OUTPUT CURRENT (mA)

Figure 14. CMRR vs. Frequency

Figure 15. Output Voltage High to Rail

500

400

300

200

0.10

0.08

0.06

V

S

= 1.8 V

Input

C = 10 pF

L

C = 100 pF

L

0.04

0.02

0

V

= 3.3 V

= 5.5 V

S

−0.02

−0.04

−0.06

V

S

100

0

−0.08

−0.10

0

2.5

5.0

7.5

10.0

12.5

15.0

−2

−1

0

1

2

3

4

5

6

OUTPUT CURRENT (mA)

TIME (ms)

Figure 16. Output Voltage Low to Rail

Figure 17. Non−Inverting Small Signal

Transient Response

0.10

0.08

0.06

0.04

0.02

0

1.0

Input

Output

0.8

0.6

C = 10 pF

L

C = 100 pF

L

0.4

0.2

0

−0.2

−0.4

−0.6

−0.02

−0.04

−0.06

−0.8

−1.0

−5.0 −2.5

−0.08

−0.10

−2

−1

0

1

2

3

4

5

6

0

2.5 5.0 7.5 10.0 12.5 15.0 17.5

TIME (ms)

Figure 18. Inverting Small Signal Transient

Response

Figure 19. Non−Inverting Large Signal

Transient Response

www.onsemi.com

10

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

TYPICAL PERFORMANCE CHARACTERISTICS

T = 25°C, R ≥ 10 kW, V

= V = mid−supply unless otherwise specified

A

L

CM

OUT

2.0

1.5

1.0

0.5

0

600

500

Input

Output

I

IB+

400

I

IB−

300

200

100

−0.5

I

OS

−1.0

0

−1.5

−2.0

−100

−2.5

0

2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0

−40 −20

0

20

40

60

80

100 120 140

TIME (ms)

TEMPERATURE (°C)

Figure 20. Inverting Large Signal Transient

Response

Figure 21. Input Bias and Offset Current vs.

Temperature

6

4

6

4

I

IB+

2

0

I

IB−

0

I

OS

−2

−4

−6

−4

−6

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5

COMMON MODE VOLTAGE (V)

0

1

2

3

4

5

6

7

8

9

10

TIME (s)

Figure 22. Input Bias Current vs. Common

Mode Voltage

Figure 23. 0.1 Hz to 10 Hz Noise

−60

−80

10k

1k

A = 1

V

S

= 1.8 V

100

10

1

−100

V

S

= 5.5 V

−120

−140

0.1

0.01

100

1k

10k

100k

1M

10M

10

100

1k

10k

100k

1M

FREQUENCY (Hz)

Figure 24. Channel Separation vs. Frequency

Figure 25. Output Impedance vs. Frequency

www.onsemi.com

11

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

TYPICAL PERFORMANCE CHARACTERISTICS

T = 25°C, R ≥ 10 kW, V

= V

= mid−supply unless otherwise specified

A

L

CM

OUT

0.6

0.5

0.4

0.3

SR+

SR−

0.2

0.1

0

−40 −20

0

20

40

60

80 100 120 140

TEMPERATURE (°C)

Figure 26. Slew Rate vs. Temperature

www.onsemi.com

12

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

PACKAGE DIMENSIONS

SC−88A (SC−70−5/SOT−353)

CASE 419A−02

ISSUE L

A

NOTES:

1. DIMENSIONING AND TOLERANCING

PER ANSI Y14.5M, 1982.

G

2. CONTROLLING DIMENSION: INCH.

3. 419A−01 OBSOLETE. NEW STANDARD

419A−02.

4. DIMENSIONS A AND B DO NOT INCLUDE

MOLD FLASH, PROTRUSIONS, OR GATE

BURRS.

5

4

3

−B−

S

INCHES

MILLIMETERS

DIM MIN

MAX

0.087

0.053

0.043

0.012

MIN

1.80

1.15

0.80

0.10

MAX

2.20

1.35

1.10

0.30

1

2

A

B

C

D

G

H

J

0.071

0.045

0.031

0.004

0.026 BSC

0.65 BSC

M

B

D 5 PL

0.2 (0.008)

---

0.004

0.010

0.012

---

0.10

0.25

0.30

K

N

S

N

0.008 REF

0.20 REF

0.079

0.087

2.00

2.20

J

C

K

H

SOLDER FOOTPRINT

0.50

0.0197

0.65

0.025

0.65

0.025

0.40

0.0157

1.9

0.0748

mm

inches

ǒ

Ǔ

SCALE 20:1

www.onsemi.com

13

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

PACKAGE DIMENSIONS

TSOP−5

CASE 483

ISSUE L

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME

Y14.5M, 1994.

NOTE 5

5X

D

2. CONTROLLING DIMENSION: MILLIMETERS.

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH

THICKNESS. MINIMUM LEAD THICKNESS IS THE

MINIMUM THICKNESS OF BASE MATERIAL.

4. DIMENSIONS A AND B DO NOT INCLUDE MOLD

FLASH, PROTRUSIONS, OR GATE BURRS. MOLD

FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT

EXCEED 0.15 PER SIDE. DIMENSION A.

5. OPTIONAL CONSTRUCTION: AN ADDITIONAL

TRIMMED LEAD IS ALLOWED IN THIS LOCATION.

TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2

FROM BODY.

0.20 C A B

2X

0.10

T

M

5

4

3

2X

0.20

T

B

S

1

2

K

B

A

DETAIL Z

G

A

MILLIMETERS

TOP VIEW

DIM

A

B

MIN

3.00 BSC

1.50 BSC

MAX

DETAIL Z

C

D

0.90

0.25

1.10

0.50

J

G

H

J

K

M

S

0.95 BSC

C

0.01

0.10

0.20

0

0.10

0.26

0.60

0.05

H

SEATING

PLANE

END VIEW

C

10

_

SIDE VIEW

2.50

3.00

SOLDERING FOOTPRINT*

1.9

0.074

0.95

0.037

2.4

0.094

1.0

0.039

0.7

0.028

mm

inches

ǒ

Ǔ

SCALE 10:1

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

www.onsemi.com

14

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

PACKAGE DIMENSIONS

UDFN6 1.6x1.6, 0.5P

CASE 517AP

ISSUE O

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

A

D

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b APPLIES TO PLATED TERMINAL

AND IS MEASURED BETWEEN 0.15 AND

0.30 mm FROM TERMINAL.

B

2X

L

0.10

C

L1

4. COPLANARITY APPLIES TO THE EXPOSED

PAD AS WELL AS THE TERMINALS.

PIN ONE

E

DETAIL A

REFERENCE

OPTIONAL

MILLIMETERS

CONSTRUCTION

DIM MIN

0.45

A1 0.00

MAX

0.55

0.05

2X

A

0.10

C

MOLD CMPD

EXPOSED Cu

A3

b

0.13 REF

TOP VIEW

0.20

0.30

D

E

e

1.60 BSC

0.50 BSC

A3

A

(A3)

DETAIL B

D2 1.10

E2 0.45

1.30

0.65

−−−

0.40

0.15

0.05

C

A1

K

L

0.20

DETAIL B

OPTIONAL

CONSTRUCTION

6X

L1 0.00

SIDE VIEW

SEATING

PLANE

C

A1

SOLDERMASK DEFINED

MOUNTING FOOTPRINT*

DETAIL A

6X L

D2

1.26

3

1

E2

6X

0.52

0.61 1.90

6

5

6X K

6X b

0.10 C A B

e

NOTE 3

C

1

0.05

BOTTOM VIEW

0.50 PITCH

6X

0.32

DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

www.onsemi.com

15

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

PACKAGE DIMENSIONS

Micro8t

CASE 846A−02

ISSUE J

D

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE

BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED

0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.

INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.

5. 846A-01 OBSOLETE, NEW STANDARD 846A-02.

H

E

MILLIMETERS

INCHES

NOM

−−

0.003

0.013

0.007

0.118

DIM

A

A1

b

c

D

MIN

−−

NOM

−−

MAX

MIN

−−

MAX

0.043

0.006

0.016

0.009

0.122

PIN 1 ID

e

1.10

0.15

0.40

0.23

3.10

b 8 PL

0.05

0.25

0.13

2.90

0.08

0.002

0.010

0.005

0.114

0.33

M

S

0.08 (0.003)

T B

A

0.18

3.00

E

3.00

0.118

e

L

0.65 BSC

0.55

4.90

0.026 BSC

0.021

0.193

SEATING

PLANE

0.40

4.75

0.70

5.05

0.016

0.187

0.028

0.199

−T−

H

E

A

0.038 (0.0015)

L

A1

c

RECOMMENDED

SOLDERING FOOTPRINT*

8X

0.48

0.80

5.25

0.65

PITCH

DIMENSION: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

www.onsemi.com

16

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

PACKAGE DIMENSIONS

SOIC−8 NB

CASE 751−07

ISSUE AK

NOTES:

1. DIMENSIONING AND TOLERANCING PER

−X−

ANSI Y14.5M, 1982.

A

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE

MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)

PER SIDE.

8

5

4

5. DIMENSION D DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.127 (0.005) TOTAL

IN EXCESS OF THE D DIMENSION AT

MAXIMUM MATERIAL CONDITION.

6. 751−01 THRU 751−06 ARE OBSOLETE. NEW

STANDARD IS 751−07.

S

M

B

0.25 (0.010)

Y

1

K

−Y−

MILLIMETERS

DIM MIN MAX

INCHES

G

MIN

MAX

0.197

0.157

0.069

0.020

A

B

C

D

G

H

J

K

M

N

S

4.80

3.80

1.35

0.33

5.00 0.189

4.00 0.150

1.75 0.053

0.51 0.013

C

N X 45

_

SEATING

PLANE

1.27 BSC

0.050 BSC

−Z−

0.10

0.19

0.40

0

0.25 0.004

0.25 0.007

1.27 0.016

0.010

0.050

8

0.020

0.244

0.10 (0.004)

M

J

H

D

8

0

_

0.25

5.80

0.50 0.010

6.20 0.228

M

S

X

0.25 (0.010)

Z

Y

STYLE 11:

PIN 1. SOURCE 1

2. GATE 1

3. SOURCE 2

4. GATE 2

5. DRAIN 2

6. DRAIN 2

7. DRAIN 1

8. DRAIN 1

SOLDERING FOOTPRINT*

1.52

0.060

7.0

4.0

0.275

0.155

0.6

0.024

1.270

0.050

mm

inches

ǒ

Ǔ

SCALE 6:1

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

www.onsemi.com

17

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

PACKAGE DIMENSIONS

TSSOP−8

CASE 948S

ISSUE C

8x K REF

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

M

S

V

0.10 (0.004)

T U

S

0.20 (0.008) T U

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.

PROTRUSIONS OR GATE BURRS. MOLD FLASH

OR GATE BURRS SHALL NOT EXCEED 0.15

(0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE INTERLEAD

FLASH OR PROTRUSION. INTERLEAD FLASH OR

PROTRUSION SHALL NOT EXCEED 0.25 (0.010)

PER SIDE.

5. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

6. DIMENSION A AND B ARE TO BE DETERMINED

AT DATUM PLANE -W-.

8

5

4

2X L/2

B

−U−

J

J1

L

1

PIN 1

IDENT

K1

K

S

0.20 (0.008) T U

A

SECTION N−N

−V−

MILLIMETERS

INCHES

MIN

0.114

DIM MIN

MAX

0.122

0.177

0.043

0.006

0.028

A

B

2.90

4.30

---

3.10

−W−

4.50 0.169

1.10 ---

C

0.076 (0.003)

D

0.05

0.50

0.15 0.002

0.70 0.020

F

DETAIL E

SEATING

D

−T−

G

J

0.65 BSC

0.026 BSC

PLANE

0.09

0.19

0.20 0.004

0.16 0.004

0.30 0.007

0.25 0.007

0.008

0.006

0.012

0.010

J1

K

0.25 (0.010)

N

K1

L

6.40 BSC

0.252 BSC

0

M

0

8

_

N

F

DETAIL E

www.onsemi.com

18

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

PACKAGE DIMENSIONS

SOIC−14 NB

CASE 751A−03

ISSUE K

NOTES:

D

A

B

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE PROTRUSION

SHALL BE 0.13 TOTAL IN EXCESS OF AT

MAXIMUM MATERIAL CONDITION.

4. DIMENSIONS D AND E DO NOT INCLUDE

MOLD PROTRUSIONS.

14

8

7

A3

E

H

5. MAXIMUM MOLD PROTRUSION 0.15 PER

SIDE.

L

DETAIL A

1

MILLIMETERS

DIM MIN MAX

INCHES

MIN MAX

13X b

M

B

0.25

A

A1

A3

b

D

E

1.35

0.10

0.19

0.35

8.55

3.80

1.75 0.054 0.068

0.25 0.004 0.010

0.25 0.008 0.010

0.49 0.014 0.019

8.75 0.337 0.344

4.00 0.150 0.157

M

S

B

0.25

C A

DETAIL A

h

A

X 45

_

e

H

h

L

1.27 BSC

0.050 BSC

6.20 0.228 0.244

0.50 0.010 0.019

1.25 0.016 0.049

5.80

0.25

0.40

0

M

A1

e

M

7

0

7

_

SEATING

PLANE

C

SOLDERING FOOTPRINT*

6.50

14X

1.18

1

1.27

PITCH

14X

0.58

DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

www.onsemi.com

19

NCS20081, NCV20081, NCS20082, NCV20082, NCS20084, NCV20084

PACKAGE DIMENSIONS

TSSOP−14

CASE 948G

ISSUE B

NOTES:

14X K REF

1. DIMENSIONING AND TOLERANCING PER

M

S

V

ANSI Y14.5M, 1982.

0.10 (0.004)

T U

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD

FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH OR GATE BURRS SHALL NOT

EXCEED 0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE

INTERLEAD FLASH OR PROTRUSION.

INTERLEAD FLASH OR PROTRUSION SHALL

NOT EXCEED 0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.08 (0.003) TOTAL

IN EXCESS OF THE K DIMENSION AT

MAXIMUM MATERIAL CONDITION.

S

0.15 (0.006) T U

N

0.25 (0.010)

14

8

2X L/2

M

B

−U−

L

N

PIN 1

IDENT.

F

7

1

6. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

DETAIL E

7. DIMENSION A AND B ARE TO BE

DETERMINED AT DATUM PLANE −W−.

S

K

0.15 (0.006) T U

A

MILLIMETERS

DIM MIN MAX

INCHES

MIN MAX

K1

−V−

A

B

C

D

F

4.90

4.30

−−−

0.05

0.50

5.10 0.193 0.200

4.50 0.169 0.177

J J1

1.20

−−− 0.047

0.15 0.002 0.006

0.75 0.020 0.030

SECTION N−N

G

H

J

J1

K

0.65 BSC

0.026 BSC

0.60 0.020 0.024

0.20 0.004 0.008

0.16 0.004 0.006

0.30 0.007 0.012

0.25 0.007 0.010

0.50

0.09

0.19

−W−

C

K1 0.19

L

M

6.40 BSC

0.252 BSC

0.10 (0.004)

0

8

0

8

_

SEATING

−T−

H

G

DETAIL E

D

PLANE

SOLDERING FOOTPRINT

7.06

1

0.65

PITCH

14X

0.36

14X

1.26

DIMENSIONS: MILLIMETERS

Micro8 is a trademark of International Rectifier

ON Semiconductor and

are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent

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ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,

regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or

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LITERATURE FULFILLMENT:

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Email: orderlit@onsemi.com

For additional information, please contact your local

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◊

NCS2008/D

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20

型号:	NCS20081SN2T1G
Brand Name：	ON Semiconductor
是否无铅：	不含铅
生命周期：	Active
IHS 制造商：	ON SEMICONDUCTOR
包装说明：	SOT-23, TSOP-5
制造商包装代码：	483-02
Reach Compliance Code：	compliant
Factory Lead Time：	1 week
风险等级：	2.02
放大器类型：	OPERATIONAL AMPLIFIER
架构：	VOLTAGE-FEEDBACK
最大平均偏置电流 (IIB)：	0.0015 µA
最小共模抑制比：	53 dB
标称共模抑制比：	76 dB
频率补偿：	NO
最大输入失调电流 (IIO)：	0.0011 µA
最大输入失调电压：	4000 µV
JESD-30 代码：	R-PDSO-G5
JESD-609代码：	e3
长度：	3 mm
低-偏置：	YES
低-失调：	NO
微功率：	YES
湿度敏感等级：	1
功能数量：	1
端子数量：	5
最高工作温度：	25 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	TSOP
封装等效代码：	TSOP5/6,.11,37
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE
峰值回流温度（摄氏度）：	260
功率：	NO
可编程功率：	NO
座面最大高度：	1.1 mm
标称压摆率：	0.4 V/us
子类别：	Operational Amplifier
最大压摆率：	0.07 mA
供电电压上限：	6 V
标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES
温度等级：	AUTOMOTIVE
端子面层：	Tin (Sn)
端子形式：	GULL WING
端子节距：	0.95 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	20
标称均一增益带宽：	1200 kHz
最小电压增益：	19952.62
宽带：	NO
宽度：	1.5 mm

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