欢迎访问ic37.com |
会员登录 免费注册
发布采购
所在地: 型号: 精确
  • 批量询价
  •  
  • 供应商
  • 型号
  • 数量
  • 厂商
  • 封装
  • 批号
  • 交易说明
  • 询价
更多
  • NSD-1202-ASST图
  • 深圳市欧立现代科技有限公司

     该会员已使用本站12年以上
  • NSD-1202-ASST
  • 数量3800 
  • 厂家ams 
  • 封装16-VQFN 
  • 批号24+ 
  • 授权分销 现货热卖
  • QQ:1950791264QQ:1950791264 复制
    QQ:2216987084QQ:2216987084 复制
  • 0755-83222787 QQ:1950791264QQ:2216987084
  • NSD-1202-ASST图
  • 北京齐天芯科技有限公司

     该会员已使用本站15年以上
  • NSD-1202-ASST
  • 数量5600 
  • 厂家ams 
  • 封装16-QFN(4x4) 
  • 批号2024+ 
  • 原装正品,假一罚十
  • QQ:2880824479QQ:2880824479 复制
    QQ:1344056792QQ:1344056792 复制
  • 010-62104931 QQ:2880824479QQ:1344056792
  • NSD-1202-ASST图
  • 深圳市惊羽科技有限公司

     该会员已使用本站11年以上
  • NSD-1202-ASST
  • 数量6328 
  • 厂家AMS-艾迈斯 
  • 封装QFN-16 
  • 批号▉▉:2年内 
  • ▉▉¥20.5元一有问必回一有长期订货一备货HK仓库
  • QQ:43871025QQ:43871025 复制
  • 131-4700-5145---Q-微-恭-候---有-问-秒-回 QQ:43871025
  • NSD-1202-ASST图
  • 深圳市一线半导体有限公司

     该会员已使用本站11年以上
  • NSD-1202-ASST
  • 数量8515 
  • 厂家ams 
  • 封装 
  • 批号 
  • 全新原装部分现货其他订货
  • QQ:2881493920QQ:2881493920 复制
    QQ:2881493921QQ:2881493921 复制
  • 0755-88608801多线 QQ:2881493920QQ:2881493921
  • NSD-1202图
  • 深圳市一线半导体有限公司

     该会员已使用本站16年以上
  • NSD-1202
  • 数量9205 
  • 厂家ams 
  • 封装 
  • 批号 
  • 全新原装部分现货其他订货
  • QQ:2881493920QQ:2881493920 复制
    QQ:2881493921QQ:2881493921 复制
  • 0755-88608801多线 QQ:2881493920QQ:2881493921
  • NSD-1202图
  • 万三科技(深圳)有限公司

     该会员已使用本站2年以上
  • NSD-1202
  • 数量6500000 
  • 厂家艾迈斯 
  • 封装原厂原装 
  • 批号22+ 
  • 万三科技 秉承原装 实单可议
  • QQ:3008962483QQ:3008962483 复制
  • 0755-23763516 QQ:3008962483
  • NSD-1202图
  • 深圳市科雨电子有限公司

     该会员已使用本站9年以上
  • NSD-1202
  • 数量1001 
  • 厂家AMS 
  • 封装QFN-16 
  • 批号21+ 
  • ★体验愉快问购元件!!就找我吧!《停产物料》
  • QQ:1415691092QQ:1415691092 复制
  • 133-5299-5145(微信同号) QQ:1415691092
  • NSD-1202-ASST图
  • 深圳市科雨电子有限公司

     该会员已使用本站9年以上
  • NSD-1202-ASST
  • 数量3854 
  • 厂家AMS 
  • 封装QFN-16 
  • 批号21+ 
  • ★体验愉快问购元件!!就找我吧!单价:41元
  • QQ:97877805QQ:97877805 复制
  • 171-4729-0036(微信同号) QQ:97877805

产品型号NSD-1202的Datasheet PDF文件预览

Data Sheet  
NSD-1202  
Dual Piezo Motor Driver IC for SQL Series  
SQUIGGLE Motors  
1 General Description  
The NSD-1202 is a dedicated piezo motor driver ASIC capable of  
driving two SQL Series SQUIGGLE motors from a single 2.8 to 5.5  
VDC supply.  
2 Key Features  
Wide Input Supply Voltage Range: 2.8 to 5.5VDC  
Step-up converter to generate programmable high-voltage  
power supply (24 to 40V)  
The two motors can be controlled independently using a standard  
I²C interface.  
Minimum 65% efficiency (at VDD=2.8V, IOUT=25mA,  
freq=2MHz)  
An on-chip DC-DC step-up converter generates the high supply  
voltage (24 to 40 VDC) required by the piezoelectric elements of the  
SQUIGGLE motor.  
4x output driver with defined rise/fall time  
I²C interface  
On chip registers store driver instructions  
Power-down mode for minimal power consumption in stand-by  
Small 4x4mm 16-Pin QFN Package  
Four half bridge drivers create pairs of phase-shifted square waves  
with ultrasonic frequency as required to drive SQL Series  
SQUIGGLE motors.  
This part supersedes and is backward-compatible with the NSD-  
1102.  
3 Applications  
Figure 1. NSD-1202 Functional Block Diagram  
The NSD-1202 is ideal for SQUIGGLE piezoelectric motor driver.  
L1  
VIN (2.8-5.5V)  
VDDH (programmable 24V...40V)  
4.7µH  
C2  
D1  
C1  
22µF  
1µF  
LX  
VDDH  
VDD (2.8-5.5V)  
XPD  
TRIM  
Step-up  
controller  
Voltage  
reference  
VSS  
VSSP  
NSD-1202  
SDA  
SCL  
ADR  
I²C Interface  
Registers  
Level-  
shifter  
1
1
1
1
DRV2P1  
DRV2P2  
Level-  
shifter  
CLK  
LOGIC  
Level-  
shifter  
DRV1P1  
DRV1P2  
Level-  
shifter  
www.austriamicrosystems.com  
Revision 0.1  
1 - 13  
NSD-1202  
Data Sheet - Pin Assignments  
4 Pin Assignments  
Figure 2. Pin Assignments (Top View)  
16  
15  
14  
13  
VDDH  
ADR  
12  
11  
10  
9
NC  
NC  
1
2
3
4
NSD-1202  
LX  
VSSP  
XPD  
VDD  
5
6
7
8
4.1 Pin Descriptions  
Table 1. Pin Descriptions  
Pin Name  
VDDH  
ADR  
Pin Number  
Pin Type  
Supply pad  
Digital input  
Analog I/O  
Character  
Power  
Input  
Description  
High Voltage Supply  
Slave address input  
1
2
3
4
5
6
Power Output to Inductor  
Low Voltage Supply  
Signal Ground  
LX  
Output  
Power  
GND  
VDD  
Supply pad  
Digital input  
VSS  
20MHz Clock input  
CLK  
Input  
SDA1  
Data IO  
7
8
Digital I/O  
BiDir  
SCL1  
XPD  
Data clock (400 kHz Max)  
Power Down, active low  
9
Digital input  
Supply pad  
Digital I/O  
Input  
GND  
Power Ground  
VSSP  
10  
11  
12  
13  
14  
15  
16  
Test mode pin, connect to VSS  
Test IO pin, connect to VSS  
Half Bridge 1 Phase2 Output  
Half Bridge 1 Phase 1 Output  
Half Bridge 2 Phase2 Output  
Half Bridge 2 Phase1 Output  
NC11  
BiDir  
NC12  
DRV1P2  
DRV1P1  
DRV2P2  
DRV2P1  
Analog I/O  
Output  
1. SDA (Data IO) and SCL (Data clock) constitute an I²C interface. Both have open drain outputs.  
www.austriamicrosystems.com  
Revision 0.1  
2 - 13  
NSD-1202  
Data Sheet - Absolute Maximum Ratings  
5 Absolute Maximum Ratings  
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of  
the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 4 is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect device reliability.  
Table 2. Absolute Maximum Ratings  
Symbol  
VVDD  
Parameter  
Min  
-0.3  
-0.3  
Typ  
Max  
7
Units  
Comments  
Voltage at low voltage supply pin  
Voltage at high voltage supply pin  
V
V
Internal 3.3V supply (VDDA)  
High voltage supply  
VVDDH  
50  
VVDDH+0  
.3  
VLX  
Voltage at LX pin  
-0.6  
V
VLV  
Iscr  
Voltage at CLK, SDA, SCL, XPD  
Input current (latchup immunity)  
-0.3  
-50  
7
V
Low voltage pads  
Norm: Jedec 78  
50  
mA  
Norm: MIL 883 E method 3015  
Human body model: R=1.5kΩ, C=100pF  
ESD  
Electrostatic discharge  
±1  
kV  
Ptot  
Rthja  
Tstrg  
Total power dissipation  
Thermal resistance QFN16 4x4mm  
Storage temperature  
1
W
K/W  
ºC  
29.7  
-40  
33  
36.3  
150  
Norm: IPC/JEDEC J-STD-020C.  
The reflow peak soldering temperature  
(body temperature) specified is in  
accordance with IPC/JEDEC J-STD-020C  
“Moisture/Reflow Sensitivity Classification  
for Non-Hermetic Solid State Surface  
Mount Devices”.  
Tbody  
Soldering temperature  
260  
85  
ºC  
%
Humidity non-condensing  
5
www.austriamicrosystems.com  
Revision 0.1  
3 - 13  
NSD-1202  
Data Sheet - Electrical Characteristics  
6 Electrical Characteristics  
Table 3. Operating Conditions  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
VDD rise time is between 10µs and  
100ms  
VVDD  
Voltage at VDD  
2.8  
5.5  
V
Voltage at VDDH  
Voltage at LX pin  
VVDDH  
VLX  
High voltage supply  
24  
-0.6  
-0.3  
0
40  
V
V
V
VDDH +0.3  
VVSSP  
VVSS  
VLV  
Voltage at VSSP  
GND reference for step up converter  
GND reference potential  
Low voltage pads  
0.3  
0
V
Voltage at VSS  
V
Voltage at CLK, SDA,SCL, XPD  
Ambient temperature  
-0.3  
-40  
5.5  
85  
V
TAMB  
ºC  
6.1 Electrical System Specifications  
All system parameters are guaranteed up to 125ºC junction temperature unless explicitly mentioned.  
Table 4. Electrical System Specifications  
Parameter  
VDD  
Conditions  
Min  
2.8  
-40  
-40  
Typ  
Max  
5.5  
Units  
V
3.3  
Ambient temperature  
Junction temperature  
+85  
+125  
ºC  
ºC  
XPD=LOW, temp=27ºC; No activity on I²C  
interface and CLK static  
Stand-by current consumption  
Operating current consumption  
5
μA  
XPD=HIGH, Step-up converter on but  
NOT RUNNING A MOTOR  
1.5  
mA  
Output Voltage (VDDH)  
Output Voltage (VDDH) steps  
Output Voltage accuracy  
Hysteresis  
Default value is 35V after start-up  
24  
40  
V
V
0.5  
0.5  
-6  
+6  
0.675  
25  
%
V
0.325  
Output current  
DC  
mA  
VIN=2.8V,  
Efficiency calculations assume the use of  
the components as specified in the  
Applications Description section (see  
page 6)  
Efficiency  
65  
%
www.austriamicrosystems.com  
Revision 0.1  
4 - 13  
NSD-1202  
Data Sheet - Electrical Characteristics  
6.2 DC/AC Characteristics for Digital Inputs and Outputs  
Table 5. CMOS Input: XPD, ADR, CLK  
Symbol  
VIH  
Parameter  
Conditions  
Min  
1.2  
Typ  
Max  
VDD  
0.3  
1
Units  
V
High level input voltage  
Low level input voltage  
Input leakage current  
Capacitive Load  
VIL  
VSS  
V
ILEAK  
CIN  
µA  
pF  
15  
Table 6. CMOS I²C Interface: SDA, SCL  
Symbol  
VIH  
Parameter  
Conditions  
Min  
1.2  
Typ  
Max  
VDD  
0.3  
1
Units  
V
High level input voltage  
Low level input voltage  
Input leakage current  
VIL  
VSS  
V
ILEAK  
µA  
VVDD  
-0.5  
Depending on external pull-up  
resistor  
High level output voltage  
VVDD  
VOH  
V
VOL  
CL  
Low level output voltage  
Capacitive load: SDA, SCL  
@3mA output current  
VSS+0.4  
50  
V
pF  
kΩ  
RPU  
External pull-up resistor: SDA, SCL  
As defined by I²C spec  
1.2  
6.0  
7.1  
Maximum clock frequency to write  
data  
I²C write frequency  
SCL  
400  
kHz  
www.austriamicrosystems.com  
Revision 0.1  
5 - 13  
NSD-1202  
Data Sheet - Detailed Description  
7 Detailed Description  
Figure 1 shows the main building blocks of the system:  
Voltage reference  
Step up converter  
I²C interface  
Registers  
Selectable feedback  
Four (4) half bridge drivers  
Supplementary blocks such as biasing or power-on reset are not shown. The step-up converter is built as a hysteretic step-up converter. The half  
bridge drivers operate rail to rail (VSSP to VDDH). User supplied external components C1, C2, L1 and D1 provide voltage boost and regulation.  
The output voltage can be programmed via the I²C interface in 0.5V steps between 24V and 40V. This voltage, along with the duty cycle (or pulse  
width) of the drive signal, determines the speed of the motor.  
Registers define the switching frequency of the motor, which can be dynamically adjusted from 140 KHz to 180 KHz for optimum motor  
performance. Other registers control motor direction and the number of pulses the motor is active (correlating to distance traveled). The XPD  
input enables a stand-by mode.  
7.1 Step Up Converter  
The internal switching converter, together with L1 and C2, form a step up DC/DC converter used to create the high level voltage VDDH in the  
range 24 to 40V. The switch includes an over-current detect circuit to ensure safe operation at all times. The output voltage can be programmed  
via I²C interface in steps of 0.5V from 24V to 40V. At power up the default output voltage is set to 35V.  
7.2 I²C  
The I²C interface is used to control the NSD-1202 and set the value of several registers. These registers will define the output voltage (by  
changing the resistive feedback divider) as well as the direction and duration of the output driver signals. The period count. duty cycle (or pulse  
width) and pulse count registers can be set separately for each motor.  
Start/Stop Condition: A HIGH to LOW transition on the SDA line while SCL is HIGH is the start condition for the bus. A LOW to HIGH transition  
on the SDA line while SCL is HIGH is the stop condition.  
Every byte put on the SDA line must be 8-bits long. Each byte must be followed by an acknowledge bit. Data is transferred with the most  
significant bit (MSB) first.  
Data transfer with acknowledge is obligatory. The acknowledge-related clock pulse is generated by the master. The receiver must pull down the  
SDA line during the acknowledge clock pulse. The NSD-1202 is a slave device on the bus. There are two different access modes:  
- Byte write  
- Page write  
The device can be addressed using 7-bit addressing. The first 6 bits are fixed. The last bit can be set via package pin. Provision will be made for  
data collision due to non-synchronization between the external clock and the internally generated clock.  
www.austriamicrosystems.com  
Revision 0.1  
6 - 13  
NSD-1202  
Data Sheet - Detailed Description  
7.3 Register Map  
The table below shows the registers which can be addressed over the I²C interface.  
Data Byte  
Description  
Address  
MSB  
LSB  
Period count A  
00h  
01h  
X
h
X
d
X
X
X
X
X
X
X
X
X
Pulse count A (high byte)1  
Pulse count A (low byte)  
Period count B  
02h  
03h  
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Pulse count B (high byte)1  
Pulse count B (low byte)  
Output voltage  
04h  
h
d
X
X
X
05h  
06h  
07h  
08h  
10h  
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Duty cycle A  
X
X
X
X
X
X
Duty cycle B  
Reserved register  
1. The master clock doubling bit (‘h’) of both registers 01h and 04h must set in order for the doubling to take affect (even if only driving one  
motor). Do not use clock doubling if the master clock has a frequency > 10 MHz.  
7.4 Output Drivers  
The output drivers operate rail to rail and are capable of driving a large capacitive load. In power-down mode the output drivers are pulled to  
ground. The same applies when the motor is off.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
Rise/fall time  
CLOAD 600pF  
25  
100  
250  
ns  
The load capacitance may be lower  
than 500pF but the lower the value  
the shorter the rise time.  
Load capacitance  
CLOAD  
500  
600  
700  
pF  
Switching frequency  
Switching frequency step  
Switching frequency duty cycle  
Duty cycle accuracy  
The accuracy of switching frequency  
and phase shift will be defined  
depending on master clock  
frequency; the given values are for  
20MHz master clock. Lower master  
clock frequencies give higher  
deviations. For Squiggle applications  
20MHz clock is required, 10 MHz can  
be used with the clock doubling  
feature.  
140  
0.98  
1
170  
180  
1.61  
50  
kHz  
kHz  
%
1.45  
-1  
+1  
%
Phase shift  
±90  
20  
deg  
Phase shift error  
±3  
20  
deg  
Clock doubling feature may be  
employed when using a 10MHz or  
less master clock frequency  
Master clock frequency (CLK)  
1
MHz  
www.austriamicrosystems.com  
Revision 0.1  
7 - 13  
NSD-1202  
Data Sheet - Detailed Description  
7.5 Period Counter  
The period counter is used to define the switching frequency of the motor. The pulse period is generated by dividing the clock input frequency by  
the given period counter value.  
The MSB of the high byte of the pulse counter (h) is used to enable the internal frequency doubler. This function should be used only for input  
clock frequencies of 10MHz or less. At 20MHz input clock a decimal period counter value of 111 gives an output frequency of 180.18 kHz. A  
period counter value of 112 results in a switching frequency of 178.75 kHz. This is equal to a maximum frequency step of 1.61 kHz. The  
frequency resolution gets better for lower output frequencies, assuming a fixed input clock frequency.  
The following table presents examples of the period counter and output switching frequency relationship. The values are given for 20MHz and  
10MHz clock input frequency. (At 10MHz the frequency doubler can be activated, which leads to the same results.)  
Period Counter Value  
0110 1111  
Typ  
Unit  
kHz  
kHz  
kHz  
kHz  
kHz  
kHz  
180.18  
178.57  
150.37  
149.25  
140.85  
139.86  
0111 0000  
1000 0101  
1000 0110  
1000 1110  
1000 1111  
7.6 Pulse Counter  
The pulse counter sets the number of pulses the motor should be active. Writing all zeros to the pulse counter stops the motor, even if the  
previous set counter value is not completed. All outputs are then low. The same is valid for power-down mode. Bit 6 of the high byte in the pulse  
counter (d) is used to set the direction of motor motion.  
Pulse Counter Value  
XXXX X000 0000 0000  
XXXX X100 0000 0000  
XXXX X111 1111 1111  
Typ  
0
Unit  
Conditions  
pulses  
pulses  
pulses  
Motor is off, driver outputs are low  
1024  
2047  
Maximum possible number of pulses  
7.7 Output Voltage Register  
This register is used to define the output voltage of the boost converter. The register value is directly transferred to the analog part. The default  
value for this register set during power up or power down (XPD = LOW) is equal to 35V nominal output voltage.  
Output Voltage Register  
0001 0001  
Typ  
24.0  
24.5  
31.0  
35.0  
39.5  
40.0  
Unit  
V
Conditions  
0001 0010  
V
0001 1111  
V
0010 0111  
V
Default value  
0011 0000  
V
0011 0001  
V
Varying the output voltage can be used to vary the speed of the motor. However, if two motors are being driven, both motors use a common  
output voltage and therefore one setting applies to both motors. To control the speed of two motors independently, use the Duty Cycle Register.  
www.austriamicrosystems.com  
Revision 0.1  
8 - 13  
NSD-1202  
Data Sheet - Detailed Description  
7.8 Duty Cycle Register  
A register is used to define the duty cycle (or pulse width) of the driver output signal for each motor. The register value is directly transferred to  
the analog part.  
Since changing the duty cycle will change the speed of the motor, this register can be used to control the speed of two motors independently.  
(Motor speed can also be controlled by varying the voltage; however, one setting applies to both motors. See the previous section, Output  
Voltage Register.)  
To provide motor independent speed control, the duty cycle may be adjusted from 50% (max speed) down to ~12% (minimum speed). A lower  
duty cycle could be used, but may not provide enough vibration amplitude to overcome the load.  
The default value for this register set during power up or power down (XPD = LOW) is equal to 00h. In this case the default duty cycle of 50% is  
generated. The resulting duty cycle and resolution of single steps is depending on the master clock frequency and the switching frequency of the  
driver output.  
In the following table an example for 20MHz clock input and 150kHz driver frequency is given. The value of the duty cycle register should not  
exceed 50% of the period counter value.  
Duty Cycle Register  
0000 0000  
Min  
Typ  
49.6/50.4  
0.8  
Max  
Unit  
%
0000 0001  
%
0000 1101  
9.8  
%
0001 1011  
20.3  
%
0010 1000  
30.1  
%
0011 0101  
39.8  
%
0100 0010  
49.6  
%
0100 0011  
50.4  
%
www.austriamicrosystems.com  
Revision 0.1  
9 - 13  
NSD-1202  
Data Sheet - Application Information  
8 Application Information  
The NSD-1202 is designed to drive two SQL-1.8 SQUIGGLE motors. Recommended external components are as follows:  
Component  
Description  
22µF Cap 6.3V  
1µF Cap 50V  
4.7µH Inductance  
Diode  
Manufacturer  
Part Number  
GRM21BR60J226ME39  
GRM21BR71H105KA12  
EPL2014-472  
WxLxH [mm]  
1.25x2.0x1.25  
1.25x2.0x1.25  
2.0x2.0x1.4  
C1  
C2  
L1  
www.murata.com  
www.coilcraft.com  
www.nxp.com  
D1  
PMEG6010CEJ  
1.25x2.5x0.80  
New Scale offers a convenient MC-33DB evaluation board which includes these components, along with input and motor connectors, to take full  
advantage of the NSD-1202 ASIC.  
The XPD input can be used to place the ASIC in stand-by mode for minimal current consumption when the motor is not moving. Alternatively, the  
designer can implement an external switch to power off the ASIC completely when the motor is not moving: the SQUIGGLE motor holds its  
position with the power off.  
L1  
VIN (2.8-5.5V)  
C1  
VDDH (programmable 24V...40V)  
4.7µH  
C2  
D1  
22µF  
1µF  
LX  
VDDH  
DRV1P1  
DRV1P2  
VDD (2.8-5.5V)  
XPD  
VSS  
VSSP  
SDA  
SCL  
ADR  
NSD-1202  
Dual Piezo Motor Driver  
DRV2P1  
DRV2P2  
DRV2P1  
DRV2P2  
CLK  
DRV1P1  
DRV1P2  
www.austriamicrosystems.com  
Revision 0.1  
10 - 13  
NSD-1202  
Data Sheet - Pack age Drawings and Markings  
9 Package Drawings and Markings  
The devices are available in a 16LD QFN (4x4mm) package.  
Figure 3. 16LD QFN (4x4mm) Package Drawings and Dimensions  
5
6
7
8
4
3
9
10  
2
11  
12  
#1  
16  
15  
14  
13  
Symbol  
Min  
Nom  
0.85  
Max  
Symbol  
Min  
Nom  
Max  
A
A1  
b
0.75  
0.95  
e
L
0.65 BSC  
0.50  
0.203 REF  
0.30  
0.40  
0.60  
0.10  
0.25  
0.35  
L1  
P
D
4.00 BSC  
4.00 BSC  
2.40  
45º BSC  
0.15  
E
aaa  
ccc  
D2  
E2  
2.30  
2.30  
2.50  
2.50  
0.10  
2.40  
Notes:  
1. Dimensioning and tolerancing conform to ASME Y14.5M-1994.  
2. All dimensions are in millimeters, angle is in degrees.  
3. Dimension b applies to metallized terminal and is measured between 0.25mm and 0.30mm from terminal tip. Dimension L1 represents  
terminal full back from package edge up to 0.1mm is acceptable.  
4. Coplanarity applies to the exposed heat slug as well as the terminal.  
5. Radius on terminal is optional.  
www.austriamicrosystems.com  
Revision 0.1  
11 - 13  
NSD-1202  
Data Sheet - Ordering Information  
10 Ordering Information  
The devices are available as the standard products shown in Table 7.  
Table 7. Ordering Information  
Ordering Code  
Description  
Delivery Form  
Package  
NSD-1202BQFT  
Dual Piezo Motor Driver IC  
Tape & Reel  
QFN-16 (4x4mm)  
Note: All products are RoHS compliant and Pb-free.  
Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect  
For further information and requests, please contact us mailto:sales@austriamicrosystems.com  
or find your local distributor at http://www.austriamicrosystems.com/distributor  
www.austriamicrosystems.com  
Revision 0.1  
12 - 13  
NSD-1202  
Data Sheet - Copyrights  
Copyrights  
Copyright © 1997-2009, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®.  
All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of  
the copyright owner.  
All products and companies mentioned are trademarks or registered trademarks of their respective companies.  
Disclaimer  
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale.  
austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding  
the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at  
any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for  
current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range,  
unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are  
specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100  
parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location.  
The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not  
be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use,  
interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing,  
performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of  
austriamicrosystems AG rendering of technical or other services.  
Contact Information  
Headquarters  
austriamicrosystems AG  
Tobelbaderstrasse 30  
A-8141 Unterpremstaetten, Austria  
Tel: +43 (0) 3136 500 0  
Fax: +43 (0) 3136 525 01  
For Sales Offices, Distributors and Representatives, please visit:  
http://www.austriamicrosystems.com/contact  
Contact Information  
New Scale Technologies, Inc.  
121 Victor Heights Parkway  
Victor, NY 14564  
Tel: +1 585 924 4450  
Fax: +1 585 924 4468  
sales@newscaletech.com  
www.newscaletech.com  
www.austriamicrosystems.com  
Revision 0.1  
13 - 13  
配单直通车
NSD03A10产品参数
型号:NSD03A10
生命周期:Obsolete
IHS 制造商:NIHON INTER ELECTRONICS CORP
包装说明:FLATPAK-2
针数:2
Reach Compliance Code:unknown
ECCN代码:EAR99
HTS代码:8541.10.00.80
风险等级:5.76
应用:GENERAL PURPOSE
配置:SINGLE
二极管元件材料:SILICON
二极管类型:RECTIFIER DIODE
最大正向电压 (VF):1 V
JESD-30 代码:R-PDSO-C2
最大非重复峰值正向电流:80 A
元件数量:1
相数:1
端子数量:2
最高工作温度:150 °C
最低工作温度:-40 °C
最大输出电流:1.57 A
封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE
认证状态:Not Qualified
最大重复峰值反向电压:100 V
最大反向电流:50 µA
子类别:Rectifier Diodes
表面贴装:YES
端子形式:C BEND
端子位置:DUAL
Base Number Matches:1
  •  
  • 供货商
  • 型号 *
  • 数量*
  • 厂商
  • 封装
  • 批号
  • 交易说明
  • 询价
批量询价选中的记录已选中0条,每次最多15条。
 复制成功!