OPA111芯片引脚定义引脚图及功能IC贸易商引脚图技术参数-中国IC网-芯三七

®

OPA111

Low Noise Precision Difet ^®

OPERATIONAL AMPLIFIER

FEATURES

APPLICATIONS

● LOW NOISE: 100% Tested, 8nV√Hz max

● PRECISION INSTRUMENTATION

(10kHz)

● DATA ACQUISITION

● LOW BIAS CURRENT: 1pA max

● LOW OFFSET: 250µV max

● TEST EQUIPMENT

● OPTOELECTRONICS

● LOW DRIFT: 1µV/°C max

● MEDICAL EQUIPMENT—CAT SCANNER

● RADIATION HARD EQUIPMENT

● HIGH OPEN-LOOP GAIN: 120dB min

● HIGH COMMON-MODE REJECTION:

100dB min

DESCRIPTION

The OPA111 is a precision monolithic dielectrically

isolated FET (Difet^®) operational amplifier. Outstand-

ing performance characteristics allow its use in the

most critical instrumentation applications.

Case and

Substrate

+V_CC

8

7

–In

Noise, bias current, voltage offset, drift, open-loop

gain, common-mode rejection, and power supply re-

jection are superior to BIFET^®amplifiers.

2

+In

3

Noise-Free Cascode^*

Very low bias current is obtained by dielectric isola-

tion with on-chip guarding.

Output

6

Laser trimming of thin-film resistors gives very low

offset and drift. Extremely low noise is achieved with

patented circuit design techniques. A new cascode

design allows high precision input specifications and

reduced susceptibility to flicker noise.

2kΩ

10kΩ

Trim

1

Trim

Standard 741 pin configuration allows upgrading of

existing designs to higher performance levels.

5

2kΩ

–V_CC

4

*Patented

BIFET^®National Semiconductor Corp., Difet^®Burr-Brown Corp.

International Airport Industrial Park

•

Mailing Address: PO Box 11400

Cable: BBRCORP

•

Tucson, AZ 85734

•

Street Address: 6730 S. Tucson Blvd.

•

Tucson, AZ 85706

Tel: (520) 746-1111 Twx: 910-952-1111

•

Telex: 066-6491

•

FAX: (520) 889-1510

•

Immediate Product Info: (800) 548-6132

PDS-526K

Printed in U.S.A. August, 1995

SPECIFICATIONS

ELECTRICAL

At V_CC= ±15VDC and T_A= +25°C unless otherwise noted.

OPA111AM

TYP

OPA111BM

TYP

OPA111SM

TYP

PARAMETER

INPUT

CONDITION

MIN

MAX

MIN

MAX

MIN

MAX

UNITS

NOISE

Voltage, f_O= 10Hz

f_O= 100Hz

f_O= 1kHz

f_O= 10kHz

f_B= 10Hz to 10kHz

f_B= 0.1Hz to 10Hz

Current, f_B= 0.1Hz to 10Hz

f_O= 0.1Hz thru 20kHz

100% Tested

40

15

8

80

40

15

8

1.2

3.3

15

0.8

30

11

7

60

30

12

8

40

15

8

80

40

15

8

1.2

3.3

15

0.8

nV/√Hz

µVrms

µVp-p

6

100% Tested

0.7

1.6

9.5

0.5

0.6

1.2

7.5

0.4

1

0.7

1.6

9.5

0.5

(1)

2.5

12

0.6

(1)

fAp-p

fA/√Hz

OFFSET VOLTAGE⁽²⁾

Input Offset Voltage

Average Drift

V_CM= 0VDC

T_A= T_MINto T_MAX

_CC= ±10V to ±18V

±100

±2

110

±3

±500

±5

±50

±0.5

110

±3

±250

±1

±100

±2

110

±3

±500

±5

µV

µV/°C

dB

Supply Rejection

V

90

100

90

±31

±2

±10

±1

±31

±2

µV/V

BIAS CURRENT⁽²⁾

Input Bias Current

V_CM= 0VDC

±0.8

±0.5

±0.8

±0.5

pA

OFFSET CURRENT⁽²⁾

Input Offset Current

±1.5

±0.25

±0.75

±1.5

IMPEDANCE

Differential

Common-Mode

10¹³|| 1

10¹⁴|| 3

10¹³|| 1

10¹⁴|| 3

10¹³|| 1

10¹⁴|| 3

Ω || pF

VOLTAGE RANGE

Common-Mode Input Range

Common-Mode Rejection

±10

90

±11

110

±10

100

±11

110

±10

90

±11

110

V

dB

V_IN= ±10VDC

R_L≥ 2kΩ

OPEN-LOOP GAIN, DC

Open-Loop Voltage Gain

FREQUENCY RESPONSE

114

125

120

125

114

125

dB

Unity Gain, Small Signal

Full Power Response

Slew Rate

Settling Time, 0.1%

0.01%

2

32

2

6

10

2

32

2

6

10

2

32

2

6

10

MHz

kHz

V/µs

µs

20Vp-p, R_L= 2kΩ

V_O= ±10V, R_L= 2kΩ

Gain = –1, R_L= 2kΩ

10V Step

16

1

16

1

16

1

µs

Overload Recovery,

50% Overdrive⁽³⁾

Gain = –1

5

µs

RATED OUTPUT

Voltage Output

Current Output

Output Resistance

Load Capacitance Stability

Short Circuit Current

R_L= 2kΩ

V_O= ±10VDC

DC, Open Loop

Gain = +1

±11

±5.5

±12

±10

100

1000

40

±11

±5.5

±12

±10

100

1000

40

±11

±5.5

±12

±10

100

1000

40

V

mA

Ω

pF

mA

10

POWER SUPPLY

Rated Voltage

±15

VDC

Voltage Range, Derated

Performance

Current, Quiescent

±5

±18

3.5

±5

±18

3.5

±5

±18

3.5

VDC

mA

I_O= 0mADC

2.5

TEMPERATURE RANGE

Specification

Operating

Storage

Ambient Temp.

–25

–55

–65

+85

+125

+150

–25

–55

–65

+85

+125

+150

–55

–65

+125

+150

°C

θ Junction-Ambient

200

°C/W

NOTES: (1) Sample tested—this parameter is guaranteed. (2) Offset voltage, offset current, and bias current are measured with the units fully warmed up. (3) Overload

recovery is defined as the time required for the output to return from saturation to linear operation following the removal of a 50% input overdrive.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes

no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without

notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-

BROWN product for use in life support devices and/or systems.

®

OPA111

2

ELECTRICAL (FULL TEMPERATURE RANGE SPECIFICATIONS)

At V_CC= ±15VDC and T_A= T_MINto T_MAXunless otherwise noted.

OPA111AM

OPA111BM

TYP

OPA111SM

TYP

PARAMETER

CONDITION

MIN

TYP

MAX

MIN

MAX

MIN

MAX

UNITS

TEMPERATURE RANGE

Specification Range

INPUT

Ambient Temp.

–25

+85

–25

+85

–55

+125

°C

OFFSET VOLTAGE⁽¹⁾

Input Offset Voltage

Average Drift

V_CM= 0VDC

±220

±2

100

±10

±1000

±5

±110

±0.5

100

±500

±1

±300

±2

100

±10

±1500

±5

µV

µV/°C

dB

Supply Rejection

V_CC= ±10V to ±18V

86

90

86

±50

±250

±200

±10

±32

±50

µV/V

BIAS CURRENT⁽¹⁾

Input Bias Current

V_CM= 0VDC

±50

±30

±15

±130

±100

±820

±510

±4100

±3100

pA

OFFSET CURRENT⁽¹⁾

Input Offset Current

VOLTAGE RANGE

Common-Mode Input Range

Common-Mode Rejection

±10

86

±11

100

±10

90

±11

100

±10

86

±11

100

V

dB

V_IN= ±10VDC

R_L≥ 2kΩ

OPEN-LOOP GAIN, DC

Open-Loop Voltage Gain

RATED OUTPUT

110

120

114

120

110

120

dB

Voltage Output

Current Output

Short Circuit Current

R_L= 2kΩ

V_O= ±10VDC

V_O= 0VDC

±10.5

±5.25

10

±11

±10

40

±11

±5.25

10

±11.5

±10

40

±11

±5.25

10

±11.5

±10

40

V

mA

POWER SUPPLY

Current, Quiescent

I_O= 0mADC

2.5

3.5

2.5

3.5

2.5

3.5

mA

NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up.

CONNECTION DIAGRAM

ABSOLUTE MAXIMUM RATINGS

Top View

Substrate and Case

Supply ........................................................................................... ±18VDC

Internal Power Dissipation⁽¹⁾......................................................... 750mW

Differential Input Voltage⁽²⁾..........................................................±36VDC

Input Voltage Range⁽²⁾................................................................ ±18VDC

Storage Temperature Range ......................................... –65°C to +150°C

Operating Temperature Range ..................................... –55°C to +125°C

Lead Temperature (soldering, 10s) ............................................... +300°C

Output Short Circuit Duration⁽³⁾.............................................. Continuous

Junction Temperature .................................................................... +175°C

8

Offset

Trim

+V_CC

1

3

7

5

–In

2

OPA111

6

Output

Offset

Trim

+In

NOTES: (1) Packages must be derated based on θ_JC= 150°C/W or θ_JA

= 300°C/W. (2) For supply voltages less than ±18VDC, the absolute

maximum input voltage is equal to +18V > V_IN> –V_CC– 6V. See Figure

2. (3) Short circuit may be to power supply common only. Rating applies

to +25°C ambient. Observe dissipation limit and T_J.

4

–V_CC

PACKAGE INFORMATION

PACKAGE DRAWING

MODEL

PACKAGE

NUMBER⁽¹⁾

OPA111AM

OPA111BM

OPA111SM

TO-99

001

NOTE: (1) For detailed drawing and dimension table, please see end of data

sheet, or Appendix D of Burr-Brown IC Data Book.

ORDERING INFORMATION

OFFSET

TEMPERATURE

RANGE

VOLTAGE,

MODEL

PACKAGE

MAX (µV)

OPA111AM

OPA111BM

OPA111SM

TO-99

–25°C to +85°C

–55°C to +125°C

±500

±250

±500

®

OPA111

3

DICE INFORMATION

PAD

FUNCTION

1

2

3

4

5

6

7

8

Offset Trim

–In

+In

–V_S

Offset Trim

Output

+V_S

Substrate

Substrate Bias: This Dielectrically-Isolated

Substrate is normally connected to common.

MECHANICAL INFORMATION

MILS (0.001")

MILLIMETERS

Die Size

Die Thickness

Min. Pad Size

95 x 71 ±5

20 ±3

4 x 4

2.41 x 1.80 ±0.13

0.51 ±0.08

0.10 x 0.10

OPA111AD DIE TOPOGRAPHY

Backing:

Transistor Count:

None

44

TYPICAL PERFORMANCE CURVES

T_A= +25°C, V_CC= ±15VDC unless otherwise noted.

INPUT CURRENT NOISE SPECTRAL DENSITY

100

INPUT VOLTAGE NOISE SPECTRAL DENSITY

1k

100

10

AM, SM

BM

1

BM

0.1

1

10

100

1k

10k

100k

1M

1

10

100

1k

10k

100k

1M

Frequency (Hz)

®

OPA111

4

TYPICAL PERFORMANCE CURVES (CONT)

T_A= +25°C, V_CC= ±15VDC unless otherwise noted.

TOTAL* INPUT VOLTAGE NOISE SPECTRAL

DENSITY vs SOURCE RESISTANCE

TOTAL* INPUT VOLTAGE NOISE (PEAK-TO-PEAK)

vs SOURCE RESISTANCE

1k

100

10

1k

100

10

R_S= 10MΩ

*Includes contribution

from source resistance.

R_S= 1MΩ

R_S= 100kΩ

BM

f_B= 0.1Hz to 10Hz

R_S= 100Ω

*Includes contribution

from source resistance.

1

0.1

–75

–15

1

10

100

1k

10k

100k

10⁴

10⁵

10⁶

10⁷

10⁸

10⁹

10¹⁰

Frequency (Hz)

Source Resistance (Ω)

VOLTAGE AND CURRENT NOISE SPECTRAL

DENSITY vs TEMPERATURE

BIAS AND OFFSET CURRENT

vs TEMPERATURE

1k

100

10

1k

12

10

8

100

f_O= 1kHz

100

10

BM

1

6

0.1

0.01

0.1

0.01

0.1

0.01

4

–50 –25

0

25

50

75

100

125

–50

–25

0

25

50

75

100

125

Ambient Temperature (°C)

Temperature (°C)

BIAS AND OFFSET CURRENT

vs INPUT COMMON-MODE VOLTAGE

POWER SUPPLY REJECTION

vs FREQUENCY

10

1

10

140

120

100

80

1

Bias Current

60

Offset Current

0.1

0.01

0.1

0.01

40

20

0

–10

–5

0

5

10

15

1

10

100

1k

10k

100k

1M

10M

Common-Mode Voltage (V)

Frequency (Hz)

®

OPA111

5

TYPICAL PERFORMANCE CURVES (CONT)

T_A= +25°C, V_CC= ±15VDC unless otherwise noted.

COMMON-MODE REJECTION

vs FREQUENCY

COMMON-MODE REJECTION

vs INPUT COMMON MODE VOLTAGE

140

120

100

80

120

110

100

90

60

40

80

20

0

70

–15

–10

–5

0

5

10

15

1

10

100

1k

10k

100k

1M

10M

Common-Mode Voltage (V)

Frequency (Hz)

GAIN-BANDWIDTH AND SLEW RATE

vs TEMPERATURE

OPEN-LOOP FREQUENCY RESPONSE

140

120

100

80

4

3

2

1

0

4

3

2

1

0

–45

–90

Phase

Margin

60

Gain

65°C

40

–135

–180

20

0

1

10

100

1k

10k

100k

1M

10M

–75

–50 –25

0

25

50

75

100

125

Frequency (Hz)

Ambient Temperature (°C)

GAIN-BANDWIDTH AND SLEW RATE

vs SUPPLY VOLTAGE

OPEN-LOOP GAIN vs TEMPERATURE

3

2

1

0

3

2

1

0

140

130

120

110

100

0

5

10

15

20

–75

–50 –25

0

25

50

75

100

125

Ambient Temperature (°C)

Supply Voltage (±V_CC

)

®

OPA111

6

TYPICAL PERFORMANCE CURVES (CONT)

T_A= +25°C, V_CC= ±15VDC unless otherwise noted.

COMMON-MODE REJECTION

vs INPUT COMMON-MODE VOLTAGE

MAXIMUM UNDISTORTED OUTPUT

VOLTAGE vs FREQUENCY

120

110

100

90

30

20

10

0

80

70

1k

10k

Frequency (Hz)

100k

1M

–15

–10

–5

0

5

10

15

Common-Mode Voltage (V)

SMALL SIGNAL TRANSIENT RESPONSE

SETTLING TIME vs CLOSED-LOOP GAIN

100

80

60

40

20

0

60

40

20

0

0.01%

0.1%

–20

–40

–60

0

1

2

3

4

5

1

10

100

1k

Time (µs)

Closed-Loop Gain (V/V)

SUPPLY CURRENT vs TEMPERATURE

INPUT OFFSET VOLTAGE WARM-UP DRIFT

4

3

2

1

0

20

10

0

–10

–20

–75

–50 –25

0

25

50

75

100

125

0

1

2

3

4

5

6

Ambient Temperature (°C)

Time From Power Turn-On (Minutes)

®

OPA111

7

TYPICAL PERFORMANCE CURVES (CONT)

T_A= +25°C, V_CC= ±15VDC unless otherwise noted.

INPUT OFFSET VOLTAGE CHANGE

DUE TO THERMAL SHOCK

150

AM

75

BM

0

–75

25°C

85°C

T_A= 25°C to T_A= 85°C

Air Environment

–150

–1

0

1

2

3

4

5

Time From Thermal Shock (Minutes)

APPLICATIONS INFORMATION

OFFSET VOLTAGE ADJUSTMENT

2

1

I_IN

V

Maximum Safe Current

The OPA111 offset voltage is laser-trimmed and will require

no further trim for most applications. As with most amplifi-

ers, externally trimming the remaining offset can change

drift performance by about 0.3µV/°C for each 100µV of

adjusted offset. Note that the trim (Figure 1) is similar to

operational amplifiers such as 741 and AD547. The OPA111

can replace most other amplifiers by leaving the external

null circuit unconnected.

0

–1

Maximum Safe Current

–2

–15

–10

–5

0

5

10

15

INPUT PROTECTION

Input Voltage (V)

Conventional monolithic FET operational amplifiers require

external current-limiting resistors to protect their inputs

against destructive currents that can flow when input FET

gate-to-substrate isolation diodes are forward-biased. Most

FIGURE 2. Input Current vs Input Voltage with ±V_CCPins

Grounded.

Static damage can cause subtle changes in amplifier input

characteristics without necessarily destroying the device. In

precision operational amplifiers (both bipolar and FET types),

this may cause a noticeable degradation of offset voltage and

drift. Static protection is recommended when handling any

precision IC operational amplifier.

BIFET amplifiers can be destroyed by the loss of –V_CC

.

+V_CC

7

2

3

6

OPA111

1

5

GUARDING AND SHIELDING

10kΩ to 1M trim potentiometer

4

As in any situation where high impedances are involved,

careful shielding is required to reduce “hum” pickup in input

leads. If large feedback resistors are used, they should also

be shielded along with the external input circuitry.

(100kΩ recommended).

±10mV typical trim range.

–V_CC

FIGURE 1. Offset Voltage Trim.

Leakage currents across printed circuit boards can easily

exceed the bias current of the OPA111. To avoid leakage

problems, it is recommended that the signal input lead of the

OPA111 be wired to a Teflon standoff. If the OPA111 is to

be soldered directly into a printed circuit board, utmost care

must be used in planning the board layout. A “guard” pattern

Unlike BIFET amplifiers, The Difet OPA111 requires input

current limiting resistors only if its input voltage is greater

than 6V more negative than –V_CC. A 10kΩ series resistor

will limit input current to a safe level with up to ±15V input

levels, even if both supply voltages are lost.

®

OPA111

8

should completely surround the high impedance input leads

and should be connected to a low impedance point which is

at the signal input potential.

1k

100

10

OP-27 + Resistor

OPA111 + Resistor

Resistor Noise Only

E_O

The amplifier case should be connected to any input shield

or guard via pin 8. This insures that the amplifier itself is

fully surrounded by guard potential, minimizing both leak-

age and noise pickup (see Figure 3).

R_S

If guarding is not required, pin 8 (case) should be connected

to ground.

E_O

=

e_N²+ (I_NR_S)²+ 4kTR_S

OPA111 + Resistor

Resistor Noise Only

OP-27 + Resistor

BM

1M

1

100

Non-Inverting

Buffer

1k

10k

100k

10M

Source Resistance, R_S(Ω)

2

3

8

Out

FIGURE 4. Voltage Noise Spectral Density vs Source

Resistance.

6

OPA111

3

In

80

Inverting

TO-99 Bottom View

T_A= 25°C; curves taken from

manufacturers' published

typical data.

4

5

LF156/157

60

3

6

2

Out

6

OPA111

40

7

8

3

8

2

20

0

1

LF155

AD547

Board layout for input guarding: guard top and bottom of board.

Alternate: use Teflon^®standoff for sensitive input pins.

OPA111

OP-15/16/17

"Perfect Bias Current Cancellation"

–5 10

Common-Mode Voltage (VDC)

Teflon^®E. I. Du Pont de Nemours & Co.

–20

–15

–10

0

5

15

FIGURE 3. Connection of Input Guard.

FIGURE 5. Input Bias Currrent vs Common-Mode Voltage.

NOISE: FET VERSUS BIPOLAR

Low noise circuit design requires careful analysis of all

noise sources. External noise sources can dominate in many

cases, so consider the effect of source resistance on overall

operational amplifier noise performance. At low source

impedances, the lower voltage noise of a bipolar operational

amplifier is superior, but at higher impedances the high

current noise of a bipolar amplifier becomes a serious

liability. Above about 15kΩ, the OPA111 will have a lower

total noise than an OP-27 (see Figure 4).

1000pF Polystyrene

1000MΩ

2

8

Output

6

OPA111

3

NOTE: Pyroelectric

Pyroelectric

detectors respond

to rate-of-change

(AC signal) only.

1000MΩ

Detector

BIAS CURRENT CHANGE

VERSUS COMMON-MODE VOLTAGE

The input bias current of most popular BIFET operational

amplifiers are affected by common-mode voltage (Figure 5).

Higher input FET gate-to-drain voltage causes leakage and

ionization (bias) currents to increase. Due to its cascode

input stage, the extremely low bias current of the OPA111 is

not compromised by common-mode voltage.

FIGURE 6. Pyroelectric Infrared Detector.

APPLICATIONS CIRCUITS

Figures 6 through 18 are circuit diagrams of various appli-

cations for the OPA111.

®

OPA111

9

<1pF to prevent gain peaking.

10kΩ

100Ω

–46dBm to

–20dBm

RF Input

1000MΩ

2

3

e_O

6

1000pF

OPA111

+15V

DC

Output

0.1µF

Guard

2

H-P

HSCH-3486

8

RFC

1MΩ

7

Output

e

_O≈ 1200mVDC/µW

6

OPA111

H-P 5082-4204

Pin Photodiode

5 x 10⁸V/W

Video bandwidth: DC to 50kHz

0.1µF

3

4

0.01µF

1000MΩ

FIGURE 7. Zero-Bias Schottky Diode Square-Law RF

Detector.

–15V

Circuit must be well shielded.

FIGURE 10. Sensitive Photodiode Amplifier.

R_F

500pA

100MΩ

I_IN

2

6

Offset voltage =

255µVDC maximum

with no offset adjust.

OPA111

3

e_O= 50mV

2

3

6

e_O= –I_INR_F

Pin Photodiode

OPA111BM

5.34MΩ* 5.34MΩ*

Output

Input

1000pF

2.67MΩ*

500pF

Light Rays

Q

Scintillation Crystal

2kΩ

X-Rays (Pencil Beam)

*For 50Hz use:

3.16MΩ and 6.37MΩ

500pF

FIGURE 11. 60Hz Reject Filter.

C_F

R_F

100pF

10¹⁰Ω

Collimator

8

2

X-Ray Tube

Output

6

OPA111

e_O

FIGURE 8. Computerized Axial Tomography (CAT) Scan-

ner Channel Amplifier.

∆Q

3

e_O= –∆Q/C_F

100pF

10¹⁰Ω

Low frequency cutoff =

1/(2 π R_FC_F) = 0.16Hz

500Ω

9.5kΩ

Guard

+15V

7

FIGURE 12. Piezoelectric Transducer Charge Amplifier.

1VDC

Output

8

2

3

6

OPA111

4

5

Offset Trim

1

375.1kΩ

1µF

100kΩ

8

In

2

3

pH Probe

Out

R ≈ 500MΩ

6

–15V

375.1kΩ

187.5kΩ

OPA111

50mV Output

1µF

F_C= 0.6Hz

–80dB at 60Hz

FIGURE 13. 0.6Hz Second-Order Low-Pass Filter.

FIGURE 9. High Impedance (10¹⁴Ω) Amplifier.

®

OPA111

10

0.03µF

10.5kΩ

<1pF to prevent peaking

0.01µF

Overload ≈ 0.1µW input

200MΩ

+5VDC

73.2kΩ

2

6

3

365Ω

10kΩ

2

3

OPA111

Pin Diode*

1µF

3

7

365Ω

Output

6

LM211

20kΩ

0.1µF

OPA111

2

Input

TTL

Output

1

0.01µF

100kΩ

*Silicon Detector Corp.

SD-041-11-21-011

R_T

C_T

Digital Common

G = 26dB

Midband

FIGURE 15. High Sensitivity (under 1nW) Fiber Optic

Receiver for 9600 Baud Manchester Data.

FIGURE 14. RIAA Equalized Phono Preamplifier.

100Ω

10kΩ

2

3

10kΩ

6

Input

OPA111

10kΩ

2

3

10kΩ

A_V= –1010

OPA111

e_N= 1.9nV/√Hz typ* at 10kHz

BW = 30kHz typ

10kΩ

GBW = 30.3MHz typ

V_OS= ±16µV typ*

2

3

∆V_OS/∆T = ±0.16µV/°C typ*

I_B= 10pA max

Z_IN≈ 10¹²Ω || 30pF

OPA111

10kΩ

* Theoretical performance achievable

from OPA111BM with uncorrelated

random distribution of parameters.

2

3

OPA111

10kΩ

2

3

10kΩ

OPA111

2

3

Output

6

OPA37

N = 10 OPA111BM

FIGURE 16. ‘N’ Stage Parallel-Input Amplifier for Reduced Relative Amplifier Noise at the Output.

®

OPA111

11

I_B= 1pA

3

2

Gain = 100

CMRR ≈ 106dB

R_IN= 10¹³Ω

–In

6

OPA111

R_F

25kΩ

2

5

6

5kΩ

R_F

R_G

101Ω

Output

25kΩ

3

5kΩ

Burr-Brown

INA105

25kΩ

2

3

Differential Amplifier

6

OPA111

1

+In

Differential Voltage Gain = 1 + 2R_F/R_G

FIGURE 17. FET Input Instrumentation Amplifier.

≈10pF

10kΩ

1MΩ

2

8

IN914*

6

Output

6

2

3

OPA111

2N4117*

3

3507J

Input

Droop ≈ 100µV/s

IN914*

8

0.01µF

30pF

Polystyrene

*Reverse polarity for

negative peak detection.

FIGURE 18. Low-Droop Positive Peak Detector.

®

OPA111

12

型号:	OPA111AIH
是否Rohs认证：	不符合
生命周期：	Obsolete
包装说明：	, CAN8,.2
Reach Compliance Code：	unknown
风险等级：	5.84
放大器类型：	OPERATIONAL AMPLIFIER
架构：	VOLTAGE-FEEDBACK
25C 时的最大偏置电流 (IIB)：	0.000002 µA
频率补偿：	YES
最大输入失调电压：	1000 µV
JESD-30 代码：	O-MBCY-W8
JESD-609代码：	e0
低-偏置：	YES
低-失调：	NO
标称负供电电压 (Vsup)：	-15 V
功能数量：	1
端子数量：	8
最高工作温度：	85 °C
最低工作温度：	-25 °C
封装主体材料：	METAL
封装等效代码：	CAN8,.2
封装形状：	ROUND
封装形式：	CYLINDRICAL
电源：	+-15 V
认证状态：	Not Qualified
最小摆率：	1 V/us
子类别：	Operational Amplifiers
最大压摆率：	3.5 mA
供电电压上限：	18 V
标称供电电压 (Vsup)：	15 V
温度等级：	OTHER
端子面层：	Tin/Lead (Sn/Pb)
端子形式：	WIRE
端子位置：	BOTTOM
最小电压增益：	320000
Base Number Matches：	1

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