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  • HECC GROUP CO.,LIMITED

     该会员已使用本站17年以上
  • OPA4347UA/2K5 现货库存
  • 数量9000 
  • 厂家TI 
  • 封装14-SOIC 
  • 批号24+ 
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  • 深圳市宏世佳电子科技有限公司

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  • OPA4347UA 现货库存
  • 数量3500 
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  • 数量60030 
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  • 数量5000 
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  • 数量10000 
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  • 封装14-SOIC 
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  • 数量5000 
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  • 深圳市驰天熠电子有限公司

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  • 数量33560 
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  • 数量5044 
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  • 深圳市和谐世家电子有限公司

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  • OPA4347UA
  • 数量1991 
  • 厂家Texas Instruments 
  • 封装14-SOIC(0.154",3.90mm 宽) 
  • 批号IC OPAMP GP 350KHZ RRO 14SOIC 
  • 只做进口原装
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  • 深圳市炎凯科技有限公司

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  • 数量10800 
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  • 深圳市励创源科技有限公司

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  • 数量35600 
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  • 深圳市高捷芯城科技有限公司

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  • OPA4347UA
  • 数量7828 
  • 厂家TI(德州仪器) 
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  • OPA4347UA
  • 数量15 
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  • OPA4347UA
  • 数量16258 
  • 厂家Texas Instruments 
  • 封装原厂直销 
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  • 北京顺科电子科技有限公司

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  • OPA4347UA
  • 数量5500 
  • 厂家BURR-BROWN 
  • 封装SOP-14 
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  • 深圳市华斯顿电子科技有限公司

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  • 数量28721 
  • 厂家TI 
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  • 深圳市欧瑞芯科技有限公司

     该会员已使用本站11年以上
  • OPA4347UA
  • 数量9500 
  • 厂家TI(德州仪器) 
  • 封装14-SOIC(0.154,3.90mm 宽) 
  • 批号23+/24+ 
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  • 深圳市毅创腾电子科技有限公司

     该会员已使用本站16年以上
  • OPA4347UA
  • 数量499 
  • 厂家TI 
  • 封装SOP14 
  • 批号22+ 
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  • 深圳市晶美隆科技有限公司

     该会员已使用本站15年以上
  • OPA4347UA
  • 数量26800 
  • 厂家TI/德州仪器 
  • 封装SOIC14 
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  • OPA4347UA
  • 数量6500 
  • 厂家TI 
  • 封装SOP 
  • 批号20+ 
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  • OPA4347UA
  • 数量9820 
  • 厂家TI/德州仪器 
  • 封装SOP14 
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  • 深圳市雅维特电子有限公司

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  • 数量15000 
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  • 数量68000 
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产品型号OPA4347UA的概述

OPA4347UA芯片概述 OPA4347UA是一款高性能的运算放大器,由德州仪器公司(Texas Instruments)生产。该芯片以其低噪声、高增益和宽带宽等特性,被广泛应用于音频处理、信号调理、数据采集等多个电子应用领域。OPA4347UA具备优良的动态性能和高线性度,适合对信号进行精确处理与转换。该芯片采用四路的设计结构,使其在多通道应用中表现出色。 详细参数 OPA4347UA的主要技术参数包括: 1. 增益带宽积: 通常为10MHz,使得其在高频信号处理时仍然能够保持足够的增益。 2. 输出摆幅: 在负载条件下,具有较大的输出摆幅,可以适应不同的信号电平需求。 3. 噪声性能: 在1kHz处,输入等效噪声电压被测得为5.4nV/√Hz,这在高精度测量中显著提高了信号的信噪比。 4. 供电电压范围: OPA4347UA的供电电压范围为±2.5V至±18V,适用于多种...

产品型号OPA4347UA的Datasheet PDF文件预览

OPA347  
OPA2347  
OPA4347  
OPA347  
®
OPA347  
OPA347  
OPA4347  
OPA2347  
SBOS167C – NOVEMBER 2000– REVISED JUNE 2003  
microPower, Rail-to-Rail  
Operational Amplifiers  
FEATURES  
LOW IQ: 20µA  
DESCRIPTION  
The OPA347 is a microPower, low-cost operational amplifier  
available in micropackages. The OPA347 (single version) is  
available in the SC-70 and SOT23-5 packages. The OPA2347  
(dual version) is available in the SOT23-8 and WCSP-8  
packages. Both are also available in the SO-8. The OPA347  
is also available in the DIP-8. The OPA4347 (quad) is  
available in the SO-14 and the TSSOP-14.  
microSIZE PACKAGES: WCSP-8, SC70-5  
SOT23-5, SOT23-8, and TSSOP-14  
HIGH SPEED/POWER RATIO WITH  
BANDWIDTH: 350kHz  
RAIL-TO-RAIL INPUT AND OUTPUT  
SINGLE SUPPLY: 2.3V to 5.5V  
The small size and low power consumption (34µA per chan-  
nel maximum) of the OPA347 make it ideal for portable and  
battery-powered applications. The input range of the OPA347  
extends 200mV beyond the rails, and the output range is  
within 5mV of the rails. The OPA347 also features an  
excellent speed/power ratio with a bandwidth of 350kHz.  
APPLICATIONS  
PORTABLE EQUIPMENT  
BATTERY-POWERED EQUIPMENT  
2-WIRE TRANSMITTERS  
SMOKE DETECTORS  
The OPA347 can be operated with a single or dual power  
supply from 2.3V to 5.5V. All models are specified for  
operation from –55°C to +125°C.  
CO DETECTORS  
OPA347  
OPA347  
Out  
V–  
1
2
3
5
4
V+  
OPA4347  
+In  
V–  
–In  
1
2
3
5
4
V+  
OPA2347  
(bump side down)  
Not to Scale  
Out A  
–In A  
+In A  
V+  
1
2
3
4
5
6
7
14 Out D  
13 –In D  
12 +In D  
11 V–  
Out  
+In  
–In  
SC70-5  
A
B
D
C
V+  
Out A  
–In A  
+In A  
V–  
1
2
3
4
8
7
6
5
SOT23-5  
Out B  
–In B  
+In B  
OPA347  
OPA2347  
+In B  
–In B  
Out B  
10 +In C  
NC  
V+  
NC  
–In  
+In  
V–  
1
8
Out A  
–In A  
+In A  
V–  
1
2
3
4
8
7
6
5
V+  
9
8
–In C  
Out C  
A
2
3
4
7
6
5
Out B  
–In B  
+In B  
WCSP-8  
(top view)  
B
Out  
NC  
TSSOP-14, SO-14  
SO-8, DIP-8  
SOT23-8, SO-8  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
Copyright © 2000-2003, Texas Instruments Incorporated  
www.ti.com  
ABSOLUTE MAXIMUM RATINGS(1)  
ELECTROSTATIC  
DISCHARGE SENSITIVITY  
Supply Voltage, V+ to V................................................................... 7.5V  
Signal Input Terminals, Voltage(2) .................. (V–) – 0.5V to (V+) + 0.5V  
Current(2) .................................................... 10mA  
This integrated circuit can be damaged by ESD. Texas Instru-  
ments recommends that all integrated circuits be handled with  
appropriate precautions. Failure to observe proper handling  
and installation procedures can cause damage.  
Output Short-Circuit(3) .............................................................. Continuous  
Operating Temperature ..................................................65°C to +150°C  
Storage Temperature .....................................................65°C to +150°C  
Junction Temperature ...................................................................... 150°C  
Lead Temperature (soldering, 10s) ................................................. 300°C  
ESD damage can range from subtle performance degrada-  
tion to complete device failure. Precision integrated circuits  
may be more susceptible to damage because very small  
parametric changes could cause the device not to meet its  
published specifications.  
NOTES: (1) Stresses above these ratings may cause permanent damage.  
Exposure to absolute maximum conditions for extended periods may  
degrade device reliability. These are stress ratings only. Functional opera-  
tion of the device at these conditions, or beyond the specified operating  
conditions, is not implied. (2) Input terminals are diode-clamped to the  
power-supply rails. Input signals that can swing more than 0.5V beyond the  
supply rails should be current-limited to 10mA or less. (3) Short-circuit to  
ground, one amplifier per package.  
PACKAGE/ORDERING INFORMATION  
SPECIFIED  
PACKAGE  
DESIGNATOR(1)  
TEMPERATURE  
RANGE  
PACKAGE  
MARKING  
ORDERING  
NUMBER  
TRANSPORT  
MEDIA, QUANTITY  
PRODUCT  
PACKAGE  
OPA347NA  
SOT23-5  
DBV  
"
P
D
"
DCK  
"
–55°C to +125°C  
A47  
"
OPA347PA  
OPA347NA/250  
OPA347NA/3K  
OPA347PA  
Tape and Reel, 250  
Tape and Reel, 3000  
Rails, 50  
"
OPA347PA  
OPA347UA  
"
OPA347SA  
"
"
DIP-8  
SO-8  
"
SC-70  
"
"
–55°C to +125°C  
–55°C to +125°C  
OPA347UA  
OPA347UA  
Rails, 100  
"
"
S47  
"
OPA347UA/2K5  
OPA347SA/250  
OPA347SA/3K  
Tape and Reel, 2500  
Tape and Reel, 250  
Tape and Reel, 3000  
–55°C to +125°C  
"
OPA2347EA  
SOT23-8  
DCN  
–55°C to +125°C  
B47  
"
OPA2347UA  
OPA2347EA/250  
OPA2347EA/3K  
OPA2347UA  
Tape and Reel, 250  
Tape and Reel, 3000  
Rails, 100  
"
"
SO-8  
"
"
D
"
"
OPA2347UA  
–55°C to +125°C  
"
"
"
OPA2347UA/2K5  
Tape and Reel, 2500  
OPA2347YED  
WCSP-8  
YED  
"
–55°C to +125°C  
YMD CCS  
OPA2347YEDT  
OPA2347YEDR  
Tape and Reel, 250  
Tape and Reel, 3000  
"
"
"
"
OPA4347EA  
TSSOP-14  
PW  
"
–55°C to +125°C  
OPA4347EA  
OPA4347EA/250  
OPA4347EA/2K5  
OPA4347UA  
Tape and Reel, 250  
Tape and Reel, 2500  
Rails, 58  
"
"
SO-14  
"
"
"
OPA4347UA  
D
–55°C to +125°C  
OPA4347UA  
"
"
"
"
OPA4347UA/2K5  
Tape and Reel, 2500  
NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com.  
OPA347, 2347, 4347  
2
SBOS167C  
www.ti.com  
ELECTRICAL CHARACTERISTICS: VS = 2.5V to 5.5V  
Boldface limits apply over the specified temperature range, TA = –55°C to +125°C.  
At TA = +25°C, RL = 100kconnected to VS/2 and VOUT = VS/2, unless otherwise noted.  
OPA347NA, UA, PA, SA  
OPA2347EA, UA, YED  
OPA4347EA, UA  
PARAMETER  
CONDITION  
MIN  
TYP  
MAX  
UNITS  
OFFSET VOLTAGE  
Input Offset Voltage  
over Temperature  
Drift  
vs Power Supply  
over Temperature  
Channel Separation, DC  
VOS  
VS = 5.5V, VCM = (V–) + 0.8V  
2
2
3
6
7
mV  
mV  
dVOS/dT  
PSRR  
µV/°C  
µV/V  
µV/V  
µV/V  
dB  
VS = 2.5V to 5.5V, VCM < (V+) – 1.7V  
VS = 2.5V to 5.5V, VCM < (V+) – 1.7V  
60  
175  
300  
0.3  
128  
f = 1kHz  
INPUT VOLTAGE RANGE  
Common-Mode Voltage Range  
Common-Mode Rejection Ratio  
over Temperature  
VCM  
CMRR  
(V–) – 0.2  
(V+) + 0.2  
V
VS = 5.5V, (V–) – 0.2V < VCM < (V+) – 1.7V  
VS = 5.5V, V– < VCM < (V+) – 1.7V  
Vs = 5.5V, (V–) – 0.2V < VCM < (V+) + 0.2V  
Vs = 5.5V, V– < VCM < V+  
70  
66  
54  
48  
80  
70  
dB  
dB  
dB  
dB  
over Temperature  
INPUT BIAS CURRENT(1)  
Input Bias Current  
Input Offset Current  
Ib  
IOS  
±0.5  
±0.5  
±10  
±10  
pA  
pA  
INPUT IMPEDANCE  
Differential  
Common-Mode  
1013 || 3  
1013 || 6  
|| pF  
|| pF  
NOISE  
VCM < (V+) – 1.7V  
Input Voltage Noise, f = 0.1Hz to 10Hz  
Input Voltage Noise Density, f = 1kHz  
Input Current Noise Density, f = 1kHz  
12  
60  
0.7  
µVPP  
nV/Hz  
fA/Hz  
en  
in  
OPEN-LOOP GAIN  
Open-Loop Voltage Gain  
over Temperature  
AOL VS = 5.5V, RL = 100k, 0.015V < VO < 5.485V  
VS = 5.5V, RL = 100k , 0.015V < VO < 5.485V  
VS = 5.5V, RL = 5k, 0.125V < VO < 5.375V  
VS = 5.5V, RL = 5k , 0.125V < VO < 5.375V  
100  
88  
100  
88  
115  
115  
115  
dB  
dB  
dB  
dB  
dB  
over Temperature  
A
OL (SC-70 only) VS = 5.5V, RL = 5k0.125V < VO < 5.375V  
96  
OUTPUT  
Voltage Output Swing from Rail  
RL = 100k, AOL > 100dB  
5
15  
15  
125  
125  
mV  
mV  
mV  
mV  
mA  
over Temperature  
RL = 100k, AOL > 88dB  
RL = 5k, AOL > 100dB  
90  
over Temperature  
Short-Circuit Current  
Capacitive Load Drive  
RL = 5k, AOL > 88dB  
ISC  
CLOAD  
±17  
See Typical Characteristics  
FREQUENCY RESPONSE  
Gain-Bandwidth Product  
Slew Rate  
Settling Time, 0.1%  
0.01%  
CL = 100pF  
G = +1  
VS = 5V, 2V Step, G = +1  
VS = 5V, 2V Step, G = +1  
VIN × Gain = VS  
GBW  
SR  
tS  
350  
0.17  
21  
27  
23  
kHz  
V/µs  
µs  
µs  
µs  
Overload Recovery Time  
POWER SUPPLY  
Specified Voltage Range  
VS  
2.5  
5.5  
V
V
V
µA  
µA  
Minimum Operating Voltage  
Minimum Operating Voltage (OPA347SA)  
Quiescent Current (per amplifier)  
over Temperature  
2.3  
2.4  
20  
IQ  
IO = 0  
34  
38  
TEMPERATURE RANGE  
Specified Range  
Operating Range  
–55  
–65  
–65  
125  
150  
150  
°C  
°C  
°C  
Storage Range  
Thermal Resistance  
SOT23-5 Surface-Mount  
SOT23-8 Surface-Mount  
SO-8 Surface-Mount  
SO-14 Surface-Mount  
TSSOP-14 Surface-Mount  
DIP-8  
θJA  
200  
150  
150  
100  
100  
100  
250  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
SC70-5 Surface-Mount  
NOTE: (1) Input bias current for the OPA2347YED package is specified in the absence of light. See the Photosensitivity section for further detail.  
OPA347, 2347, 4347  
3
SBOS167C  
www.ti.com  
TYPICAL CHARACTERISTICS  
At TA = +25°C, VS = +5V, and RL = 100kconnected to VS/2, unless otherwise noted.  
POWER-SUPPLY AND COMMON-MODE  
REJECTION vs FREQUENCY  
OPEN-LOOP GAIN/PHASE vs FREQUENCY  
100  
80  
60  
40  
20  
0
0
100  
80  
60  
40  
20  
0
–30  
–60  
–90  
–120  
–150  
–180  
PSRR  
CMRR  
–20  
10  
100  
1k  
10k  
100k  
1M  
10  
100  
1k  
10k  
100k  
1M  
Frequency (Hz)  
Frequency (Hz)  
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY  
VS = 5.5V  
CHANNEL SEPARATION vs FREQUENCY  
6
140  
120  
100  
80  
5
4
3
2
1
0
V
V
S = 5.0V  
S = 2.5V  
60  
1k  
10k  
100k  
Frequency (Hz)  
1M  
10  
100  
1k  
10k  
100k  
1M  
Frequency (Hz)  
QUIESCENT AND SHORT-CIRCUIT CURRENT  
vs SUPPLY VOLTAGE  
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT  
V+  
(V+) – 1  
(V+) – 2  
30  
25  
20  
15  
10  
25  
20  
15  
10  
5
Sourcing  
–55°C  
–55°C  
125°C  
25°C  
IQ  
2
1
0
Sinking  
ISC  
0
5
10  
15  
20  
25  
2.0  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
Output Current (±mA)  
Supply Voltage (V)  
OPA347, 2347, 4347  
4
SBOS167C  
www.ti.com  
TYPICAL CHARACTERISTICS (Cont.)  
At TA = +25°C, VS = +5V, and RL = 100kconnected to VS/2, unless otherwise noted.  
OPEN-LOOP GAIN AND POWER-SUPPLY  
REJECTION vs TEMPERATURE  
COMMON-MODE REJECTION vs TEMPERATURE  
100  
130  
120  
110  
100  
90  
90  
V– < VCM < (V+) – 1.7V  
AOL  
80  
70  
V– < VCM < V+  
60  
PSRR  
50  
40  
80  
70  
–75 –50 –25  
0
25  
50  
75 100 125 150  
–75 –50 –25  
0
25  
50  
75 100 125 150  
Temperature (°C)  
Temperature (°C)  
QUIESCENT AND SHORT-CIRCUIT CURRENT  
vs TEMPERATURE  
INPUT BIAS CURRENT vs TEMPERATURE  
30  
25  
20  
15  
10  
10k  
1k  
25  
20  
15  
10  
5
ISC  
100  
10  
IQ  
1
0.1  
–50 –25  
0
25  
50  
75  
100 125 150  
–75  
125  
–75 –50 –25  
0
25  
50  
75  
100  
150  
Temperature (°C)  
Temperature (°C)  
OFFSET VOLTAGE DRIFT MAGNITUDE  
PRODUCTION DISTRIBUTION  
OFFSET VOLTAGE PRODUCTION DISTRIBUTION  
25  
20  
15  
10  
5
18  
16  
14  
12  
10  
8
Typical production  
distribution of  
packaged units.  
6
4
2
0
0
1
2
3
4
5
6
7
8
9
10 11 12  
–6 –5 –4 –3 –2 –1  
0
1
2
3
4
5
6
Offset Voltage (mV)  
Offset Voltage Drift (µV/°C)  
OPA347, 2347, 4347  
5
SBOS167C  
www.ti.com  
TYPICAL CHARACTERISTICS (Cont.)  
At TA = +25°C, VS = +5V, and RL = 100kconnected to VS/2, unless otherwise noted.  
SMALL-SIGNAL OVERSHOOT  
vs LOAD CAPACITANCE  
SMALL-SIGNAL OVERSHOOT  
vs LOAD CAPACITANCE  
60  
50  
40  
30  
20  
10  
0
G = –1V/V  
G = ±5V/V  
FB = 100kΩ  
RFB = 100kΩ  
R
50  
40  
30  
20  
10  
0
G = +1V/V  
RL = 100kΩ  
G = –1V/V  
FB = 5kΩ  
R
10  
100  
1k  
10k  
10  
100  
1k  
10k  
Load Capacitance (pF)  
Load Capacitance (pF)  
SMALL-SIGNAL STEP RESPONSE  
SMALL-SIGNAL STEP RESPONSE  
G = +1V/V, RL = 100k, CL = 100pF  
G = +1V/V, RL = 5k, CL = 100pF  
10µs/div  
10µs/div  
LARGE-SIGNAL STEP RESPONSE  
INPUT VOLTAGE AND CURRENT NOISE  
SPECTRAL DENSITY vs FREQUENCY  
G = +1V/V, RL = 100k, CL = 100pF  
10k  
1k  
100  
10  
1.0  
0.1  
100  
10  
20µs/div  
1
10  
100  
1k  
10k  
100k  
Frequency (Hz)  
OPA347, 2347, 4347  
6
SBOS167C  
www.ti.com  
OPERATING VOLTAGE  
APPLICATIONS INFORMATION  
The OPA347 series op amps are unity-gain stable and can  
operate on a single supply, making them highly versatile and  
easy to use.  
The OPA347 series op amps are fully specified and en-  
sured from 2.5V to 5.5V. In addition, many specifications  
apply from –55°C to +125°C. Parameters that vary signifi-  
cantly with operating voltages or temperature are shown in  
the Typical Characteristics.  
Rail-to-rail input and output swing significantly increases dy-  
namic range, especially in low supply applications. Figure 1  
shows the input and output waveforms for the OPA347 in  
unity-gain configuration. Operation is from VS = +5V with a  
100kload connected to VS/2. The input is a 5VPP sinusoid.  
RAIL-TO-RAIL INPUT  
The input common-mode voltage range of the OPA347  
series extends 200mV beyond the supply rails. This is  
achieved with a complementary input stage—an N-channel  
input differential pair in parallel with a P-channel differential  
pair, as shown in Figure 2. The N-channel pair is active for  
input voltages close to the positive rail, typically (V+) – 1.3V  
to 200mV above the positive supply, while the P-channel pair  
is on for inputs from 200mV below the negative supply to  
approximately (V+) – 1.3V. There is a small transition region,  
typically (V+) – 1.5V to (V+) – 1.1V, in which both pairs are  
on. This 400mV transition region can vary 300mV with  
process variation. Thus, the transition region (both stages  
on) can range from (V+) – 1.65V to (V+) – 1.25V on the low  
end, up to (V+) – 1.35V to (V+) – 0.95V on the high end.  
Within the 400mV transition region PSRR, CMRR, offset  
voltage, and offset drift may be degraded compared to  
operation outside this region. For more information on de-  
signing with rail-to-rail input op amps, see Figure 3, Design  
Optimization with Rail-to-Rail Input Op Amps.  
Output voltage is approximately 4.995VPP  
.
Power-supply pins should be bypassed with 0.01µF ceramic  
capacitors.  
G = +1, VS = +5V  
Input  
5V  
1V/div  
0V  
Output (inverted on scope)  
20µs/div  
FIGURE 1. Rail-to-Rail Input and Output.  
V+  
Reference  
Current  
VIN+  
VIN–  
VBIAS1  
Class AB  
Control  
VO  
Circuitry  
VBIAS2  
V–  
(Ground)  
FIGURE 2. Simplified Schematic.  
OPA347, 2347, 4347  
7
SBOS167C  
www.ti.com  
DESIGN OPTIMIZATION WITH RAIL-TO-RAIL INPUT OP AMPS  
Rail-to-rail op amps can be used in virtually any op amp  
With a unity-gain buffer, for example, signals will traverse  
this transition at approximately 1.3V below the V+ supply  
and may exhibit a small discontinuity at this point.  
configuration. To achieve optimum performance, how-  
ever, applications using these special double-input-stage  
op amps may benefit from consideration of their special  
behavior.  
The common-mode voltage of the noninverting amplifier  
is equal to the input voltage. If the input signal always  
remains less than the transition voltage, no discontinuity  
will be created. The closed-loop gain of this configuration  
can still produce a rail-to-rail output.  
In many applications, operation remains within the com-  
mon-mode range of only one differential input pair. How-  
ever, some applications exercise the amplifier through the  
transition region of both differential input stages. A small  
discontinuity may occur in this transition. Careful selection  
of the circuit configuration, signal levels, and biasing can  
often avoid this transition region.  
Inverting amplifiers have a constant common-mode volt-  
age equal to VB. If this bias voltage is constant, no  
discontinuity will be created. The bias voltage can gener-  
ally be chosen to avoid the transition region.  
Unity-Gain Buffer  
Noninverting Amplifier  
Inverting Amplifier  
V+  
V+  
V+  
VB  
VIN  
VO  
VO  
VO  
VIN  
VIN  
VB  
VCM = VIN = VO  
VCM = VIN  
VCM = VB  
FIGURE 3. Design Optimization with Rail-to-Rail Input Op Amps.  
COMMON-MODE REJECTION  
The CMRR for the OPA347 is specified in several ways so  
the best match for a given application may be used. First, the  
CMRR of the device in the common-mode range below the  
transition region (VCM < (V+) – 1.7V) is given. This specifica-  
tion is the best indicator of the capability of the device when  
the application requires use of one of the differential input  
pairs. Second, the CMRR at VS = 5.5V over the entire  
common-mode range is specified.  
5.5V  
0V  
–0.5V  
INPUT VOLTAGE  
200µs/div  
The input common-mode range extends from (V–) – 0.2V to  
(V+) + 0.2V. For normal operation, inputs should be limited  
to this range. The absolute maximum input voltage is 500mV  
beyond the supplies. Inputs greater than the input  
common-mode range but less than the maximum input  
voltage, while not valid, will not cause any damage to the op  
amp. Furthermore, if input current is limited the inputs may go  
beyond the power supplies without phase inversion, as  
shown in Figure 4, unlike some other op amps.  
FIGURE 4. OPA347—No Phase Inversion with Inputs Greater  
than the Power-Supply Voltage.  
+5V  
IOVERLOAD  
Normally, input currents are 0.4pA. However, large inputs  
(greater than 500mV beyond the supply rails) can cause  
excessive current to flow in or out of the input pins. There-  
fore, as well as keeping the input voltage below the maxi-  
mum rating, it is also important to limit the input current to  
less than 10mA. This is easily accomplished with an input  
resistor, as shown in Figure 5.  
10mA max  
VOUT  
OPA347  
VIN  
5kΩ  
FIGURE 5. Input Current Protection for Voltages Exceeding  
the Supply Voltage.  
OPA347, 2347, 4347  
8
SBOS167C  
www.ti.com  
RAIL-TO-RAIL OUTPUT  
load, reducing the resistor values from 100kto 5kde-  
creases overshoot from 40% to 8% (see the characteristic  
curve Small-Signal Overshoot vs Load Capacitance). How-  
ever, when large-valued resistors can not be avoided, a  
small (4pF to 6pF) capacitor, CFB, can be inserted in the  
feedback, as shown in Figure 7. This significantly reduces  
overshoot by compensating the effect of capacitance, CIN,  
which includes the amplifier input capacitance and PC board  
A class AB output stage with common-source transistors is  
used to achieve rail-to-rail output. This output stage is ca-  
pable of driving 5kloads connected to any potential be-  
tween V+ and ground. For light resistive loads (> 100k), the  
output voltage can typically swing to within 5mV from supply  
rail. With moderate resistive loads (10kto 50k), the output  
can swing to within a few tens of millivolts from the supply  
rails while maintaining high open-loop gain (see the typical  
characteristic Output Voltage Swing vs Output Current).  
parasitic capacitance.  
CFB  
RF  
CAPACITIVE LOAD AND STABILITY  
The OPA347 in a unity-gain configuration can directly drive  
up to 250pF pure capacitive load. Increasing the gain en-  
hances the amplifier’s ability to drive greater capacitive loads  
(see the characteristic curve Small-Signal Overshoot vs  
Capacitive Load). In unity-gain configurations, capacitive  
load drive can be improved by inserting a small (10to 20)  
resistor, RS, in series with the output, as shown in Figure 6.  
This significantly reduces ringing while maintaining Direct  
Current (DC) performance for purely capacitive loads. How-  
ever, if there is a resistive load in parallel with the capacitive  
load, a voltage divider is created, introducing a DC error at  
the output and slightly reducing the output swing. The error  
introduced is proportional to the ratio RS/RL, and is generally  
negligible.  
RI  
VIN  
VOUT  
OPA347  
CIN  
CL  
FIGURE 7. Adding a Feedback Capacitor In the Unity-Gain  
Inverter Configuration Improves Capacitative  
Load.  
DRIVING ADCs  
The OPA347 series op amps are optimized for driving  
medium-speed sampling Analog-to-Digital Converters (ADCs).  
The OPA347 op amps buffer the ADC’s input capacitance  
and resulting charge injection while providing signal gain.  
V+  
RS  
VOUT  
OPA347  
See Figure 8 for the OPA347 in a basic noninverting configu-  
ration driving the ADS7822. The ADS7822 is a 12-bit,  
microPower sampling converter in the MSOP-8 package.  
When used with the low-power, miniature packages of the  
OPA347, the combination is ideal for space-limited, low-  
power applications. In this configuration, an RC network at  
the ADC input can be used to provide for anti-aliasing filter  
and charge injection current.  
10to  
20Ω  
VIN  
CL  
RL  
FIGURE 6. Series Resistor in Unity-Gain Buffer Configura-  
tion Improves Capacitive Load Drive.  
See Figure 9 for the OPA2347 driving an ADS7822 in a  
speech bandpass filtered data acquisition system. This small,  
low-cost solution provides the necessary amplification and  
signal conditioning to interface directly with an electret micro-  
phone. This circuit will operate with VS = 2.7V to 5V with less  
than 250µA typical quiescent current.  
In unity-gain inverter configuration, phase margin can be  
reduced by the reaction between the capacitance at the op  
amp input, and the gain setting resistors, thus degrading  
capacitive load drive. Best performance is achieved by using  
small valued resistors. For example, when driving a 500pF  
OPA347, 2347, 4347  
9
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+5V  
0.1µF  
0.1µF  
1
VREF  
8
V+  
7
6
5
DCLOCK  
DOUT  
500Ω  
+In  
2
Serial  
Interface  
ADS7822  
12-Bit ADC  
OPA347  
VIN  
–In  
CS/SHDN  
3
3300pF  
GND  
4
VIN = 0V to 5V for  
0V to 5V output.  
NOTE: ADC Input = 0V to VREF  
RC network filters high-frequency noise.  
FIGURE 8. OPA347 in Noninverting Configuration Driving ADS7822.  
V+ = +2.7V to 5V  
Passband 300Hz to 3kHz  
R9  
510kΩ  
R1  
R4  
R2  
1.5kΩ  
20kΩ  
1MΩ  
C3  
C
1
33pF  
1000pF  
R7  
51kΩ  
R8  
150kΩ  
V
8
+
1
VREF  
1/2  
7
6
DCLOCK  
DOUT  
OPA2347  
+IN  
2
–IN  
1/2  
OPA2347  
R3  
1MΩ  
ADS7822  
12-Bit A/D  
Electret  
Microphone(1)  
Serial  
Interface  
C2  
1000pF  
R6  
100kΩ  
5
CS/SHDN  
3
4
G = 100  
NOTE: (1) Electret microphone  
powered by R1.  
R5  
20kΩ  
GND  
FIGURE 9. Speech Bandpass Filtered Data Acquisition System.  
OPA347, 2347, 4347  
10  
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OPA2347 WCSP PACKAGE  
PACKAGE DIMENSIONS  
The OPA2347YED is a die-level package using bump-on-pad  
technology. Unlike plastic packages, the OPA2347YED has no  
molding compound, lead frame, wire bonds, or leads. Using  
standard surface-mount assembly procedures, the WCSP can  
be mounted to a printed circuit board without additional under  
fill. Figures 10 and 11 detail pinout and package marking.  
The OPA2347YED is transported in tape and reel media and  
is described in Table I and Figure 12. Pin 1 orientation is  
consistent throughout the tape and reel carrier, with balls  
facing down in each pocket of the carrier tape. The location  
of Pin 1 is specified in Figure 12.  
DIMENSIONS (mm)  
Pocket Width, A0  
OPA2347YED  
1.12 ± 0.10  
2.13 ± 0.10  
0.61 ± 0.10  
4.00 ± 0.10  
3.50 ± 0.05  
2.00 ± 0.05  
4.00 ± 0.10  
8.00 ± 0.30  
TBD  
OPA2347  
(bump side down)  
Not to Scale  
Pocket Length, B0  
Pocket Depth, K0  
Pocket Pitch, P1  
V+  
Out A  
–In A  
+In A  
V–  
1
2
3
4
8
7
6
5
Sprocket Hole-to-Pocket Centerline, F  
Sprocket Hole-to-Pocket Offset, P2  
Sprocket Hole Pitch, P0  
Tape Width, W  
Out B  
–In B  
+In B  
Reel Diameter, Max  
WCSP-8  
(top view)  
TABLE I. Carrier Tape Dimensions.  
FIGURE 10. Pin Description.  
P2  
1.75 ± 0.10  
E1  
P0  
1.50 ± 0.10  
0.229  
OPA2347YED  
Top View  
Y
+
+
+
+
+
+
+
B0  
Pin 1(1)  
F
W
Actual Size:  
CL  
Package Marking Code:  
YMD = year/month/day  
CC = indicates OPA2347  
S = for engineering purposes only  
+
+
+
+
+
+
5°  
Exact Size:  
1.008mm x 2.100mm  
Y
P1  
NOTE: (1) Pin 1 location is  
in the upper left-hand corner  
of the cavity. Units are shipped  
with bumps down.  
A0  
KO  
Section Y – Y Dimensions in mm  
(bump side down)  
FIGURE 11. Top View Package Marking.  
FIGURE 12. Tape and Reel Carrier Tape Diagram.  
PHOTOSENSITIVITY  
LAND PATTERNS AND ASSEMBLY  
Although the OPA2347YED package has a protective back-  
side coating that reduces the amount of light exposure on the  
die, unless fully shielded, ambient light will still reach the  
active region of the device. Input bias current for the  
OPA2347YED package is specified in the absence of light.  
Depending on the amount of light exposure in a given  
application, an increase in bias current, and possible in-  
creases in offset voltage should be expected. In circuit board  
tests under ambient light conditions, a typical increase in bias  
current reached 100pA. Flourescent lighting may introduce  
noise or hum due to their time varying light output. Best  
practice should include end-product packaging that provides  
shielding from possible light souces during operation.  
The recommended land pattern for the OPA2347YED package  
is detailed in Figure 13 with specifications listed in Table III.  
The maximum amount of force during assembly should be  
limited to 30 grams of force per bump.  
RELIABILITY TESTING  
To ensure reliability, the OPA2347YED has been verified to  
successfully pass a series of reliability stress tests. A sum-  
mary of JEDEC standard reliability tests is shown in Table II.  
TEST  
CONDITION  
ACCEPT CRITERIA (ACTUAL)  
SAMPLE SIZE  
Temperature Cycle  
–40°C to 125°C, 1 Cycle/hr, 15 Minute Ramp(1)  
10 Minute Dwell  
500 (1600) Cycles, R < 1.2X from R0  
10 (129) Drops, R < 1.2X from R0  
5K (6.23K) Cycles, R < 1.2X from R0  
36  
8
Drop  
50cm  
Key Push  
100 Cycles/min,  
8
1300 µε, Displacement = 2.7mm Max  
3 Point Bend  
Strain Rate 5 mm/min, 85 mm Span  
R < 1.2X from R0  
8
NOTE: (1) Per IPC9701.  
TABLE II. Reliability Test Results.  
OPA347, 2347, 4347  
11  
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FIGURE 13. Recommended Land Area.  
SOLDER PAD  
DEFINITION  
SOLDER MASK  
OPENING  
COPPER  
THICKNESS  
COPPER PAD  
STENCIL OPENING  
STENCIL THICKNESS  
Non-Solder Mask  
Defined (NSMD)  
275µm  
(+0.0, –25µm)  
375µm  
(+0.0, –25µm)  
1 oz max  
275µm X 275µm, sq  
125µm Thick  
NOTES: (1) Circuit traces from NSMD-defined PWB lands should be less tham 100µm (preferrably = 75µm) wide in the exposed area inside the solder mask  
opening. Wider trace widths will reduce device stand off and impact reliability. (2) Recommended solder paste is type 3 or type 4. (3) Best reliability results are  
achieved when the PWB laminate glass transistion temperature is above the operating range of the intended application. (4) For PWB using an Ni/Au surface  
finish, the gold thickness should be less than 0.5um to avoid solder embrittlement and a reduction in thermal fatigue performance. (5) Solder mask thickness  
should be less than 20um on top of the copper circuit pattern. (6) Best solder stencil performance will be achieved using laser-cut stencils with electro polishing.  
Use of chemically etched stencils results in inferior solder paste volume control. (7) Trace routing away from the WLCSP device should be balanced in X and  
Y directions to avoid unintentional component movement due to solder wetting forces.  
TABLE III. Recommended Land Pattern.  
OPA347, 2347, 4347  
12  
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PACKAGE DRAWINGS  
DBV (R-PDSO-G5)  
PLASTIC SMALL-OUTLINE  
0,50  
0,30  
M
0,20  
0,95  
5
4
0,15 NOM  
1,70  
1,50  
3,00  
2,60  
1
3
Gage Plane  
3,00  
2,80  
0,25  
0° – 8°  
0,55  
0,35  
Seating Plane  
0,10  
1,45  
0,95  
0,05 MIN  
4073253-4/G 01/02  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion.  
D. Falls within JEDEC MO-178  
OPA347, 2347, 4347  
13  
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PACKAGE DRAWINGS (Cont.)  
P (R-PDIP-T8)  
PLASTIC DUAL-IN-LINE  
0.400 (10,60)  
0.355 (9,02)  
8
5
0.260 (6,60)  
0.240 (6,10)  
1
4
0.070 (1,78) MAX  
0.325 (8,26)  
0.300 (7,62)  
0.020 (0,51) MIN  
0.015 (0,38)  
Gage Plane  
0.200 (5,08) MAX  
Seating Plane  
0.010 (0,25) NOM  
0.125 (3,18) MIN  
0.100 (2,54)  
0.021 (0,53)  
0.430 (10,92)  
MAX  
0.010 (0,25)  
M
0.015 (0,38)  
4040082/D 05/98  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. Falls within JEDEC MS-001  
OPA347, 2347, 4347  
14  
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PACKAGE DRAWINGS (Cont.)  
D (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
8 PINS SHOWN  
0.020 (0,51)  
0.014 (0,35)  
0.050 (1,27)  
0.010 (0,25)  
8
5
0.244 (6,20)  
0.228 (5,80)  
0.008 (0,20) NOM  
0.157 (4,00)  
0.150 (3,81)  
Gage Plane  
1
4
0.010 (0,25)  
0°– 8°  
A
0.044 (1,12)  
0.016 (0,40)  
Seating Plane  
0.010 (0,25)  
0.069 (1,75) MAX  
0.004 (0,10)  
0.004 (0,10)  
PINS **  
8
14  
16  
DIM  
A MAX  
0.197  
(5,00)  
0.344  
(8,75)  
0.394  
(10,00)  
0.189  
(4,80)  
0.337  
(8,55)  
0.386  
(9,80)  
A MIN  
4040047/E 09/01  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).  
D. Falls within JEDEC MS-012  
OPA347, 2347, 4347  
15  
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PACKAGE DRAWINGS (Cont.)  
DCK (R-PDSO-G5)  
PLASTIC SMALL-OUTLINE  
0,30  
0,15  
M
0,10  
0,65  
5
4
0,13 NOM  
1,40 2,30  
1,10 1,90  
1
3
Gage Plane  
2,15  
1,85  
0,15  
0°–8°  
0,46  
0,26  
Seating Plane  
0,10  
1,10  
0,80  
0,10  
0,00  
4093553/B 06/99  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion.  
D. Falls within JEDEC MO-203  
OPA347, 2347, 4347  
16  
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PACKAGE DRAWINGS (Cont.)  
DCN (R-PDSO-G8)  
PLASTIC SMALL-OUTLINE  
0,45  
0,28  
0,65  
1,75 3,00  
1,50 2,60  
Index  
Area  
1,95 REF  
3,00  
2,80  
1,45  
0,90  
0°–10°  
–A–  
1,30  
0,90  
0,20  
0,09  
0,60  
0,10  
0,15  
0,00  
C
4202106/A 03/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Foot length measured reference to flat foot surface  
parallel to Datum A.  
D. Package outline exclusive of mold flash, metal burr and  
dambar protrusion/intrusion.  
E. Package outline inclusive of solder plating.  
F. A visual index feature must be located within the  
cross-hatched area.  
OPA347, 2347, 4347  
17  
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PACKAGE DRAWINGS (Cont.)  
OPA347, 2347, 4347  
18  
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PACKAGE DRAWINGS (Cont.)  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
OPA347, 2347, 4347  
19  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
6-Aug-2004  
PACKAGING INFORMATION  
ORDERABLE DEVICE  
STATUS(1)  
PACKAGE TYPE  
PACKAGE DRAWING  
PINS  
PACKAGE QTY  
OPA2347EA/250  
OPA2347EA/3K  
OPA2347UA  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SSOP  
SSOP  
SOIC  
SOIC  
XCEPT  
XCEPT  
SOP  
DCN  
DCN  
D
8
8
250  
3000  
100  
8
OPA2347UA/2K5  
OPA2347YEDR  
OPA2347YEDT  
OPA347NA/250  
OPA347NA/3K  
OPA347PA  
D
8
2500  
3000  
250  
YED  
YED  
DBV  
DBV  
P
8
8
5
250  
SOP  
5
3000  
50  
PDIP  
8
OPA347SA/250  
OPA347SA/3K  
OPA347UA  
SOP  
DCK  
DCK  
D
5
250  
SOP  
5
3000  
100  
SOIC  
SOIC  
TSSOP  
TSSOP  
SOIC  
SOIC  
8
OPA347UA/2K5  
OPA4347EA/250  
OPA4347EA/2K5  
OPA4347UA  
D
8
2500  
250  
PW  
PW  
D
14  
14  
14  
14  
2500  
58  
OPA4347UA/2K5  
D
2500  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,  
enhancements, improvements, and other changes to its products and services at any time and to discontinue  
any product or service without notice. Customers should obtain the latest relevant information before placing  
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms  
and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI  
deems necessary to support this warranty. Except where mandated by government requirements, testing of all  
parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for  
their products and applications using TI components. To minimize the risks associated with customer products  
and applications, customers should provide adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,  
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process  
in which TI products or services are used. Information published by TI regarding third-party products or services  
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.  
Use of such information may require a license from a third party under the patents or other intellectual property  
of the third party, or a license from TI under the patents or other intellectual property of TI.  
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without  
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction  
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for  
such altered documentation.  
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that  
product or service voids all express and any implied warranties for the associated TI product or service and  
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.  
Following are URLs where you can obtain information on other Texas Instruments products and application  
solutions:  
Products  
Applications  
Audio  
Amplifiers  
amplifier.ti.com  
www.ti.com/audio  
Data Converters  
dataconverter.ti.com  
Automotive  
www.ti.com/automotive  
DSP  
dsp.ti.com  
Broadband  
Digital Control  
Military  
www.ti.com/broadband  
www.ti.com/digitalcontrol  
www.ti.com/military  
Interface  
Logic  
interface.ti.com  
logic.ti.com  
Power Mgmt  
Microcontrollers  
power.ti.com  
Optical Networking  
Security  
www.ti.com/opticalnetwork  
www.ti.com/security  
www.ti.com/telephony  
www.ti.com/video  
microcontroller.ti.com  
Telephony  
Video & Imaging  
Wireless  
www.ti.com/wireless  
Mailing Address:  
Texas Instruments  
Post Office Box 655303 Dallas, Texas 75265  
Copyright 2004, Texas Instruments Incorporated  
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