OPA4347UAG4应用文章市场行情现货热卖使用介绍供应商报价-中国IC网-芯三七

OPA347

OPA2347

OPA4347

O

®

P

OPA347

O

A

P

3

4

A

7

3

4

7

O

P

A

4

A

2

3

4

7

SBOS167D – NOVEMBER 2000– REVISED JULY 2007

microPower, Rail-to-Rail

Operational Amplifiers

FEATURES

ꢀ LOW I_Q: 20µA

DESCRIPTION

The OPA347 is a microPower, low-cost operational amplifier

available in micropackages. The OPA347 (single version) is

available in the SC-70 and SOT23-5 packages. The OPA2347

(dual version) is available in the SOT23-8 and WCSP-8

packages. Both are also available in the SO-8. The OPA347

is also available in the DIP-8. The OPA4347 (quad) is

available in the SO-14 and the TSSOP-14.

ꢀ microSIZE PACKAGES: WCSP-8, SC70-5

SOT23-5, SOT23-8, and TSSOP-14

ꢀ HIGH SPEED/POWER RATIO WITH

ꢀBANDWIDTH: 350kHz

ꢀ RAIL-TO-RAIL INPUT AND OUTPUT

ꢀ SINGLE SUPPLY: 2.3V to 5.5V

The small size and low power consumption (34µA per chan-

nel maximum) of the OPA347 make it ideal for portable and

battery-powered applications. The input range of the OPA347

extends 200mV beyond the rails, and the output range is

within 5mV of the rails. The OPA347 also features an

excellent speed/power ratio with a bandwidth of 350kHz.

APPLICATIONS

ꢀꢀPORTABLE EQUIPMENT

ꢀꢀBATTERY-POWERED EQUIPMENT

ꢀꢀ2-WIRE TRANSMITTERS

ꢀꢀSMOKE DETECTORS

The OPA347 can be operated with a single or dual power

supply from 2.3V to 5.5V. All models are specified for

operation from –55°C to +125°C.

ꢀꢀCO DETECTORS

OPA347

Out

V–

1

2

3

5

4

V+

OPA4347

+In

V–

–In

1

2

3

5

4

V+

OPA2347

(bump side down)

Not to Scale

Out A

–In A

+In A

V+

1

2

3

4

5

6

7

14 Out D

13 –In D

12 +In D

11 V–

Out

+In

–In

SC70-5

A

B

D

C

V+

Out A

–In A

+In A

V–

1

2

3

4

8

7

6

5

SOT23-5

Out B

–In B

+In B

OPA347

OPA2347

+In B

–In B

Out B

10 +In C

NC

V+

NC

–In

+In

V–

1

8

Out A

–In A

+In A

V–

1

2

3

4

8

7

6

5

V+

9

8

–In C

A

2

3

4

7

6

5

Out B

–In B

+In B

Out C

WCSP-8

(top view)

B

Out

NC

TSSOP-14, SO-14

SO-8, DIP-8

SOT23-8, SO-8

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

www.ti.com

ABSOLUTE MAXIMUM RATINGS⁽¹⁾

ELECTROSTATIC

DISCHARGE SENSITIVITY

Supply Voltage, V+ to V–................................................................... 7.5V

Signal Input Terminals, Voltage⁽²⁾.................. (V–) – 0.5V to (V+) + 0.5V

Current⁽²⁾.................................................... 10mA

This integrated circuit can be damaged by ESD. Texas

Instruments recommends that all integrated circuits be handled

with appropriate precautions. Failure to observe proper

handling and installation procedures can cause damage.

Output Short-Circuit⁽³⁾.............................................................. Continuous

Operating Temperature ..................................................–65°C to +150°C

Storage Temperature .....................................................–65°C to +150°C

Junction Temperature ...................................................................... 150°C

NOTES: (1) Stresses above these ratings may cause permanent damage.

Exposure to absolute maximum conditions for extended periods may

degrade device reliability. These are stress ratings only. Functional opera-

tion of the device at these conditions, or beyond the specified operating

conditions, is not implied. (2) Input terminals are diode-clamped to the

power-supply rails. Input signals that can swing more than 0.5V beyond the

supply rails should be current-limited to 10mA or less. (3) Short-circuit to

ground, one amplifier per package.

ESD damage can range from subtle performance degrada-

tion to complete device failure. Precision integrated circuits

may be more susceptible to damage because very small

parametric changes could cause the device not to meet its

published specifications.

PACKAGE/ORDERING INFORMATION⁽¹⁾

PACKAGE

DESIGNATOR

PACKAGE

MARKING

PRODUCT

PACKAGE/LEAD

OPA347NA

SOT23-5

DBV

A47

"

DIP-8

SO-8

"

SC-70

"

P

D

"

OPA347PA

OPA347UA

"

S47

"

OPA347SA

DCK

"

OPA2347EA

SOT23-8

DCN

B47

"

SO-8

"

D

"

OPA2347UA

"

OPA2347YED

"

OPA2347YZDR

WCSP-8

YED

"

YZD

YMD CCS

"

A9

Lead-Free WCSP-8

OPA4347EA

TSSOP-14

PW

"

OPA4347EA

"

SO-14

"

OPA4347UA

D

OPA4347UA

"

NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this data sheet, or see the TI web site at www.ti.com.

OPA347, 2347, 4347

2

SBOS167D

www.ti.com

ELECTRICAL CHARACTERISTICS: V_S= 2.5V to 5.5V

Boldface limits apply over the specified temperature range, T_A= –55°C to +125°C.

At T_A= +25°C, R_L= 100kΩ connected to V_S/2 and V_OUT= V_S/2, unless otherwise noted.

OPA347NA, UA, PA, SA

OPA2347EA, UA, YED

OPA4347EA, UA

PARAMETER

CONDITION

MIN

TYP

MAX

UNITS

OFFSET VOLTAGE

Input Offset Voltage

over Temperature

Drift

vs Power Supply

over Temperature

Channel Separation, DC

V_OS

V_S= 5.5V, V_CM= (V–) + 0.8V

2

3

6

7

mV

dV_OS/dT

PSRR

µV/°C

µV/V

dB

V_S= 2.5V to 5.5V, V_CM< (V+) – 1.7V

60

175

300

0.3

128

f = 1kHz

INPUT VOLTAGE RANGE

Common-Mode Voltage Range

Common-Mode Rejection Ratio

over Temperature

V_CM

CMRR

(V–) – 0.2

(V+) + 0.2

V

V_S= 5.5V, (V–) – 0.2V < V_CM< (V+) – 1.7V

V_S= 5.5V, V– < V_CM< (V+) – 1.7V

Vs = 5.5V, (V–) – 0.2V < V_CM< (V+) + 0.2V

Vs = 5.5V, V– < V_CM< V+

70

66

54

48

80

70

dB

over Temperature

INPUT BIAS CURRENT⁽¹⁾

Input Bias Current

Input Offset Current

I_b

I_OS

±0.5

±10

pA

INPUT IMPEDANCE

Differential

Common-Mode

10¹³|| 3

10¹³|| 6

Ω || pF

NOISE

V_CM< (V+) – 1.7V

Input Voltage Noise, f = 0.1Hz to 10Hz

Input Voltage Noise Density, f = 1kHz

Input Current Noise Density, f = 1kHz

12

60

0.7

µV_PP

nV/√Hz

fA/√Hz

e_n

i_n

OPEN-LOOP GAIN

Open-Loop Voltage Gain

over Temperature

A_OLV_S= 5.5V, R_L= 100kΩ, 0.015V < V_O< 5.485V

V_S= 5.5V, R_L= 100k , 0.015V < V_O< 5.485V

V_S= 5.5V, R_L= 5kΩ, 0.125V < V_O< 5.375V

V_S= 5.5V, R_L= 5k , 0.125V < V_O< 5.375V

100

88

100

88

115

dB

Ω

over Temperature

Ω

A

_OL(SC-70 only) V_S= 5.5V, R_L= 5kΩ 0.125V < V_O< 5.375V

96

OUTPUT

Voltage Output Swing from Rail

R_L= 100kΩ, A_OL> 100dB

5

15

125

mV

mA

over Temperature

R_L= 100kΩ, A_OL> 88dB

R_L= 5kΩ, A_OL> 100dB

90

over Temperature

Short-Circuit Current

Capacitive Load Drive

R_L= 5kΩ, A_OL> 88dB

I_SC

C_LOAD

±17

See Typical Characteristics

FREQUENCY RESPONSE

Gain-Bandwidth Product

Slew Rate

Settling Time, 0.1%

0.01%

C_L= 100pF

G = +1

V_S= 5V, 2V Step, G = +1

V_IN× Gain = V_S

GBW

SR

t_S

350

0.17

21

27

23

kHz

V/µs

µs

Overload Recovery Time

POWER SUPPLY

Specified Voltage Range

V_S

2.5

5.5

V

µA

Minimum Operating Voltage

Minimum Operating Voltage (OPA347SA)

Quiescent Current (per amplifier)

over Temperature

2.3

2.4

20

I_Q

I_O= 0

34

38

TEMPERATURE RANGE

Specified Range

Operating Range

–55

–65

125

150

°C

Storage Range

Thermal Resistance

SOT23-5 Surface-Mount

SOT23-8 Surface-Mount

SO-8 Surface-Mount

SO-14 Surface-Mount

TSSOP-14 Surface-Mount

DIP-8

θ_JA

200

150

100

250

°C/W

SC70-5 Surface-Mount

WCSP

NOTE: (1) Input bias current for the OPA2347YED package is specified in the absence of light. See the Photosensitivity section for further detail.

OPA347, 2347, 4347

3

SBOS167D

www.ti.com

TYPICAL CHARACTERISTICS

At T_A= +25°C, V_S= +5V, and R_L= 100kΩ connected to V_S/2, unless otherwise noted.

POWER-SUPPLY AND COMMON-MODE

REJECTION vs FREQUENCY

OPEN-LOOP GAIN/PHASE vs FREQUENCY

100

80

60

40

20

0

100

80

60

40

20

0

–30

–60

–90

–120

–150

–180

PSRR

CMRR

–20

10

100

1k

10k

100k

1M

10

100

1k

10k

100k

1M

Frequency (Hz)

MAXIMUM OUTPUT VOLTAGE vs FREQUENCY

V_S= 5.5V

CHANNEL SEPARATION vs FREQUENCY

6

140

120

100

80

5

4

3

2

1

0

V_S= 5.0V

V_S= 2.5V

60

1k

10k

100k

Frequency (Hz)

1M

10

100

1k

10k

100k

1M

Frequency (Hz)

QUIESCENT AND SHORT-CIRCUIT CURRENT

vs SUPPLY VOLTAGE

OUTPUT VOLTAGE SWING vs OUTPUT CURRENT

V+

(V+) – 1

(V+) – 2

30

25

20

15

10

25

20

15

10

5

Sourcing

–55°C

125°C

25°C

I_Q

2

1

0

Sinking

I_SC

0

5

10

15

20

25

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

Output Current (±mA)

Supply Voltage (V)

OPA347, 2347, 4347

4

SBOS167D

www.ti.com

TYPICAL CHARACTERISTICS (Cont.)

At T_A= +25°C, V_S= +5V, and R_L= 100kΩ connected to V_S/2, unless otherwise noted.

OPEN-LOOP GAIN AND POWER-SUPPLY

REJECTION vs TEMPERATURE

COMMON-MODE REJECTION vs TEMPERATURE

100

130

120

110

100

90

V– < V_CM< (V+) – 1.7V

A_OL

80

70

V– < V_CM< V+

60

PSRR

50

40

80

70

–75 –50 –25

0

25

50

75 100 125 150

–75 –50 –25

0

25

50

75 100 125 150

Temperature (°C)

QUIESCENT AND SHORT-CIRCUIT CURRENT

vs TEMPERATURE

INPUT BIAS CURRENT vs TEMPERATURE

30

25

20

15

10

10k

1k

25

20

15

10

5

I_SC

100

10

I_Q

1

0.1

–50 –25

0

25

50

75

100 125 150

–75

125

–75 –50 –25

0

25

50

75

100

150

Temperature (°C)

OFFSET VOLTAGE DRIFT MAGNITUDE

PRODUCTION DISTRIBUTION

OFFSET VOLTAGE PRODUCTION DISTRIBUTION

25

20

15

10

5

18

16

14

12

10

8

Typical production

distribution of

packaged units.

6

4

2

0

1

2

3

4

5

6

7

8

9

10 11 12

–6 –5 –4 –3 –2 –1

0

1

2

3

4

5

6

Offset Voltage (mV)

Offset Voltage Drift (µV/°C)

OPA347, 2347, 4347

5

SBOS167D

www.ti.com

TYPICAL CHARACTERISTICS (Cont.)

At T_A= +25°C, V_S= +5V, and R_L= 100kΩ connected to V_S/2, unless otherwise noted.

SMALL-SIGNAL OVERSHOOT

vs LOAD CAPACITANCE

SMALL-SIGNAL OVERSHOOT

vs LOAD CAPACITANCE

60

50

40

30

20

10

0

G = –1V/V

G = ±5V/V

R_FB= 100kΩ

50

40

G = +1V/V

R_L= 100kΩ

30

20

G = –1V/V

R_FB= 5kΩ

10

0

10

100

1k

10k

10

100

1k

10k

Load Capacitance (pF)

SMALL-SIGNAL STEP RESPONSE

G = +1V/V, R_L= 100kΩ, C_L= 100pF

G = +1V/V, R_L= 5kΩ, C_L= 100pF

10µs/div

LARGE-SIGNAL STEP RESPONSE

INPUT VOLTAGE AND CURRENT NOISE

SPECTRAL DENSITY vs FREQUENCY

G = +1V/V, R_L= 100kΩ, C_L= 100pF

10k

1k

100

10

1.0

0.1

100

10

20µs/div

1

10

100

1k

10k

100k

Frequency (Hz)

OPA347, 2347, 4347

6

SBOS167D

www.ti.com

OPERATING VOLTAGE

APPLICATIONS INFORMATION

The OPA347 series op amps are unity-gain stable and can

operate on a single supply, making them highly versatile and

easy to use.

The OPA347 series op amps are fully specified and en-

sured from 2.5V to 5.5V. In addition, many specifications

apply from –55°C to +125°C. Parameters that vary signifi-

cantly with operating voltages or temperature are shown in

the Typical Characteristics.

Rail-to-rail input and output swing significantly increases dy-

namic range, especially in low supply applications. Figure 1

shows the input and output waveforms for the OPA347 in

unity-gain configuration. Operation is from V_S= +5V with a

100kΩ load connected to V_S/2. The input is a 5V_PPsinusoid.

RAIL-TO-RAIL INPUT

The input common-mode voltage range of the OPA347

series extends 200mV beyond the supply rails. This is

achieved with a complementary input stage—an N-channel

input differential pair in parallel with a P-channel differential

pair, as shown in Figure 2. The N-channel pair is active for

input voltages close to the positive rail, typically (V+) – 1.3V

to 200mV above the positive supply, while the P-channel pair

is on for inputs from 200mV below the negative supply to

approximately (V+) – 1.3V. There is a small transition region,

typically (V+) – 1.5V to (V+) – 1.1V, in which both pairs are

on. This 400mV transition region can vary 300mV with

process variation. Thus, the transition region (both stages

on) can range from (V+) – 1.65V to (V+) – 1.25V on the low

end, up to (V+) – 1.35V to (V+) – 0.95V on the high end.

Within the 400mV transition region PSRR, CMRR, offset

voltage, and offset drift may be degraded compared to

operation outside this region. For more information on de-

signing with rail-to-rail input op amps, see Figure 3, Design

Optimization with Rail-to-Rail Input Op Amps.

Output voltage is approximately 4.995V_PP

.

Power-supply pins should be bypassed with 0.01µF ceramic

capacitors.

G = +1, V_S= +5V

Input

5V

1V/div

0V

Output (inverted on scope)

20µs/div

FIGURE 1. Rail-to-Rail Input and Output.

V+

Reference

Current

V_IN

+

V_IN

–

V_BIAS1

Class AB

Control

V_O

Circuitry

V_BIAS2

V–

(Ground)

FIGURE 2. Simplified Schematic.

OPA347, 2347, 4347

7

SBOS167D

www.ti.com

DESIGN OPTIMIZATION WITH RAIL-TO-RAIL INPUT OP AMPS

Rail-to-rail op amps can be used in virtually any op amp

With a unity-gain buffer, for example, signals will traverse

this transition at approximately 1.3V below the V+ supply

and may exhibit a small discontinuity at this point.

configuration. To achieve optimum performance, how-

ever, applications using these special double-input-stage

op amps may benefit from consideration of their special

behavior.

The common-mode voltage of the noninverting amplifier

is equal to the input voltage. If the input signal always

remains less than the transition voltage, no discontinuity

will be created. The closed-loop gain of this configuration

can still produce a rail-to-rail output.

In many applications, operation remains within the com-

mon-mode range of only one differential input pair. How-

ever, some applications exercise the amplifier through the

transition region of both differential input stages. A small

discontinuity may occur in this transition. Careful selection

of the circuit configuration, signal levels, and biasing can

often avoid this transition region.

Inverting amplifiers have a constant common-mode volt-

age equal to V_B. If this bias voltage is constant, no

discontinuity will be created. The bias voltage can gener-

ally be chosen to avoid the transition region.

Unity-Gain Buffer

Noninverting Amplifier

Inverting Amplifier

V+

V_B

V_IN

V_O

V_IN

V_B

V_CM= V_IN= V_O

V_CM= V_IN

V_CM= V_B

FIGURE 3. Design Optimization with Rail-to-Rail Input Op Amps.

COMMON-MODE REJECTION

The CMRR for the OPA347 is specified in several ways so

the best match for a given application may be used. First, the

CMRR of the device in the common-mode range below the

transition region (V_CM< (V+) – 1.7V) is given. This specifica-

tion is the best indicator of the capability of the device when

the application requires use of one of the differential input

pairs. Second, the CMRR at V_S= 5.5V over the entire

common-mode range is specified.

5.5V

0V

–0.5V

INPUT VOLTAGE

200µs/div

The input common-mode range extends from (V–) – 0.2V to

(V+) + 0.2V. For normal operation, inputs should be limited

to this range. The absolute maximum input voltage is 500mV

beyond the supplies. Inputs greater than the input

common-mode range but less than the maximum input

voltage, while not valid, will not cause any damage to the op

amp. Furthermore, if input current is limited the inputs may go

beyond the power supplies without phase inversion, as

shown in Figure 4, unlike some other op amps.

FIGURE 4. OPA347—No Phase Inversion with Inputs Greater

than the Power-Supply Voltage.

+5V

I_OVERLOAD

Normally, input currents are 0.4pA. However, large inputs

(greater than 500mV beyond the supply rails) can cause

excessive current to flow in or out of the input pins. There-

fore, as well as keeping the input voltage below the maxi-

mum rating, it is also important to limit the input current to

less than 10mA. This is easily accomplished with an input

resistor, as shown in Figure 5.

10mA max

V_OUT

OPA347

V_IN

5kΩ

FIGURE 5. Input Current Protection for Voltages Exceeding

the Supply Voltage.

OPA347, 2347, 4347

8

SBOS167D

www.ti.com

RAIL-TO-RAIL OUTPUT

load, reducing the resistor values from 100kΩ to 5kΩ de-

creases overshoot from 40% to 8% (see the characteristic

curve Small-Signal Overshoot vs Load Capacitance). How-

ever, when large-valued resistors can not be avoided, a

small (4pF to 6pF) capacitor, C_FB, can be inserted in the

feedback, as shown in Figure 7. This significantly reduces

overshoot by compensating the effect of capacitance, C_IN,

which includes the amplifier input capacitance and PC board

A class AB output stage with common-source transistors is

used to achieve rail-to-rail output. This output stage is ca-

pable of driving 5kΩ loads connected to any potential be-

tween V+ and ground. For light resistive loads (> 100kΩ), the

output voltage can typically swing to within 5mV from supply

rail. With moderate resistive loads (10kΩ to 50kΩ), the output

can swing to within a few tens of millivolts from the supply

rails while maintaining high open-loop gain (see the typical

characteristic Output Voltage Swing vs Output Current).

parasitic capacitance.

C_FB

R_F

CAPACITIVE LOAD AND STABILITY

The OPA347 in a unity-gain configuration can directly drive

up to 250pF pure capacitive load. Increasing the gain en-

hances the amplifier’s ability to drive greater capacitive loads

(see the characteristic curve Small-Signal Overshoot vs

Capacitive Load). In unity-gain configurations, capacitive

load drive can be improved by inserting a small (10Ω to 20Ω)

resistor, R_S, in series with the output, as shown in Figure 6.

This significantly reduces ringing while maintaining Direct

Current (DC) performance for purely capacitive loads. How-

ever, if there is a resistive load in parallel with the capacitive

load, a voltage divider is created, introducing a DC error at

the output and slightly reducing the output swing. The error

introduced is proportional to the ratio R_S/R_L, and is generally

negligible.

R_I

V_IN

V_OUT

OPA347

C_IN

C_L

FIGURE 7. Adding a Feedback Capacitor In the Unity-Gain

Inverter Configuration Improves Capacitative

Load.

DRIVING ADCs

The OPA347 series op amps are optimized for driving

medium-speed sampling Analog-to-Digital Converters (ADCs).

The OPA347 op amps buffer the ADC’s input capacitance

and resulting charge injection while providing signal gain.

V+

R_S

V_OUT

OPA347

See Figure 8 for the OPA347 in a basic noninverting configu-

ration driving the ADS7822. The ADS7822 is a 12-bit,

microPower sampling converter in the MSOP-8 package.

When used with the low-power, miniature packages of the

OPA347, the combination is ideal for space-limited, low-

power applications. In this configuration, an RC network at

the ADC input can be used to provide for anti-aliasing filter

and charge injection current.

10Ω to

20Ω

V_IN

C_L

R_L

FIGURE 6. Series Resistor in Unity-Gain Buffer Configura-

tion Improves Capacitive Load Drive.

See Figure 9 for the OPA2347 driving an ADS7822 in a

speech bandpass filtered data acquisition system. This small,

low-cost solution provides the necessary amplification and

signal conditioning to interface directly with an electret micro-

phone. This circuit will operate with V_S= 2.7V to 5V with less

than 250µA typical quiescent current.

In unity-gain inverter configuration, phase margin can be

reduced by the reaction between the capacitance at the op

amp input, and the gain setting resistors, thus degrading

capacitive load drive. Best performance is achieved by using

small valued resistors. For example, when driving a 500pF

OPA347, 2347, 4347

9

SBOS167D

www.ti.com

+5V

0.1µF

1

V_REF

8

V+

7

6

5

DCLOCK

D_OUT

500Ω

+In

2

Serial

Interface

ADS7822

12-Bit ADC

OPA347

V_IN

–In

CS/SHDN

3

3300pF

GND

4

V_IN= 0V to 5V for

0V to 5V output.

NOTE: ADC Input = 0V to V_REF

RC network filters high-frequency noise.

FIGURE 8. OPA347 in Noninverting Configuration Driving ADS7822.

V+ = +2.7V to 5V

Passband 300Hz to 3kHz

R₉

510kΩ

R₁

R₄

R₂

1.5kΩ

20kΩ

1MΩ

C₃

C

1

33pF

1000pF

R₇

51kΩ

R₈

150kΩ

V

8

+

1

V_REF

1/2

7

6

DCLOCK

D_OUT

OPA2347

+IN

2

–IN

1/2

OPA2347

R₃

1MΩ

ADS7822

12-Bit A/D

Electret

Microphone⁽¹⁾

Serial

Interface

C₂

1000pF

R₆

100kΩ

5

CS/SHDN

3

4

G = 100

NOTE: (1) Electret microphone

powered by R₁.

R₅

20kΩ

GND

FIGURE 9. Speech Bandpass Filtered Data Acquisition System.

OPA347, 2347, 4347

10

SBOS167D

www.ti.com

OPA2347 WCSP PACKAGE

OPA2347YED

The OPA2347YED and OPA2347YZDR are die-level pack-

ages using bump-on-pad technology. The OPA2347YED de-

vice has tin-lead balls; the OPA2347YZDR has lead-free

balls. Unlike devices that are in plastic packages, these

devices have no molding compound, lead frame, wire bonds,

or leads. Using standard surface-mount assembly procedures,

the WCSP can be mounted to a printed circuit board without

additional under fill. Figures 10 and 11 detail pinout and

package marking.

Top View

Actual Size:

Package Marking Code:

YMD = year/month/day

CC = indicates OPA2347YED

A9 = indicates OPA2347YZD

S = for engineering purposes only

Exact Size:

1.008mm x 2.100mm

(bump side down)

FIGURE 11. Top View Package Marking.

PHOTOSENSITIVITY

OPA2347

(bump side down)

Not to Scale

Although the OPA2347YED/YZD package has a protective

backside coating that reduces the amount of light exposure

on the die, unless fully shielded, ambient light will still reach

the active region of the device. Input bias current for the

OPA2347YED/YZD package is specified in the absence of

light. Depending on the amount of light exposure in a given

application, an increase in bias current, and possible in-

creases in offset voltage should be expected. In circuit board

tests under ambient light conditions, a typical increase in bias

current reached 100pA. Flourescent lighting may introduce

noise or hum due to their time varying light output. Best

practice should include end-product packaging that provides

shielding from possible light souces during operation.

V+

Out A

–In A

+In A

V–

1

2

3

4

8

7

6

5

Out B

–In B

+In B

WCSP-8

(top view)

FIGURE 10. Pin Description.

RELIABILITY TESTING

To ensure reliability, the OPA2347YED and OPA2347YZDR

devices have been verified to successfully pass a series of

reliability stress tests. A summary of JEDEC standard reli-

ability tests is shown in Table I.

TEST

CONDITION

ACCEPT CRITERIA (ACTUAL)

SAMPLE SIZE

Temperature Cycle

–40°C to 125°C, 1 Cycle/hr, 15 Minute Ramp⁽¹⁾

10 Minute Dwell

500 (1600) Cycles, R < 1.2X from R₀

10 (129) Drops, R < 1.2X from R₀

5K (6.23K) Cycles, R < 1.2X from R₀

36

8

Drop

50cm

Key Push

100 Cycles/min,

8

1300 µε, Displacement = 2.7mm Max

3 Point Bend

Strain Rate 5 mm/min, 85 mm Span

R < 1.2X from R₀

8

NOTE: (1) Per IPC9701.

TABLE I. Reliability Test Results.

OPA347, 2347, 4347

11

SBOS167D

www.ti.com

LAND PATTERNS AND ASSEMBLY

The recommended land pattern for the OPA2347YED pack-

age is detailed in Figure 12 with specifications listed in Table

II. The maximum amount of force during assembly should be

limited to 30 grams of force per bump.

FIGURE 12. Recommended Land Area.

SOLDER PAD

DEFINITION

SOLDER MASK

OPENING

COPPER

THICKNESS

COPPER PAD

STENCIL OPENING

STENCIL THICKNESS

Non-Solder Mask

Defined (NSMD)

275µm

(+0.0, –25µm)

375µm

(+0.0, –25µm)

1 oz max

275µm X 275µm, sq

125µm Thick

NOTES: (1) Circuit traces from NSMD-defined PWB lands should be less tham 100µm (preferrably = 75µm) wide in the exposed area inside the solder mask

opening. Wider trace widths will reduce device stand off and impact reliability. (2) Recommended solder paste is type 3 or type 4. (3) Best reliability results are

achieved when the PWB laminate glass transistion temperature is above the operating range of the intended application. (4) For PWB using an Ni/Au surface

finish, the gold thickness should be less than 0.5um to avoid solder embrittlement and a reduction in thermal fatigue performance. (5) Solder mask thickness

should be less than 20um on top of the copper circuit pattern. (6) Best solder stencil performance will be achieved using laser-cut stencils with electro polishing.

Use of chemically etched stencils results in inferior solder paste volume control. (7) Trace routing away from the WLCSP device should be balanced in X and

Y directions to avoid unintentional component movement due to solder wetting forces.

TABLE II. Recommended Land Pattern.

OPA347, 2347, 4347

12

SBOS167D

www.ti.com

PACKAGE OPTION ADDENDUM

www.ti.com

9-Oct-2007

PACKAGING INFORMATION

Orderable Device

OPA2347EA/250

OPA2347EA/250G4

OPA2347EA/3K

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

SOT-23

DCN

8

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SOT-23

SOIC

DCN

D

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

OPA2347EA/3KG4

OPA2347UA

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

OPA2347UA/2K5

OPA2347UA/2K5G4

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

OPA2347UA/2K5Q1

OPA2347UAG4

OBSOLETE

ACTIVE

SOIC

D

8

TBD

Call TI

100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

OPA2347YEDR

OPA2347YEDT

OPA2347YZDR

ACTIVE

DSBGA

YED

YZD

8

3000

250

TBD

SNAGCU

Call TI

Level-1-240C-UNLIM

Level-1-260C-UNLIM

3000 Green (RoHS &

no Sb/Br)

SNAGCU

OPA347NA/250

OPA347NA/250G4

OPA347NA/3K

OPA347NA/3KG4

OPA347PA

ACTIVE

SOT-23

PDIP

DBV

P

5

8

5

8

250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

50 Green (RoHS & CU NIPDAU N / A for Pkg Type

no Sb/Br)

OPA347PAG4

PDIP

P

50 Green (RoHS & CU NIPDAU N / A for Pkg Type

no Sb/Br)

OPA347SA/250

OPA347SA/250G4

OPA347SA/3K

OPA347SA/3KG4

OPA347UA

SC70

SOIC

DCK

D

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

OPA347UA/2K5

OPA347UA/2K5G4

OPA347UAG4

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

SOIC

D

100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

9-Oct-2007

Orderable Device

OPA4347EA/250

OPA4347EA/250G4

OPA4347EA/2K5

OPA4347EA/2K5G4

OPA4347UA

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

TSSOP

PW

14

250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

TSSOP

SOIC

PW

D

250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

58 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

OPA4347UA/2K5

OPA4347UA/2K5G4

OPA4347UAG4

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

SOIC

D

58 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

5-Nov-2007

TAPE AND REEL BOX INFORMATION

Device

Package Pins

Site

Reel

A0 (mm)

B0 (mm)

K0 (mm)

P1

W

Pin1

Diameter Width

(mm) (mm) Quadrant

(mm)

180

330

178

180

330

180

330

(mm)

8

OPA2347EA/250

OPA2347EA/3K

OPA2347UA/2K5

OPA2347YZDR

OPA347NA/250

OPA347NA/3K

OPA347SA/250

OPA347SA/3K

DCN

D

8

SITE 41

SITE 68

SITE 41

SITE 21

SITE 41

3.2

6.4

1.12

3.2

2.3

6.4

7.0

6.5

3.1

1.39

2.1

4

8

4

8

Q3

Q1

Q3

Q1

8

12

8

5.2

12

8

YZD

DBV

DCK

D

8

2.13

3.1

0.71

1.39

1.2

5

8

5

8

3.1

8

5

8

2.52

5.2

8

5

8

1.2

8

OPA347UA/2K5

OPA4347EA/250

OPA4347EA/2K5

OPA4347UA/2K5

8

12

16

2.1

12

16

PW

D

14

5.6

1.6

5.6

1.6

9.0

2.1

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

5-Nov-2007

Device

Package

Pins

Site

Length (mm) Width (mm) Height (mm)

OPA2347EA/250

OPA2347EA/3K

OPA2347UA/2K5

OPA2347YZDR

OPA347NA/250

OPA347NA/3K

OPA347SA/250

OPA347SA/3K

DCN

D

8

SITE 41

SITE 68

SITE 41

SITE 21

SITE 41

190.0

346.0

195.2

190.0

214.0

346.0

190.0

346.0

212.7

346.0

193.7

212.7

199.0

346.0

212.7

346.0

31.75

29.0

8

YZD

DBV

DCK

D

8

34.9

5

31.75

55.0

5

55.0

OPA347UA/2K5

OPA4347EA/250

OPA4347EA/2K5

OPA4347UA/2K5

8

29.0

PW

D

14

31.75

29.0

33.0

Pack Materials-Page 2

MECHANICAL DATA

MPDI001A – JANUARY 1995 – REVISED JUNE 1999

P (R-PDIP-T8)

PLASTIC DUAL-IN-LINE

0.400 (10,60)

0.355 (9,02)

8

5

0.260 (6,60)

0.240 (6,10)

1

4

0.070 (1,78) MAX

0.325 (8,26)

0.300 (7,62)

0.020 (0,51) MIN

0.015 (0,38)

Gage Plane

0.200 (5,08) MAX

Seating Plane

0.010 (0,25) NOM

0.125 (3,18) MIN

0.100 (2,54)

0.021 (0,53)

0.430 (10,92)

MAX

0.010 (0,25)

M

0.015 (0,38)

4040082/D 05/98

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. Falls within JEDEC MS-001

For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999

PW (R-PDSO-G**)

PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,30

0,19

M

0,10

0,65

14

8

0,15 NOM

4,50

4,30

6,60

6,20

Gage Plane

0,25

1

7

0°–8°

A

0,75

0,50

Seating Plane

0,10

0,15

0,05

1,20 MAX

PINS **

8

14

16

20

24

28

DIM

3,10

2,90

5,10

4,90

5,10

4,90

6,60

6,40

7,90

9,80

9,60

A MAX

A MIN

7,70

4040064/F 01/97

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.

D. Falls within JEDEC MO-153

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,

improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.

Customers should obtain the latest relevant information before placing orders and should verify that such information is current and

complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s

standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this

warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily

performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and

applications using TI components. To minimize the risks associated with customer products and applications, customers should

provide adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask

work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services

are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such

products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under

the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI.

Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is

accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an

unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Information of third parties

may be subject to additional restrictions.

Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service

voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business

practice. TI is not responsible or liable for any such statements.

TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would

reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement

specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications

of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related

requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any

applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its

representatives against any damages arising out of the use of TI products in such safety-critical applications.

TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are

specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military

specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is

solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in

connection with such use.

TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products

are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any

non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements.

Following are URLs where you can obtain information on other Texas Instruments products and application solutions:

Products

Amplifiers

Data Converters

DSP

Applications

Audio

amplifier.ti.com

dataconverter.ti.com

dsp.ti.com

www.ti.com/audio

Automotive

Broadband

Digital Control

Military

www.ti.com/automotive

www.ti.com/broadband

www.ti.com/digitalcontrol

www.ti.com/military

Interface

interface.ti.com

logic.ti.com

Logic

Power Mgmt

Microcontrollers

RFID

power.ti.com

Optical Networking

Security

www.ti.com/opticalnetwork

www.ti.com/security

www.ti.com/telephony

www.ti.com/video

microcontroller.ti.com

www.ti-rfid.com

www.ti.com/lpw

Telephony

Low Power

Wireless

Video & Imaging

Wireless

www.ti.com/wireless

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

型号:	OPA4347UAG4
Brand Name：	Texas Instruments
是否Rohs认证：	符合
生命周期：	Obsolete
IHS 制造商：	TEXAS INSTRUMENTS INC
零件包装代码：	SOIC
包装说明：	SOP, SOP14,.25
针数：	14
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.33.00.01
风险等级：	5.33
放大器类型：	OPERATIONAL AMPLIFIER
架构：	VOLTAGE-FEEDBACK
最大平均偏置电流 (IIB)：	0.00001 µA
25C 时的最大偏置电流 (IIB)：	0.00001 µA
标称共模抑制比：	80 dB
频率补偿：	YES
最大输入失调电压：	7000 µV
JESD-30 代码：	R-PDSO-G14
JESD-609代码：	e4
长度：	8.65 mm
低-偏置：	YES
低-失调：	NO
微功率：	YES
湿度敏感等级：	2
功能数量：	4
端子数量：	14
最高工作温度：	125 °C
最低工作温度：	-55 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP
封装等效代码：	SOP14,.25
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
包装方法：	RAIL
峰值回流温度（摄氏度）：	260
电源：	3/5 V
认证状态：	Not Qualified
座面最大高度：	1.75 mm
标称压摆率：	0.17 V/us
子类别：	Operational Amplifier
最大压摆率：	0.152 mA
供电电压上限：	7.5 V
标称供电电压 (Vsup)：	5 V
表面贴装：	YES
技术：	CMOS
温度等级：	MILITARY
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING
端子节距：	1.27 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
标称均一增益带宽：	350 kHz
最小电压增益：	25100
宽度：	3.9 mm

电子百科

产品导航

产品型号OPA4347UAG4的Datasheet PDF文件预览

OPA4347UAG4相关产品

OPA4347UAG4相关文章

IC37:专业IC行业平台