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OPA354

OPA2354

OPA4354

SBOS233C − MARCH 2002− REVISED APRIL 2004

250MHz, Rail-to-Rail I/O, CMOS

OPERATIONAL AMPLIFIERS

FEATURES

DESCRIPTION

The OPA354 series of high-speed, voltage-feedback

D

UNITY-GAIN BANDWIDTH: 250MHz

WIDE BANDWIDTH: 100MHz GBW

HIGH SLEW RATE: 150V/µs

LOW NOISE: 6.5nV/√Hz

CMOS operational amplifiers are designed for video and

other applications requiring wide bandwidth. They are

unity-gain stable and can drive large output currents.

Differential gain is 0.02% and differential phase is 0.09°.

Quiescent current is only 4.9mA per channel.

RAIL-TO-RAIL I/O

The OPA354 series op amps are optimized for operation

on single or dual supplies as low as 2.5V ( 1.25V) and up

to 5.5V ( 2.75V). Common-mode input range extends

beyond the supplies. The output swing is within 100mV of

the rails, supporting wide dynamic range.

HIGH OUTPUT CURRENT: > 100mA

EXCELLENT VIDEO PERFORMANCE:

Diff Gain: 0.02%, Diff Phase: 0.095

0.1dB Gain Flatness: 40MHz

For applications requiring the full 100mA continuous

output current, single and dual SO-8 PowerPAD versions

are available.

D

LOW INPUT BIAS CURRENT: 3pA

QUIESCENT CURRENT: 4.9mA

THERMAL SHUTDOWN

The single version (OPA354), is available in the tiny

SOT23-5 and SO-8 PowerPAD packages. The dual

version (OPA2354) comes in the miniature MSOP-8 and

SO-8 PowerPAD packages. The quad version (OPA4354)

is offered in TSSOP-14 and SO-14 packages.

SUPPLY RANGE: 2.5V to 5.5V

MicroSIZE AND PowerPAD PACKAGES

Multichannel versions feature completely independent

circuitry for lowest crosstalk and freedom from interaction.

All are specified over the extended −40°C to +125°C

temperature range.

APPLICATIONS

D

VIDEO PROCESSING

OPAx357 RELATED PRODUCTS

FEATURES

ULTRASOUND

PRODUCT

OPAx357

OPTICAL NETWORKING, TUNABLE LASERS

PHOTODIODE TRANSIMPEDANCE AMPS

ACTIVE FILTERS

Shutdown Version of OPA354 Family

200MHz GBW, Rail-to-Rail Output, CMOS, Shutdown OPAx355

200MHz GBW, Rail-to-Rail Output, CMOS

38MHz GBW, Rail-to-Rail Input/Output, CMOS

75MHz BW G = 2, Rail-to-Rail Output

OPAx356

OPAx350/3

OPAx631

OPAx634

THS412x

HIGH-SPEED INTEGRATORS

ANALOG-TO-DIGITAL (A/D) CONVERTER

INPUT BUFFERS

150MHz BW G = 2, Rail-to-Rail Output

D

DIGITAL-TO-ANALOG (D/A) CONVERTER

OUTPUT AMPLIFIERS

100MHz BW, Differential Input/Output, 3.3V Supply

D

BARCODE SCANNERS

COMMUNICATIONS

V+

D

−

In

V_OUT

OPA354

+In

−

V

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments

semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

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Copyright  2002−2004, Texas Instruments Incorporated

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SBOS233C − MARCH 2002− REVISED APRIL 2004

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(1)

ABSOLUTE MAXIMUM RATINGS

ELECTROSTATIC

Supply Voltage, V+ to V− . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5V

DISCHARGE SENSITIVITY

(2)

Signal Input Terminals Voltage

. . . (V−) − (0.5V) to (V+) + (0.5V)

. . . . . . . . . . . . . . . . . . . . . 10mA

This integrated circuit can be damaged by ESD. Texas Instruments

recommends that all integrated circuits be handled with appropriate

precautions. Failure to observe proper handling and installation

procedures can cause damage.

(2)

Current

(3)

Output Short-Circuit

. . . . . . . . . . . . . . . . . . . . . . . . . . Continuous

Operating Temperature . . . . . . . . . . . . . . . . . . . . . . −55°C to +150°C

Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C

Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . . . . . . . +300°C

ESD damage can range from subtle performance degradation to

complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could

cause the device not to meet its published specifications.

(1)

Stresses above these ratings may cause permanent damage.

Exposure to absolute maximum conditions for extended periods

may degrade device reliability. These are stress ratings only, and

functional operation of the device at these or any other conditions

beyond those specified is not supported.

(2)

(3)

Input terminals are diode-clamped to the power-supply rails.

Input signals that can swing more than 0.5V beyond the supply

rails should be current limited to 10mA or less.

Short-circuit to ground, one amplifier per package.

(1)

PACKAGE/ORDERING INFORMATION

SPECIFIED

TEMPERATURE

RANGE

PACKAGE

DESIGNATOR

PACKAGE

MARKING

ORDERING

NUMBER

TRANSPORT

MEDIA, QUANTITY

PRODUCT

PACKAGE−LEAD

(1)

OPA354

SO-8 PowerPAD

DDA

−40°C to +125°C

OPA354A

OPA354AIDDA

Rails, 97

″

OPA354AIDDAR

Tape and Reel, 2500

OPA354

SOT23-5

DBV

″

−40°C to +125°C

OABI

″

OPA354AIDBVT

OPA354AIDBVR

Tape and Reel, 250

Tape and Reel, 3000

″

OPA2354

SO-8 PowerPAD

DDA

−40°C to +125°C

OPA2354A

OPA2354AIDDA

Rails, 97

″

OPA2354AIDDAR Tape and Reel, 2500

OPA2354AIDGKT Tape and Reel, 250

OPA2354AIDGKR Tape and Reel, 2500

OPA2354

MSOP-8

DGK

″

−40°C to +125°C

OACI

″

OPA4354

SO-14

D

−40°C to +125°C

OPA4354A

OPA4354AID

Rails, 58

″

OPA4354AIDR

Tape and Reel, 2500

OPA4354

TSSOP-14

PW

″

−40°C to +125°C

OPA4354A

OPA4354AIPWT

OPA4354AIPWR

Tape and Reel, 250

Tape and Reel, 2500

″

(1)

For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet.

2

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SBOS233C − MARCH 2002− REVISED APRIL 2004

PIN CONFIGURATIONS

Top View

OPA2354

OPA354

NC⁽¹⁾

V+

NC⁽¹⁾

1

2

3

4

8

7

6

5

Out A

1

2

3

4

8

7

6

5

V+

Out

1

2

3

5

4

V+

−

Out B

In A

−

In

+In

−

V

A

−

+In A

In B

Out

−

+In

In

B

NC⁽¹⁾

−

V

+In B

−

V

SOT23

SO PowerPAD⁽²⁾

MSOP

SO PowerPAD⁽²⁾

OPA4354

Out A

1

2

3

4

5

6

7

14 Out D

−

In D

In A

13

12 +In D

A

D

C

+In A

V+

−

V

11

+In B

10 +In C

B

−

In B

9

8

In C

Out B

Out C

SO

TSSOP

NOTES: (1) NC means no internal connection. (2) PowerPAD should be connected to V− or left floating.

3

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SBOS233C − MARCH 2002− REVISED APRIL 2004

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ELECTRICAL CHARACTERISTICS: V = +2.7V to +5.5V Single-Supply

S

Boldface limits apply over the temperature range, T = −40°C to +125°C.

A

All specifications at T = +25°C, R = 0Ω , R = 1kΩ connected to V /2, unless otherwise noted.

A

F

L

S

OPA354AI

OPA2354AI, OPA4354AI

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

OFFSET VOLTAGE

Input Offset Voltage

V

= +5V

2

8

mV

OS

S

Specified Temperature Range

+10

vs Temperature

dV /dT

OS

+4

µV/°C

µV/V

vs Power Supply

PSRR

V

= +2.7V to +5.5V, V

CM

Specified Temperature Range

= (V /2) − 0.15V

200

800

S

900

INPUT BIAS CURRENT

Input Bias Current

I

3

1

50

pA

B

Input Offset Current

I

OS

NOISE

Input Voltage Noise Density

Current Noise Density

e

i

f = 1MHz

6.5

50

nV/√Hz

fA/√Hz

n

INPUT VOLTAGE RANGE

Common-Mode Voltage Range

Common-Mode Rejection Ratio

V

(V−) − 0.1

(V+) + 0.1

V

CM

CMRR

V

= +5.5V, −0.1V < V

CM

< +3.5V

66

64

56

55

80

68

dB

S

Specified Temperature Range

= +5.5V, −0.1V < V < +5.6V

V

S

CM

Specified Temperature Range

INPUT IMPEDANCE

Differential

13

10 || 2

Ω || pF

13

Common-Mode

10 || 2

OPEN-LOOP GAIN

A

V

= +5V, +0.3V < V < +4.7V

94

110

dB

OL

S

O

Specified Temperature Range

V

= +5V, +0.4V < V < +4.6V

90

dB

S

O

FREQUENCY RESPONSE

Small-Signal Bandwidth

f

G = +1, V = 100mV , R = 25Ω

250

90

MHz

V/µs

ns

−3dB

O

PP

F

G = +2, V = 100mV

O

−3dB

PP

Gain-Bandwidth Product

GBW

G = +10

100

40

Bandwidth for 0.1dB Gain Flatness

Slew Rate

f

G = +2, V = 100mV

O PP

0.1dB

SR

V

= +5V, G = +1, 4V Step

= +5V, G = +1, 2V Step

= +3V, G = +1, 2V Step

150

130

110

2

S

Rise-and-Fall Time

G = +1, V = 200mV , 10% to 90%

O

PP

G = +1, V = 2V , 10% to 90%

11

ns

O

PP

Settling Time, 0.1%

0.01%

V

= +5V, G = +1, 2V Output Step

30

ns

S

60

ns

Overload Recovery Time

Harmonic Distortion

2nd-Harmonic

V

S Gain = V

5

ns

IN

S

G = +1, f = 1MHz, V = 2V , R = 200Ω, V

PP

= 1.5V

−75

−83

0.02

0.09

dBc

O

L

CM

3rd-Harmonic

G = +1, f = 1MHz, V = 2V , R = 200Ω, V

O

PP

L

Differential Gain Error

Differential Phase Error

Channel-to-Channel Crosstalk

OPA2354

NTSC, R = 150Ω

%

L

degrees

L

f = 5MHz

−100

−84

dB

OPA4354

(1)

(2)

See typical characteristics Output Voltage Swing vs Output Current.

Specified by design.

4

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SBOS233C − MARCH 2002− REVISED APRIL 2004

ELECTRICAL CHARACTERISTICS: V = +2.7V to +5.5V Single-Supply (continued)

S

Boldface limits apply over the temperature range, T = −40°C to +125°C.

A

All specifications at T = +25°C, R = 0Ω , R = 1kΩ connected to V /2, unless otherwise noted.

A

F

L

S

OPA354AI

OPA2354AI, OPA4354AI

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

OUTPUT

Voltage Output Swing from Rail

V

= +5V, R = 1kΩ, A

> 94dB

0.1

0.3

V

S

L

OL

Specified Temperature Range

V

= +5V, R = 1kΩ, A

> 90dB

0.4

S

L

OL

(1)(2)

Output Current

, Single, Dual, Quad

I

V

= +5V

= +3V

100

2.7

mA

Ω

O

S

V

50

0.05

35

Closed-Loop Output Impedance

Open-Loop Output Resistance

f < 100kHz

R

Ω

O

POWER SUPPLY

Specified Voltage Range

Operating Voltage Range

Quiescent Current (per amplifier)

V

5.5

V

S

2.5 to 5.5

4.9

I

V

= +5V, Enabled, I = 0

6

mA

Q

S

O

Specified Temperature Range

7.5

THERMAL SHUTDOWN

Junction Temperature

Shutdown

+160

+140

°C

Reset from Shutdown

TEMPERATURE RANGE

Specified Range

Operating Range

Storage Range

Thermal Resistance

SOT23-5, MSOP-8

TSSOP-14

−40

−55

−65

+125

+150

°C

°C/W

q

JA

150

100

65

SO-14

SO-8 PowerPAD

(1)

(2)

See typical characteristics Output Voltage Swing vs Output Current.

Specified by design.

5

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TYPICAL CHARACTERISTICS

At T = +25°C, V = 5V, G = +1, R = 0Ω, R = 1kΩ, and connected to V /2, unless otherwise noted.

A

S

F

L

S

NONINVERTING SMALL−SIGNAL

FREQUENCY RESPONSE

INVERTING SMALL−SIGNAL

FREQUENCY RESPONSE

3

0

3

6

9

3

0

3

6

9

G = +1

Ω

V_O= 0.1V_PP

V_O= 0.1V_PP, R_F= 604

Ω

R_F= 25

Ω

G = +2, R_F= 604

−

G =

1

G = +5, R_F= 604

Ω

G = +10, R_F= 604

−

2

G =

5

−

G = 10

−

12

15

100k

15

100k

1M

10M

Frequency (Hz)

100M

1G

1M

10M

100M

1G

Frequency (Hz)

NONINVERTING LARGE−SIGNAL STEP RESPONSE

NONINVERTING SMALL−SIGNAL STEP RESPONSE

Time (20ns/div)

HARMONIC DISTORTION vs OUTPUT VOLTAGE

0.1dB GAIN FLATNESS

V_O= 0.1V_PP

−

50

60

70

80

90

0.5

0.4

0.3

0.2

0.1

0

−

G =

1

f = 1MHz

Ω

R_L= 200

G = +1

Ω

R_F= 25

2nd−Harmonic

−

0.1

0.2

0.3

0.4

0.5

G = +2

Ω

R_F= 604

3rd−Harmonic

3

−

100

0

1

2

4

100k

1M

10M

100M

1G

Output Voltage (V_PP

)

Frequency (Hz)

6

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SBOS233C − MARCH 2002− REVISED APRIL 2004

TYPICAL CHARACTERISTICS (continued)

At T = +25°C, V = 5V, G = +1, R = 0Ω, R = 1kΩ, and connected to V /2, unless otherwise noted.

A

S

F

L

S

HARMONIC DISTORTION vs INVERTING GAIN

HARMONIC DISTORTION vs NONINVERTING GAIN

−

50

60

70

80

90

−

50

60

70

80

90

V_O= 2V_PP

f = 1MHz

V_O= 2V_PP

f = 1MHz

Ω

R_L= 200

Ω

R_L= 200

2nd−Harmonic

3rd−Harmonic

−

100

−

100

1

10

1

10

Gain (V/V)

HARMONIC DISTORTION vs LOAD RESISTANCE

G = +1

V_O= 2V_PP

f = 1MHz

HARMONIC DISTORTION vs FREQUENCY

−

50

60

70

80

90

−

50

60

70

80

90

G = +1

V_O= 2V_PP

−

Ω

R_L= 200

V_CM= 1.5V

−

2nd−Harmonic

3rd−Harmonic

2nd−Harmonic

3rd−Harmonic

−

100

−

100

100k

100

1k

1M

10M

R_L(Ω)

Frequency (Hz)

INPUT VOLTAGE AND CURRENT NOISE

SPECTRAL DENSITY vs FREQUENCY

FREQUENCY RESPONSE FOR VARIOUS R_L

R_L= 10k

10k

3

0

Ω

G = +1

1k

100

10

Ω

R_F= 0

Current Noise

Voltage Noise

−

3

6

9

V_O= 0.1V_PP

C_L= 0pF

Ω

R_L= 1k

Ω

R_L= 100

Ω

R_L= 50

−

12

1

−

15

100k

10

100

1k

10k

100k

1M

10M

100M

1M

10M

Frequency (Hz)

100M

1G

Frequency (Hz)

7

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TYPICAL CHARACTERISTICS (continued)

At T = +25°C, V = 5V, G = +1, R = 0Ω, R = 1kΩ, and connected to V /2, unless otherwise noted.

A

S

F

L

S

FREQUENCY RESPONSE FOR VARIOUS C_L

RECOMMENDED R_Svs CAPACITIVE LOAD

9

6

3

0

3

6

9

160

140

120

100

80

G = +1

V_O= 0.1V_PP

For 0.1dB

Flatness

C_L= 100pF

Ω

R_S= 0

−

C_L= 47pF

60

V_IN

R_S

V_O

OPA354

40

C_L= 5.6pF

C_L

1k

Ω

−

12

20

15

100k

0

1M

10M

Frequency (Hz)

100M

1G

1

1k

10

100

Capacitive Load (pF)

COMMON−MODE REJECTION RATIO AND

POWER−SUPPLY REJECTION RATIO vs FREQUENCY

FREQUENCY RESPONSE vs CAPACITIVE LOAD

G = +1

100

80

60

40

20

0

3

0

3

6

9

Ω

C_L= 5.6pF, R_S= 0

V_O= 0.1V_PP

CMRR

Ω

C_L= 47pF, R_S= 140

−

PSRR+

Ω

C_L= 100pF, R_S= 120

−

PSRR

V_IN

R_S

V_O

1kΩ

OPA354

C_L

−

12

15

100k

10k

100k

1M

10M

100M

1G

1M

10M

Frequency (Hz)

100M

Frequency (Hz)

COMPOSITE VIDEO

OPEN−LOOP GAIN AND PHASE

DIFFERENTIAL GAIN AND PHASE

180

160

140

120

100

80

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

Phase

Gain

dP

60

40

20

0

−

20

40

dG

1

2

3

4

10

100

1k

10k 100k

1M

10M 100M 1G

Frequency (Hz)

Ω

Number of 150 Loads

8

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SBOS233C − MARCH 2002− REVISED APRIL 2004

TYPICAL CHARACTERISTICS (continued)

At T = +25°C, V = 5V, G = +1, R = 0Ω, R = 1kΩ, and connected to V /2, unless otherwise noted.

A

S

F

L

S

OUTPUT VOLTAGE SWING vs OUTPUT CURRENT

FOR V_S= 3V

INPUT BIAS CURRENT vs TEMPERATURE

10k

1k

3

2

1

0

100

10

_

−

_

+125 C

+25 C

55 C

1

−

0

20

40

60

80

100

120

55

35

15

5

25

45

65

85 105 125 135

_

Temperature ( C)

Output Current (mA)

OUTPUT VOLTAGE SWING vs OUTPUT CURRENT

FOR V_S= 5V

SUPPLY CURRENT vs TEMPERATURE

V_S= 5V

7

6

5

4

3

2

1

0

5

4

3

2

1

0

_

+25 C

+125 C

V_S= 2.5V

−

_

55 C

−

15

55

35

5

25

45

65

85 105 125 135

0

25

50

75

100

125

150

175

200

_

Temperature ( C)

Output Current (mA)

MAXIMUM OUTPUT VOLTAGE vs FREQUENCY

V_S= 5.5V

CLOSED−LOOP OUTPUT IMPEDANCE vs FREQUENCY

6

5

4

3

2

1

0

100

10

Maximum Output

Voltage without

Slew−Rate

Induced Distortion

1

V_S= 2.7V

0.1

OPA354

Z_O

0.01

1

10

Frequency (MHz)

100

100k

1M

10M

100M

1G

Frequency (Hz)

9

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TYPICAL CHARACTERISTICS (continued)

At T = +25°C, V = 5V, G = +1, R = 0Ω, R = 1kΩ, and connected to V /2, unless otherwise noted.

A

S

F

L

S

OUTPUT SETTLING TIME TO 0.1%

V_O= 2V_PP

OPEN−LOOP GAIN vs TEMPERATURE

120

110

100

90

0.5

0.4

0.3

0.2

0.1

0

Ω

R_L= 1k

−

0.1

0.2

0.3

0.4

0.5

80

70

−

15

0

10

20

30

40

50

60

70

80

90 100

55

35

5

25

45

65

85 105 125 135

_

Temperature ( C)

Time (ns)

COMMON−MODE REJECTION RATIO AND

POWER−SUPPLY REJECTION RATIO vs TEMPERATURE

OFFSET VOLTAGE PRODUCTION DISTRIBUTION

100

90

80

70

60

50

Common−Mode Rejection Ratio

Power−Supply Rejection Ratio

−

15

55

35

5

25

45

65

85 105 125 135

−

2 1

8

7

6

5

4

3

0

1

2

3

4

5

6

7 8

_

Temperature ( C)

Offset Voltage (mV)

CHANNEL−TO−CHANNEL CROSSTALK

0

−

20

40

60

80

OPA4354

OPA2354

−

100

120

100k

1M

10M

100M

1G

Frequency (Hz)

10

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N-channel input differential pair in parallel with a

P-channel differential pair, as shown in Figure 1. The

N-channel pair is active for input voltages close to the

positive rail, typically (V+) − 1.2V to 100mV above the

positive supply, while the P-channel pair is on for inputs

from 100mV below the negative supply to approximately

(V+) − 1.2V. There is a small transition region, typically

(V+) − 1.5V to (V+) − 0.9V, in which both pairs are on. This

600mV transition region can vary 500mV with process

variation. Thus, the transition region (both input stages on)

can range from (V+) − 2.0V to (V+) − 1.5V on the low end,

up to (V+) − 0.9V to (V+) − 0.4V on the high end.

APPLICATIONS INFORMATION

The OPA354 is a CMOS, rail-to-rail I/O, high-speed,

voltage-feedback operational amplifier designed for video,

high-speed, and other applications. It is available as a

single, dual, or quad op amp.

The amplifier features a 100MHz gain bandwidth, and

150V/µs slew rate, but it is unity-gain stable and can be

operated as a +1V/V voltage follower.

OPERATING VOLTAGE

The OPA354 is specified over a power-supply range of

+2.7V to +5.5V ( 1.35V to 2.75V). However, the supply

voltage may range from +2.5V to +5.5V ( 1.25V to

2.75V). Supply voltages higher than 7.5V (absolute

maximum) can permanently damage the amplifier.

A double-folded cascode adds the signal from the two

input pairs and presents a differential signal to the class AB

output stage.

Parameters that vary over supply voltage or temperature

are shown in the typical characteristics section of this data

sheet.

RAIL-TO-RAIL OUTPUT

A class AB output stage with common-source transistors

is used to achieve rail-to-rail output. For high-impedance

loads (> 200Ω), the output voltage swing is typically

100mV from the supply rails. With 10Ω loads, a useful

output swing can be achieved while maintaining high

open-loop gain. See the typical characteristic curve Output

Voltage Swing vs Output Current.

RAIL-TO-RAIL INPUT

The specified input common-mode voltage range of the

OPA354 extends 100mV beyond the supply rails. This is

achieved with

a

complementary input stagean

V+

Reference

Current

V_IN+

−

V_IN

V_BIAS1

Class AB

Control

V_O

Circuitry

V_BIAS2

−

V

(Ground)

Figure 1. Simplified Schematic

11

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OUTPUT DRIVE

R₂

The OPA354’s output stage can supply a continuous

output current of 100mA and still provide approximately

2.7V of output swing on a 5V supply, as shown in Figure 2.

For maximum reliability, it is not recommended to run a

continuous DC current in excess of 100mA. Refer to the

typical characteristic curve Output Voltage Swing vs

Output Current. For supplying continuous output currents

greater than 100mA, the OPA354 may be operated in

parallel, as shown in Figure 3.

10kΩ

C₁

200pF

+5V

1µF

R₁

100kΩ

R₅

1Ω

OPA2354

The OPA354 will provide peak currents up to 200mA,

which corresponds to the typical short-circuit current.

Therefore, an on-chip thermal shutdown circuit is provided

to protect the OPA354 from dangerously high junction

temperatures. At 160°C, the protection circuit will shut

down the amplifier. Normal operation will resume when the

junction temperature cools to below 140°C.

R₃

100kΩ

+

−

R₆

1Ω

R_SHUNT

1Ω

2V In = 200mA

Out, as Shown

OPA2354

R₄

10kΩ

R₂

Laser Diode

+

Ω

1k

V₁

5V

−

C₁

50pF

µ

1 F

Figure 3. Parallel Operation

R₁

Ω

V+

10k

VIDEO

The OPA354 output stage is capable of driving standard

back-terminated 75Ω video cables, as shown in Figure 4.

By back-terminating a transmission line, it does not exhibit

a capacitive load to its driver. A properly back-terminated

75Ω cable does not appear as capacitance; it presents

only a 150Ω resistive load to the OPA354 output.

OPA354

−

R₃

V

R_SHUNT

Ω

10k

V_IN

Ω

1

+

R₄

1k

−

Ω

1V In = 100mA

Out, as Shown

Laser Diode

+5V

Figure 2. Laser Diode Driver

Video

Ω

75

In

Video

Output

OPA354

Ω

75

+2.5V

Ω

604

Ω

604

+2.5V

Figure 4. Single-Supply Video Line Driver

12

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The OPA354 can be used as an amplifier for RGB graphic

signals, which have a voltage of zero at the video black

level, by offsetting and AC-coupling the signal. See

Figure 5.

circuits. The OPA354 series provide an effective means of

buffering the A/D converter’s input capacitance and

resulting charge injection while providing signal gain. For

applications requiring high DC accuracy, the OPA350

series is recommended.

DRIVING ANALOG−TO−DIGITAL

CONVERTERS

The OPA354 series op amps offer 60ns of settling time to

0.01%, making them a good choice for driving high- and

medium-speed sampling A/D converters and reference

Figure 6 illustrates the OPA354 driving an A/D converter.

With the OPA354 in an inverting configuration, a capacitor

across the feedback resistor can be used to filter

high-frequency noise in the signal.

Ω

604

+3V

+

µ

1 F

10nF

V+

Ω

604

Ω

75

1/2

OPA2354

Red

R₁

R₂

Red⁽¹⁾

Ω

75

V+

R₁

R₂

Green⁽¹⁾

Ω

75

1/2

OPA2354

Green

Ω

604

Ω

75

Ω

604

NOTE: (1) Source video signal offset

300mV above ground to accomodate

op amp swing−to−ground capability.

604

+3V

+

µ

1 F

10nF

V+

Ω

604

Ω

75

Blue

R₁

R₂

OPA354

Blue⁽¹⁾

Ω

75

Figure 5. RGB Cable Driver

13

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+5V

330pF

Ω

5k

V_IN

V_REF

V+

ADS7816, ADS7861,

+In

or ADS7864

OPA354

12−Bit A/D Converter

+2.5V

−

In

GND

−

V_IN= 0V to 5V for 0V to 5V output.

NOTE: A/D Converter Input = 0V to V_REF

Figure 6. The OPA354 in Inverting Configuration Driving the ADS7816

CAPACITIVE LOAD AND STABILITY

The OPA354 series op amps can drive a wide range of

capacitive loads. However, all op amps under certain

conditions may become unstable. Op amp configuration,

gain, and load value are just a few of the factors to consider

when determining stability. An op amp in unity-gain

configuration is most susceptible to the effects of

capacitive loading. The capacitive load reacts with the op

amp’s output resistance, along with any additional load

resistance, to create a pole in the small-signal response

that degrades the phase margin. Refer to the typical

characteristic curve Frequency Response for Various C_L

for details.

V+

R_S

V_OUT

OPA354

V_IN

R_L

C_L

Figure 7. Series Resistor in Unity-Gain

The OPA354’s topology enhances its ability to drive

capacitive loads. In unity gain, these op amps perform well

with large capacitive loads. Refer to the typical

characteristic curve Recommended R_Svs Capacitive Load

and Frequency Response vs Capacitive Load for details.

Configuration Improves Capacitive Load Drive

WIDEBAND TRANSIMPEDANCE AMPLIFIER

Wide bandwidth, low input bias current, and low input

voltage and current noise make the OPA354 an ideal

wideband photodiode transimpedance amplifier for

low-voltage single-supply applications. Low-voltage noise

is important because photodiode capacitance causes the

effective noise gain of the circuit to increase at high

frequency.

One method of improving capacitive load drive in the

unity-gain configuration is to insert a 10Ω to 20Ω resistor

in series with the output, as shown in Figure 7. This

significantly reduces ringing with large capacitive

loadssee the typical characteristic curve Frequency

Response vs Capacitive Load. However, if there is a

resistive load in parallel with the capacitive load, R_S

creates a voltage divider. This introduces a DC error at the

output and slightly reduces output swing. This error may

be insignificant. For instance, with R_L= 10kΩ and R_S=

20Ω, there is only about a 0.2% error at the output.

14

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The key elements to a transimpedance design, as shown

in Figure 8, are the expected diode capacitance (including

the parasitic input common-mode and differential-mode

input capacitance (2 + 2)pF for the OPA354), the desired

transimpedance gain (R_F), and the Gain Bandwidth

Product (GBP) for the OPA354 (100MHz). With these 3

variables set, the feedback capacitor value (C_F) may be set

to control the frequency response.

A 10nF ceramic bypass capacitor is the minimum

recommended value; adding a 1µF or larger tantalum

capacitor in parallel can be beneficial when driving a

low-resistance load. Providing adequate bypass

capacitance is essential to achieving very low harmonic

and intermodulation distortion.

POWER DISSIPATION

Power dissipation depends on power-supply voltage,

signal and load conditions. With DC signals, power

dissipation is equal to the product of output current times

the voltage across the conducting output transistor,

V_S− V_O. Power dissipation can be minimized by using the

lowest possible power-supply voltage necessary to assure

the required output voltage swing.

C_F

< 1pF

(prevents gain peaking)

R_F

Ω

10M

+V

For resistive loads, the maximum power dissipation occurs

at a DC output voltage of one-half the power-supply

voltage. Dissipation with AC signals is lower. Application

Bulletin AB-039 (SBOA022), Power Amplifier Stress and

Power Handling Limitations, explains how to calculate or

measure power dissipation with unusual signals and

loads, and can be found at www.ti.com.

λ

C_D

V_OUT

OPA354

Figure 8. Transimpedance Amplifier

Any tendency to activate the thermal protection circuit

indicates excessive power dissipation or an inadequate

heatsink. For reliable operation, junction temperature

should be limited to 150°C, maximum. To estimate the

margin of safety in a complete design, increase the

ambient temperature until the thermal protection is

triggered at 160°C. The thermal protection should trigger

more than 35°C above the maximum expected ambient

condition of your application.

To achieve a maximally flat 2nd-order Butterworth

frequency response, the feedback pole should be set to:

GBP

4pR_FC_D

1

+

Ǹ

2pR_FC_F

(1)

Typical surface-mount resistors have

a

parasitic

capacitance of around 0.2pF that must be deducted from

the calculated feedback capacitance value.

Bandwidth is calculated by:

PowerPAD THERMALLY ENHANCED

PACKAGE

GBP

2pR_FC_D

f_*3dB

+

Hz

Ǹ

Besides the regular SOT23-5 and MSOP-8, the single and

dual versions of the OPA354 also come in SO-8

PowerPAD. The SO-8 PowerPAD is a standard-size SO-8

package where the exposed leadframe on the bottom of

the package can be soldered directly to the PCB to create

an extremely low thermal resistance. This will enhance the

OPA354’s power dissipation capability significantly and

eliminates the use of bulky heatsinks and slugs

traditionally used in thermal packages. This package can

be easily mounted using standard PCB assembly

techniques. NOTE: Since the SO-8 PowerPAD is

pin-compatible with standard SO-8 packages, the

OPA354 and OPA2354 can directly replace operational

amplifiers in existing sockets. Soldering the PowerPAD to

the PCB is always required, even with applications that

have low power dissipation. This provides the necessary

thermal and mechanical connection between the

leadframe die pad and the PCB.

(2)

For even higher transimpedance bandwidth, the

high-speed CMOS OPA355 (200MHz GBW) or the

OPA655 (400MHz GBW) may be used.

PCB LAYOUT

Good high-frequency printed circuit board (PCB) layout

techniques should be employed for the OPA354.

Generous use of ground planes, short and direct signal

traces, and a suitable bypass capacitor located at the V+

pin will assure clean, stable operation. Large areas of

copper also provides a means of dissipating heat that is

generated in normal operation.

Sockets are definitely not recommended for use with any

high-speed amplifier.

15

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The PowerPAD package is designed so that the leadframe

die pad (or thermal pad) is exposed on the bottom of the

IC, as shown in Figure 9. This provides an extremely low

thermal resistance (q_JC) path between the die and the

exterior of the package. The thermal pad on the bottom of

the IC can then be soldered directly to the PCB, using the

PCB as a heatsink. In addition, plated-through holes (vias)

provide a low thermal resistance heat flow path to the back

side of the PCB.

4. It is recommended, but not required, to place a small

number of additional holes under the package and outside

the thermal pad area. These holes provide additional heat

paths between the copper thermal land and the ground

plane. They may be larger because they are not in the area

to be soldered, so wicking is not a problem. This is

illustrated in Figure 10.

5. Connect all holes, including those within the thermal pad

area and outside the pad area, to the internal ground plane

or other internal copper plane for single-supply

applications, and to V− for split-supply applications.

Leadframe (Copper Alloy)

6. When laying out these holes, do not use the typical web

or spoke via connection methodology, as shown in

Figure 11. Web connections have a high thermal

resistance connection that is useful for slowing the heat

transfer during soldering operations. This makes soldering

the vias that have ground plane connections easier.

However, in this application, low thermal resistance is

desired for the most efficient heat transfer. Therefore, the

holes under the PowerPAD package should make their

connection to the internal ground plane with a complete

connection around the entire circumference of the

plated-through hole.

IC (Silicon)

Die Attach (Epoxy)

Leadframe Die Pad

Exposed at Base of the Package

(Copper Alloy)

Mold Compound (Plastic)

Figure 9. Section View of a PowerPAD Package

PowerPAD ASSEMBLY PROCESS

1. The PowerPAD must be connected to the device’s most

negative supply voltage, which will be ground in

single-supply applications, and V− in split-supply

applications.

2. Prepare the PCB with a top-side etch pattern, as shown

in Figure 10. The exact land design may vary based on the

specific assembly process requirements. There should be

etch for the leads as well as etch for the thermal land.

Web or Spoke Via

Solid Via

NOT RECOMMENDED

RECOMMENDED

(due to poor heat conduction)

Figure 11. Via Connection

Thermal Land

(Copper)

Minimum Size

7. The top-side solder mask should leave the pad

connections and the thermal pad area exposed. The

thermal pad area should leave the 13 mil holes exposed.

The larger holes outside the thermal pad area may be

covered with solder mask.

OPTIONAL:

Additional 4 vias outside

4.8mm x 3.8mm

of thermal pad area but

(189 mils x 150 mils)

under the package.

REQUIRED:

Thermal pad area 2.286mm x 2.286mm

(90 mils x 90mils) with 5 vias

(via diameter = 13 mils)

8. Apply solder paste to the exposed thermal pad area and

all of the package terminals.

Figure 10. 8-Pin PowerPAD PCB Etch and Via

Pattern

9. With these preparatory steps in place, the PowerPAD IC

is simply placed in position and run through the solder

reflow operation as any standard surface-mount

component. This results in a part that is properly installed.

3. Place the recommended number of plated-through

holes (or thermal vias) in the area of the thermal pad.

These holes should be 13 mils in diameter. They are kept

small so that solder wicking through the holes is not a

problem during reflow. The minimum recommended

number of holes for the SO-8 PowerPAD package is 5, as

shown in Figure 10.

For detailed information on the PowerPAD package

including thermal modeling considerations and repair

procedures, please see Technical Brief SLMA002,

PowerPAD Thermally Enhanced Package, located at

www.ti.com.

16

PACKAGE OPTION ADDENDUM

www.ti.com

21-May-2004

PACKAGING INFORMATION

ORDERABLE DEVICE

STATUS(1)

PACKAGE TYPE

PACKAGE DRAWING

PINS

PACKAGE QTY

OPA2354AIDDA

OPA2354AIDDAR

OPA2354AIDGKR

OPA2354AIDGKT

OPA354AIDBVR

OPA354AIDBVT

OPA354AIDDA

OPA354AIDDAR

OPA4354AID

ACTIVE

HSOP

VSSOP

SOP

DDA

DGK

DBV

DDA

D

8

100

2500

250

8

5

3000

250

SOP

5

HSOP

SOIC

8

100

8

2500

58

14

OPA4354AIDR

SOIC

D

2500

250

OPA4354AIPWR

OPA4354AIPWT

TSSOP

PW

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

MECHANICAL DATA

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999

PW (R-PDSO-G**)

PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,30

0,19

M

0,10

0,65

14

8

0,15 NOM

4,50

4,30

6,60

6,20

Gage Plane

0,25

1

7

0°–8°

A

0,75

0,50

Seating Plane

0,10

0,15

0,05

1,20 MAX

PINS **

8

14

16

20

24

28

DIM

3,10

2,90

5,10

4,90

5,10

4,90

6,60

6,40

7,90

9,80

9,60

A MAX

A MIN

7,70

4040064/F 01/97

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.

D. Falls within JEDEC MO-153

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

IMPORTANT NOTICE

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI

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TI assumes no liability for applications assistance or customer product design. Customers are responsible for

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amplifier.ti.com

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Military

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www.ti.com/digitalcontrol

www.ti.com/military

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Logic

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logic.ti.com

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Microcontrollers

power.ti.com

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Security

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www.ti.com/wireless

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