OPA551FA/500全新原装原理图各脚功能电路原理芯片引脚定义-中国IC网-芯三七

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产品型号OPA551FA/500的概述

OPA551FA/500 芯片概述与详细参数分析 ## 1. 引言在现代电子设备中，运算放大器（Operational Amplifier, Op-Amp）的广泛应用，促进了信号处理、放大和变换等基础功能的发展。OPA551FA/500作为一款流行的高性能运算放大器，其多样的应用使得其在工业、汽车、高保真音频等领域展现出卓越的性能。本篇论文将对OPA551FA/500的特性、应用、引脚配置等进行详细阐述。 ## 2. 芯片概述 OPA551FA/500是Texas Instruments（德州仪器）公司推出的一款宽范围电源的运算放大器。其设计目标是提供高精度与高稳定性的信号处理能力，适合于各种高要求的应用场景。OPA551系列的运算放大器能够在汽车电子、音频放大器、传感器信号调理等领域中展现出极佳的性能。 3. 详细参数 OPA551FA/500的主要技术参数包括： - 电源电压范围...

产品型号OPA551FA/500的Datasheet PDF文件预览

OPA551

OPA552

OPA551

For most current data sheet and other product

information, visit www.burr-brown.com

High-Voltage, High-Current

OPERATIONAL AMPLIFIERS

FEATURES

DESCRIPTION

● WIDE SUPPLY RANGE: ±4V to ±30V

● HIGH OUTPUT CURRENT: 200mA Continuous

● LOW NOISE: 14nV/√Hz

The OPA551 and OPA552 are low cost op amps with

high-voltage (60V) and high-current (200mA) capa-

bility.

The OPA551 is unity-gain stable and features high

slew rate (15Vµs) and wide bandwidth (3MHz). The

OPA552 is optimized for gains of 5 or greater, and

offers higher speed with a slew rate of 24V/µs and a

bandwidth of 12MHz. Both are suitable for telephony,

audio, servo, and test applications.

● FULLY PROTECTED:

Thermal Shutdown

Output Current-Limited

● THERMAL SHUTDOWN INDICATOR

● WIDE OUTPUT SWING: 2V From Rail

These laser-trimmed, monolithic integrated circuits

provide excellent low-level accuracy along with high

output swing. High performance is maintained as the

amplifier swings to its specified limits.

● FAST SLEW RATE:

OPA551: 15V/µs

OPA552: 24V/µs

● WIDE BANDWIDTH:

OPA551: 3MHz

The OPA551 and OPA552 are internally protected

against over-temperature conditions and current over-

loads. The thermal shutdown indicator “flag” provides

a current output to alert the user when thermal shut-

down has occurred.

OPA552: 12MHz

● PACKAGES: DIP-8, SO-8, or DDPAK-7

The OPA551 and OPA552 are available in DIP-8 and

SO-8 packages, as well as a DDPAK-7 surface-

mount plastic power package. They are specified for

operation over the extended industrial temperature

range, –40°C to +125°C.

APPLICATIONS

● TELEPHONY

● TEST EQUIPMENT

● AUDIO AMPLIFIER

● TRANSDUCER EXCITATION

● SERVO DRIVER

OPA551, OPA552

Flag

V+

–In

+In

V–

OPA551, OPA552

Out

Flag

V+

V–

–In

+In

V–

2 3 4

DIP-8 (P)

Out

V–

NOTE: Tab is

connected to

V– supply.

+In

–In

V+

Flag

Out

V–

SO-8 (U)

DDPAK-7 Surface-Mount (F)

International Airport Industrial Park

•

Mailing Address: PO Box 11400, Tucson, AZ 85734

•

Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706

• Tel: (520) 746-1111

Twx: 910-952-1111

•

Internet: http://www.burr-brown.com/

•

Cable: BBRCORP Telex: 066-6491

•

FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132

•

PDS-1472A

Printed in U.S.A. July, 1999

OPA551, OPA552

SPECIFICATIONS: V_S= ±30V

OPA551

At T_J= +25°C⁽¹⁾, R_L= 3kΩ connected to ground and V_OUT= 0V, unless otherwise noted.

Boldface limits apply over the specified junction temperature range, T_J= –40°C to +125°C.

OPA551UA, PA, FA

TYP

PARAMETER

CONDITION

MIN

MAX

UNITS

OFFSET VOLTAGE

Input Offset Voltage

T_J= –40°C to +125°C

vs Temperature

V_OS

V_CM= 0V, I_O= 0

±1

±3

±5

µV/°C

µV/V

dV_OS/dT

PSRR

±7

vs Power Supply

_S= ±4V to ±30V, V_CM= 0V

INPUT BIAS CURRENT

Input Bias Current

Input Offset Current

I_B

I_OS

±20

±3

±100

NOISE

Input Voltage Noise Density, f = 1kHz

Current Noise Density, f = 1kHz

e_n

i_n

3.5

nV/√Hz

fA/√Hz

INPUT VOLTAGE RANGE

Common-Mode Voltage Range

Common-Mode Rejection Ratio

V_CM

CMRR

(V–) + 2.5

(V+) – 2.5

–27.5V < V_CM< +27.5V

102

INPUT IMPEDANCE

Differential

Common-Mode

10¹³|| 2

10¹³|| 6

Ω || pF

OPEN-LOOP GAIN

Open-Loop Voltage Gain

T_J= –40°C to +125°C

A_OL

R_L= 3kΩ, –28V < V_O< +28V

110

100

126

120

R_L= 300Ω, –27V < V_O< +27V

FREQUENCY RESPONSE

Gain-Bandwidth Product

Slew Rate

Settling Time: 0.1%

0.01%

GBW

±15

1.3

MHz

V/µs

µs

G = 1

G = 1, C_L= 100pF, 10V Step

V_O= 15Vrms, R_L= 3kΩ, G = 3

V_O= 15Vrms, R_L= 300Ω, G = 3

V_IN• Gain = V_S

Total Harmonic Distortion + Noise, f = 1kHz THD+N

0.0005

µs

Overload Recovery Time

OUTPUT

Voltage Output

T_J= –40°C to +125°C

V_OUT

I_O= 200mA

I_O= 10mA

(V–) + 3.0

(V–) + 3.5

(V–) + 2.0

(V–) + 2.5

±200

(V+) – 3.0

(V+) – 3.5

(V+) – 2.0

(V+) – 2.7

T_J= –40°C to +125°C

Maximum Continuous Current Output: dc

Short-Circuit Current

I_O= 10mA

Package Dependent—See Text

I_O

I_SC

±380

Capacitive Load Drive

C_LOAD

Stable Operation

See Typical Curve

SHUTDOWN FLAG

Thermal Shutdown Status Output

Normal Operation

Thermally Shutdown

Voltage Compliance Range

Junction Temperature

Shutdown

Sourcing

0.05

120

160

(V+) – 1.5

µA

V–

160

140

°C

Reset from Shutdown

POWER SUPPLY

Specified Voltage

Operating Voltage Range

Quiescent Current

V_S

I_Q

±30

±7

±4

±30

±8.5

±10

I_O= 0

T_J= –40°C to +125°C

TEMPERATURE RANGE

Specified Range

Operating Range

Storage Range

Thermal Resistance

SO-8 Surface Mount

DIP-8

T_J

T_A

–40

–55

–65

+125

+150

°C

θ_JA

θ_JC

100

°C/W

DDPak-7

NOTES: (1) All tests are high-speed tested at +25°C ambient temperature. Effective junction temperature is +25°C unless otherwise noted.

OPA551, OPA552

SPECIFICATIONS: V_S= ±30V

OPA552

At T_J= +25°C⁽¹⁾, R_L= 3kΩ connected to Ground and V_OUT= 0V, unless otherwise noted.

Boldface limits apply over the specified junciton temperature range, T_J= –40°C to +125°C.

OPA552UA, PA, FA

TYP

PARAMETER

CONDITION

MIN

MAX

UNITS

OFFSET VOLTAGE

Input Offset Voltage

T_J= –40°C to +125°C

vs Temperature

V_OS

V_CM= 0V, I_O= 0

±1

±3

±5

µV/°C

µV/V

dV_OS/dT

PSRR

±7

vs Power Supply

_S= ±4V to ±30V, V_CM= 0V

INPUT BIAS CURRENT

Input Bias Current

Input Offset Current

I_B

I_OS

±20

±3

±100

NOISE

Input Voltage Noise Density, f = 1kHz

Current Noise Density, f = 1kHz

e_n

i_n

3.5

nV/√Hz

fA/√Hz

INPUT VOLTAGE RANGE

Common-Mode Voltage Range

Common-Mode Rejection Ratio

V_CM

CMRR

(V–) + 2.5

(V+) – 2.5

–27.5V < V_CM< +27.5V

102

INPUT IMPEDANCE

Differential

Common-Mode

10¹³|| 2

10¹³|| 6

Ω || pF

OPEN-LOOP GAIN

Open-Loop Voltage Gain

T_J= –40°C to +125°C

A_OL

R_L= 3kΩ, –28V < V_O< +28V

110

100

126

120

R_L= 300Ω, –27V < V_O< +27V

FREQUENCY RESPONSE

Gain-Bandwidth Product

Slew Rate

Settling Time: 0.1%

0.01%

GBW

±24

2.2

MHz

V/µs

µs

G = 5

G = 5, C_L= 100pF, 10V Step

V_O= 15Vrms, R_L= 3kΩ, G = 5

V_O= 15Vrms, R_L= 300Ω, G = 5

Total Harmonic Distortion + Noise, f = 1kHz THD+N

0.0005

Overload Recovery Time

V_IN• Gain = V_S

µs

OUTPUT

Voltage Output

T_J= –40°C to +125°C

V_OUT

I_O= 200mA

I_O= 10mA

(V–) + 3.0

(V–) + 3.5

(V–) + 2.0

(V–) + 2.5

±200

(V+) – 3.0

(V+) – 3.5

(V+) – 2.0

(V+) – 2.7

T_J= –40°C to +125°C

Maximum Continuous Current Output: dc

Short-Circuit Current

I_O= 10mA

Package Dependent—See Text

I_O

I_SC

±380

Capacitive Load Drive

C_LOAD

Stable Operation

See Typical Curve

SHUTDOWN FLAG

Thermal Shutdown Status Output

Normal Operation

Thermally Shutdown

Voltage Compliance Range

Junction Temperature

Shutdown

Sourcing

0.05

120

160

(V+) – 1.5

µA

V–

160

140

°C

Reset from Shutdown

POWER SUPPLY

Specified Voltage

Operating Voltage Range

Quiescent Current

V_S

I_Q

±30

±7

±4

±30

±8.5

±10

I_O= 0

T_J= –40°C to +125°C

TEMPERATURE RANGE

Specified Range

Operating Range

Storage Range

Thermal Resistance

SO-8 Surface Mount

DIP-8

T_J

T_A

–40

–55

–65

+125

+150

°C

θ_JA

θ_JC

100

°C/W

DDPak-7

NOTES: (1) All tests are high-speed tested at +25°C ambient temperature. Effective junction temperature is +25°C unless otherwise noted.

OPA551, OPA552

ABSOLUTE MAXIMUM RATINGS⁽¹⁾

ELECTROSTATIC

Output Current ................................................................. See SOA Curve

Supply Voltage, V+ to V– ................................................................... 60V

Input Voltage Range....................................... (V–) – 0.5V to (V+) + 0.5V

Operating Temperature ..................................................–55°C to +125°C

Storage Temperature .....................................................–65°C to +150°C

Junction Temperature .................................................................... +150°C

Lead Temperature (soldering 10s, DIP-8) ...................................... 300°C

(soldering 3s, SO-8 and DDPAK) .................... 240°C

DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Burr-Brown

recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling

and installation procedures can cause damage.

ESD Capability (Human Body Model)............................................. 3000V

ESD damage can range from subtle performance degrada-

tion to complete device failure. Precision integrated circuits

may be more susceptible to damage because very small

parametric changes could cause the device not to meet its

published specifications.

NOTE: (1) Stresses above these ratings may cause permanent damage.

Exposure to absolute maximum conditions for extended periods may degrade

device reliability.

PACKAGE/ORDERING INFORMATION

PACKAGE

DRAWING

NUMBER⁽¹⁾

SPECIFIED

TEMPERATURE

RANGE

PACKAGE

MARKING

ORDERING

NUMBER⁽²⁾

TRANSPORT

MEDIA

PRODUCT

PACKAGE

OPA551UA

SO-8

182

006

328

182

006

328

–40°C to +125°C

OPA551UA

OPA551UA/2K5

OPA551PA

OPA551FA

OPA551FA/500

OPA552UA

OPA552UA/2K5

OPA552PA

OPA552FA

Rails

Tape and Reel

Rails

Tape and Reel

Rails

Tape and Reel

Rails

Tape and Reel

DIP-8

DDPAK-7

SO-8

DIP-8

DDPAK-7

OPA551PA

–40°C to +125°C

OPA551PA

OPA551FA

–40°C to +125°C

OPA552UA

–40°C to +125°C

OPA552UA

OPA552PA

OPA552FA

OPA552PA

OPA552FA

–40°C to +125°C

OPA552FA/500

NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Products followed by a slash

(/) are only available in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of “OPA551UA/2K5” will get

a single 2500-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility

for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or

licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support

devices and/or systems.

OPA551, OPA552

TYPICAL PERFORMANCE CURVES

At T_J= +25°C, V_S= ±30V and R_L= 3kΩ, unless otherwise noted.

All temperatures are junction temperatures unless otherwise noted. Refer to the Applications Information section to calculate junction temperatures from ambient

temperatures for a specific configuration.

OPEN-LOOP GAIN AND PHASE vs FREQUENCY

OPA552

OPEN-LOOP GAIN AND PHASE vs FREQUENCY

OPA551

140

120

100

140

120

100

OPA552

OPA551

–20

–40

–60

–80

–100

–120

–140

–160

–180

–20

–40

–60

–80

–100

–120

–140

–160

–180

Gain

Phase

–20

–40

–20

–40

100

10k

100k

10M

100

10k

100k

10M

Frequency (Hz)

POWER SUPPLY REJECTION RATIO vs FREQUENCY

COMMON-MODE REJECTION RATIO vs FREQUENCY

120

100

120

100

–PSRR

+PSRR

100

10k

100k

10M

100

10k

100k

10M

Frequency (Hz)

INPUT VOLTAGE AND CURRENT NOISE

SPECTRAL DENSITY vs FREQUENCY

TOTAL HARMONIC DISTORTION + NOISE

vs FREQUENCY

10k

0.1

0.01

V_O= 15Vrms

R_L= 3kΩ, 300Ω

G = 3 (OPA551)

G = 5 (OPA552)

i_n

100

0.001

0.0001

e_n

100

10k

100k

100

10k

100k

Frequency (Hz)

OPA551, OPA552

TYPICAL PERFORMANCE CURVES (Cont.)

At T_J= +25°C, V_S= ±30V and R_L= 3kΩ, unless otherwise noted.

All temperatures are junction temperatures unless otherwise noted. Refer to the Applications Information section to calculate junction temperatures from ambient

temperatures for a specific configuration.

MAXIMUM OUTPUT VOLTAGE SWING

vs FREQUENCY

OUTPUT VOLTAGE SWING vs OUTPUT CURRENT

(V+)

(V+)–1

(V+)–2

±30

±25

±20

±15

±10

±5

+85°C

+25°C

OPA552

–55°C

(V+)–3

(V–)+3

+25°C

–55°C

OPA551

(V–)+2

(V–)+1

(V–)

Without Slew-Induced

+85°C

Distortion

100

10k

100k

10M

100

150

200

250

300

350

400

Frequency (Hz)

Output Current (mA)

OPEN-LOOP GAIN, POWER SUPPLY REJECTION RATIO,

AND COMMON-MODE REJECTION RATIO

vs TEMPERATURE

INPUT BIAS CURRENT AND INPUT OFFSET CURRENT

vs TEMPERATURE

100k

10k

130

125

120

115

110

105

100

A_OL

PSRR

CMRR

+I_B

100

–I_B

–I_OS

–75

–50

–25

100

125

–75

–25

125

Ambient Temperature (°C)

QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT

vs TEMPERATURE

GAIN BANDWIDTH PRODUCT vs TEMPERATURE

100

450

430

410

390

370

350

330

310

290

270

I_Q

–I_SC

OPA552

+I_SC

OPA551

–80 –60 –40 –20

20 40 60 80 100 120 140

–75 –50 –25

75 100 125 150

Temperature (°C)

OPA551, OPA552

TYPICAL PERFORMANCE CURVES (Cont.)

At T_J= +25°C, V_S= ±30V and R_L= 3kΩ, unless otherwise noted.

All temperatures are junction temperatures unless otherwise noted. Refer to the Applications Information section to calculate junction temperatures from ambient

temperatures for a specific configuration.

INPUT BIAS CURRENT AND INPUT OFFSET CURRENT

SLEW RATE vs TEMPERATURE

vs COMMON-MODE VOLTAGE

+I_B

–I_B

OPA552

OPA551

I_OS

–5

–60 –40 –20

80 100 120 140

–30

–20

–10

Junction Temperature (°C)

Common-Mode Voltage (V)

QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT

vs SUPPLY VOLTAGE

OFFSET VOLTAGE

PRODUCTION DISTRIBUTION

7.6

7.2

6.8

6.4

6.0

405

395

385

375

365

Typical production

distribution of

packaged units.

–I_SC

I_Q

+I_SC

Supply Voltage (V)

Offset Voltage (mV)

OFFSET VOLTAGE DRIFT

PRODUCTION DISTRIBUTION

SETTLING TIME vs CLOSED-LOOP GAIN

100

Typical production

distribution of

packaged units.

OPA551

0.01%

OPA551

0.1%

OPA552

0.01%

OPA552

0.1%

100

Gain (V/V)

Offset Drift µV/°C

OPA551, OPA552

TYPICAL PERFORMANCE CURVES (Cont.)

At T_J= +25°C, V_S= ±30V and R_L= 3Ω, unless otherwise noted.

All temperatures are junction temperatures unless otherwise noted. Refer to the Applications Information section to calculate junction temperatures from ambient

temperatures for a specific configuration.

LARGE-SIGNAL STEP RESPONSE

SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE

OPA551, G = 1, C_L= 100pF

OPA551, G = 1

OPA551

OPA552

G = –4

OPA551

G = –1

OPA552

G = –6

OPA551

G = –2

OPA552, G = –8

0.01

0.1

Time (1µs/div)

Load Capacitance (nF)

LARGE-SIGNAL STEP RESPONSE

OPA552, G = 5, C_L= 100pF

SMALL-SIGNAL STEP RESPONSE

OPA551, G = 1, C_L= 100pF

OPA552

OPA551

Time (1µs/div)

SMALL-SIGNAL STEP RESPONSE

OPA552, G = 5, C_L= 100pF

SMALL-SIGNAL STEP RESPONSE

OPA551, G = –1, C_L= 1000pF

OPA552

OPA551

Time (1µs/div)

OPA551, OPA552

CURRENT LIMIT

APPLICATIONS INFORMATION

The OPA551 and OPA552 are designed with internal cur-

rent-limiting circuitry that limits the output current to ap-

proximately 380mA. The current limit varies with increasing

junction temperature as shown in the typical curve “Current

Limit vs Temperature.” This, in combination with the ther-

mal protection circuitry, provides protection from many

types of overload conditions including short circuit to ground.

Figure 1 shows the OPA551 connected as a basic non-

inverting amplifier. The OPA551 can be used in virtually

any op amp configuration. OPA552 is designed for use in

configurations with gains of 5 or greater. Power supply

terminals should be bypassed with 0.1µF capacitors, or

greater, near the power supply pins. Be sure that the capaci-

tors are appropriately rated for the power supply voltage

used. The OPA551 and OPA552 can supply output currents

up to 200mA with excellent performance.

THERMAL PROTECTION

The OPA551 and OPA552 have thermal shutdown circuitry

that protects the amplifier from damage caused by overload

conditions. The thermal protection circuitry disables the

output when the junction temperature reaches approximately

160°C, allowing the device to cool. When the junction

temperature cools to approximately 140°C, the output cir-

cuitry is automatically re-enabled.

V+

10µF

R₂

G = 1+

R₁

0.1µF

R₂

R₁

The thermal shutdown function is not intended to replace

proper heat sinking. Activation of the thermal shutdown

circuitry is an indication of excessive power dissipation or

an inadequate heat sink. Continuously running the amplifier

into thermal shutdown can degrade reliability.

V_O

OPA551

Z_L

V_IN

Flag

(optional)

The Thermal Shutdown Indicator (“flag”) pin can be moni-

tored to determine if shutdown is occurring. During normal

operation, the current output from the flag pin is typically

50nA. During shutdown, the current output from the flag pin

increases to 120µA (typical). This current output allows for

easy interfacing to external logic. See Figure 2 for two

examples implementing this function.

0.1µF

10µF

V–

FIGURE 1. Basic Circuit Connections.

V_OUT

OPA551

V_LOGIC

HP5082-2835

Flag

80µA to

160µA

+5V

Interface to virtually any CMOS

logic gate by choosing resistor

value that provides a guaranteed

logic high voltage with the

minimum (80µA) flag current. A

diode clamp to the logic supply

voltage assures that the CMOS

is not damaged by overdrive.

HCT logic has relatively well-

controlled logic level. A properly

chosen resistor value can

guarantee proper logic high level

throughout the full range of flag

output current.

HCT

CMOS

27kΩ

47kΩ

Logic

Ground

Logic

Ground

Interfacing with HCT Logic

Interfacing with CMOS Logic

FIGURE 2. Thermal Shutdown Indicator.

OPA551, OPA552

POWER SUPPLIES

The power being dissipated (P_D) in the output transistor of

the amplifier can be calculated:

The OPA551 and OPA552 may be operated from power

supplies of ±4V to ±30V, or a total of 60V with excellent

performance. Most behavior remains unchanged throughout

the full operating voltage range. Parameters that vary sig-

nificantly with operating voltage are shown in the Typical

Performance Curves.

P_{D(output stage)}= I_O• (V_S– V_O) = 25mA • (30 – 15) = 375mW

P_D(total)= P_D(internal)+ P_{D(output stage)}= 432mW + 375mW = 807mW

The resulting junction temperature can be calculated:

T_J= T_A+ P_Dθ_JA

For applications that do not require symmetrical output

voltage swing, power supply voltages do not need to be

equal. The OPA551 and OPA552 can operate with as little

as 8V between the supplies or with up to 60V between the

supplies. For example, the positive supply could be set to

50V with the negative supply at –10V or vice-versa.

T_J= 40°C + 807mW • 100°C/W = 120.7°C

Where,

T_J= junction temperature (°C)

T_A= ambient temperature (°C)

θ_JA= junction-to-air thermal resistance (°C/W)

The SO-8 package outline shows three negative supply (V–)

pins. These pins are internally connected for improved thermal

performance. Pin 4 is to be used as the primary current

carrier for the negative supply. It is recommended that

pins 1 and 5 not be directly connected to V– but, instead

be connected to a thermal mass. DO NOT lay out the PC

board to use pins 1 and 5 as feedthroughs to the negative

supply. Doing so can result in a reduction of performance.

For the DDPAK package, the θ_JAis 65°C/W with no heat

sinking, resulting in a junction temperature of 92.5°C.

To estimate the margin of safety in a complete design

(including heat sink), increase the ambient temperature until

the thermal protection is activated. Use worst-case load and

signal conditions. For good reliability, the thermal protec-

tion should trigger more than +35°C above the maximum

expected ambient condition of your application. This en-

sures a maximum junction temperature of +125°C at the

maximum expected ambient condition.

The tab of the DDPAK-7 package is electrically connected

to the negative supply (V–), however, this connection should

not be used to carry current. For best thermal performance,

the tab should be soldered directly to the circuit board

copper area (see heat sink text).

If the OPA551 or OPA552 is to be used in an application

requiring more than 0.5W continuous power dissipation, it

is recommended that the DDPAK package option be used.

The DDPAK has superior thermal dissipation characteris-

tics and is more easily adapted to a heat sink.

POWER DISSIPATION

Internal power dissipation of these op amps can be quite

large. Many of the specifications for the OPA551 and

OPA552 are for a specified junction temperature. If the

device is not subjected to internal self-heating, the junction

temperature will be the same as the ambient. However, in

practical applications, the device will self-heat and the junc-

tion temperature will be significantly higher than ambient.

After junction temperature has been established, perfor-

mance parameters that vary with junction temperature can be

determined from the performance curves. The following

calculation can be performed to establish junction tempera-

ture as a function of ambient temperature and the conditions

of the application.

Operation from a single power supply (or unbalanced power

supplies) can produce even larger power dissipation since a

larger voltage can be impressed across the conducting output

transistor. Consult Application Bulletin AB-039 for further

information on how to calculate or measure power dissipation.

Power dissipation can be minimized by using the lowest

possible supply voltage. For example, with a 200mA load,

the output will swing to within 3.5V of the power supply

rails. Power supplies set to no more than 3.5V above the

maximum output voltage swing required by the application

will minimize the power dissipation.

SAFE OPERATING AREA

Consider the OPA551 in a circuit configuration where the

load is 600Ω and the output voltage is 15V. The supplies are

at ±30V and the ambient temperature (T_A) is 40°C. The θ_JA

for the 8-pin DIP package is 100°C/W.

The Safe Operating Area (SOA curves, Figures 3, 4, and 5)

shows the permissible range of voltage and current. The

curves shown represent devices soldered to a circuit board

with no heat sink. The safe output current decreases as the

voltage across the output transistor (V_S– V_O) increases. For

further insight on SOA, consult Application Bulletin AB-039.

First, the internal heating of the op amp is as follows:

P_D(internal)= I_Q• V_S= 7.2mA • 60V = 432mW

The output current (I_O) can be calculated:

I_O= V_OUT/R_L= 15V/600Ω = 25mA

Output short circuits are a very demanding case for SOA.

A short circuit to ground forces the full power supply

voltage (V+ or V–) across the conducting transistor and

produces a typical output current of 380mA. With ±30V

OPA551, OPA552

power supplies, this creates an internal dissipation of 11.4W.

This far exceeds the maximum rating and is not recom-

mended. If operation in this region is unavoidable, use the

DDPAK with a heat sink.

HEAT SINKING

Power dissipated in the OPA551 or OPA552 will cause the

junction temperature to rise. For reliable operation, the

junction temperature should be limited to +125°C. Many

applications will require a heat sink to assure that the

maximum operating junction temperature is not exceeded.

The heat sink required depends on the power dissipated and

on ambient conditions.

SAFE OPERATING AREA—8-PIN DIP

1000

For heat sinking purposes, the tab of the DDPAK is typically

soldered directly to a circuit board copper area. Increasing

the copper area improves heat dissipation. Figure 6 shows

typical thermal resistance from junction-to-ambient as a

function of copper area.

25°C

100

125°C

85°C

Depending on conditions, additional heat sinking may be

required. Aavid Thermal Products Inc. manufactures sur-

face-mountable heat sinks designed specifically for use with

DDPAK packages. Further information is available on

Aavid’s web site, www.aavid.com.

0.1

100

| V_S| – | V_O| (V)

To estimate the margin of safety in a complete design

(including heat sink), increase the ambient temperature until

the thermal protection is activated. Use worst-case load and

signal conditions. For good reliability, the thermal protec-

tion should trigger more than +25°C above the maximum

expected ambient condition of your application. This pro-

duces a junction temperature of +125°C at the maximum

expected ambient condition.

FIGURE 3. DIP-8 Safe Operating Area.

SAFE OPERATING AREA—SO-8

1000

25°C

100

THERMAL RESISTANCE vs

CIRCUIT BOARD COPPER AREA

125°C

85°C

OPA551, OPA552

Surface-Mount Package

1oz. copper

0.1

| V_S| – | V_O| (V)

100

FIGURE 4. SO-8 Safe Operating Area.

Copper Area (inches²)

SAFE OPERATING AREA—DDPAK

25°C

1000

100

25°C

1" Copper

Circuit Board Copper Area

125°C

1" Copper

85°C

0.1

100

OPA551, OPA552

| V_S| – | V_O| (V)

Surface-Mount Package

FIGURE 5. DDPAK-7 Safe Operating Area.

FIGURE 6. DDPAK Thermal Resistance vs Circuit Board

Copper Area.

OPA551, OPA552

can be used to boost output current. The circuit in Figure 10

is capable of supplying output currents up to 1A. Alterna-

tively, the OPA547, OPA548, and OPA549 series power op

amps should be considered for high output current drive,

along with programmable current limit and output disable

capability.

CAPACITIVE LOADS

The dynamic characteristics of the OPA551 and OPA552

have been optimized for commonly encountered gains, loads,

and operating conditions. The combination of low closed-

loop gain and capacitive load will decrease the phase margin

and may lead to gain peaking or oscillations. Figure 7 shows

a circuit that preserves phase margin with capacitive load.

Figure 8 shows the small-signal step response for the circuit

in Figure 7. Consult Application Bulletin AB-028 for more

information.

R₁

R₂

(1)

R_S

“MASTER”

+30V

10Ω

OPA551

V_IN

OPA551

(1)

R_S

10nF

R_G

4kΩ

R_F

4kΩ

10Ω

OPA551

V_I

C_S

1.8nF

C_F

220pF

R_L

“SLAVE”

–30V

NOTE: (1) R_Sresistors minimize the circulating

current that can flow between the two devices

due to V_OSerrors.

FIGURE 7. Driving Large Capacitive Loads.

SMALL-SIGNAL STEP RESPONSE

OPA551, G = –1, C_L= 10nF

FIGURE 9. Parallel Amplifers Increase Output Current Ca-

pability.

OPA551

R₁

R₂

+30V

TIP29C

C_F

R₄

0.2Ω

(1)

R₃

100Ω

Time (2.5µs/div)

V_O

OPA551

V_IN

R₄

0.2Ω

FIGURE 8. Small-Signal Step Response for Figure 7.

LOAD

TIP30C

INCREASING OUTPUT CURRENT

In those applications where the 200mA of output current is

not sufficient to drive the desired load, output current can be

increased by connecting two or more OPA551s or OPA552s

in parallel as shown in Figure 9. Amplifier A1 is the

“master” amplifier and may be configured in virtually an op

amp circuit. Amplifier A2, the “slave”, is configured as a

unity gain buffer. Alternatively, external output transistors

–30V

NOTE: (1) R₃provides current limit and allows the amplifier to

drive the load when the output is between 0.7V and –0.7V.

FIGURE 10. External Output Transistors Boost Output Cur-

rent Up to 1 Amp.

OPA551, OPA552

INPUT PROTECTION

providing the full slew rate at the output and an excep-

tional distortion performance due to increased loop gain at

frequencies below NG₁• Z₀. The capacitor values shown

in Figure 11 are calculated for NG₁= 2 and NG₂= 10 with

no adjustment for parasitics.

The OPA551 and OPA552 feature internal clamp diodes

to protect the inputs when voltages beyond the supply rails

are encountered. However, input current should be limited

to 5mA. In some cases, an external series resistor may be

required. Many input signals are inherently current-limtied,

therefore, a limiting resistor may not be required. Please

consider that a “large” series resistor, in conjunction with

the input capacitance, can affect stability.

Actual circuit values can be optimized by check the

small-signal step response with actual load conditions.

Figure 12 shows the small-signal step response of this

OPA552, G = –1 circuit with a 500pF load. It is well-

behaved with no tendency to oscillate. If C_Sand C_Fwere

removed, the circuit would be unstable.

USING THE OPA552 IN LOW GAINS

The OPA552 family is intended for applications with

signal gains of 5 or greater, but it is possible to take

advantage of their high slew rate in lower gains using an

external compensation technique in an inverting configu-

ration. This technique maintains low noise characteristics

of the OPA552 architecture at low frequencies. Depending

on the application, a small increase in high frequency

noise may result. This technique shapes the loop gain for

good stability while giving an easily controlled second-

order low-pass frequency response.

+30V

V_OUT

OPA552

R_G

1kΩ

R_F

1kΩ

V_IN

C_S

1.88nF

C_F

208pF

Considering only the noise gain (non-inverting signal

gain) for the circuit of Figure 11, the low frequency noise

gain (NG₁) will be set by the resistor ratios, while the high

frequency noise gain (NG₂) will be set by the capacitor

ratios. The capacitor values set both the transition fre-

quencies and the high frequency noise gain. If this noise

gain, determined by NG₂= 1 + C_S/C_F, is set to a value

greater than the recommended minimum stable gain for

the op amp and the noise gain pole, set by 1/R_FC_F, is

placed correctly, a very well controlled, 2nd-order low-

pass frequency response will result.

–30V

NG₁= 1 + R_F/R_G= 2

NG₂= 1 + C_S/C_F= 10

FIGURE 11. Compensation of the OPA552 for G = 1.

SMALL-SIGNAL STEP RESPONSE

OPA552, G = –1, C_L= 500pF

To choose the values for both C_Sand C_F, two parameters

and only three equations need to be solved. First, the

target for the high frequency noise gain (NG₂) should be

greater than the minimum stable gain for the OPA552. In

the circuit in Figure 11, a target NG₂of 10 is used.

Second, the signal gain of –1 shown in Figure 11 sets the

low frequency noise gain to NG₁= 1 + R_F/R_G(=2 in this

example). Using these two gains, knowing the Gain Band-

width Product (GBP) for the OPA552 (12MHz), and

targeting a maximally flat 2nd-order, low-pass Butterworth

frequency response (Q = 0.707), the key frequency in the

compensation can be found.

OPA552

For the values shown in Figure 11, the f_–3dBwill be

approximately 956kHz. This is less than that predicted by

simply dividing the GBP by NG₁. The compensation

network controls the bandwidth to a lower value while

Time (1µs/div)

FIGURE 12. Small-Signal Step Response for Figure 11.

OPA551, OPA552

OFFSET VOLTAGE ERROR CALCULATION

The offset voltage (V_OS) of the OPA51 and OPA552 is

calculate excursions from the specified offset voltage

under different applications conditions. For example, a

common application might configure the amplifier with

a –48 single supply with –6V common-mode. This

configuration represents a 12V variation in power sup-

ply: ±30V or 60V in the offset specification versus 48V

in the application. In addition, this configuration has an

18V variation in common-mode voltage: V_S/2 = –24V is

the specification for these power supplies, but the com-

mon-mode voltage is –6V in the application.

specified with a ±30V power supply and the common-

mode voltage centered between the supplies (V_S/2 =

0V). Additional specifications for power supply rejec-

tion and common-mode rejection are provided to allow

the user to easily calculate worst-case excepted offset

under the conditions of a given application.

Power Supply Rejection Ratio (PSRR) is specified in

µV/V. For the OPA551 and OPA552, worst-case PSRR

is 30µV/V, which means for each volt of change in total

power supply voltage, the offset may shift by up to

30µV/V. Common-Mode Rejection Ratio (CMRR) is

specified in dB, which can be converted to µV/V using

the following equation:

Calculation of the worst-case expected offset would be

as follows:

Worst-case V_OS

(2)

maximum specified V_OS

CMRR in (V/V) = 10^{[(CMRR in dB)/–20]}

(1)

+ (power supply variation • PSRR

+ (common-mode variation • CMRR)

For the OPA551 and OPA552, the worst-case CMRR at

±30mV supply over the full common-mode range is

96dB, or approxmately 15.8µV/V. This means that for

every volt of change in common-mode, the offset may

shift up to 15.8µV. These numbers can be used to

V_OSwc= 5mV + (12V • 30µV/V) + (18V • 15.8µV/V)

= ±5.64mV

OPA551, OPA552

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OPA551FA/500产品参数

型号:	OPA551FA/500
Brand Name：	Texas Instruments
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
IHS 制造商：	TEXAS INSTRUMENTS INC
零件包装代码：	D2PAK
包装说明：	D2PAK-7
针数：	7
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.33.00.01
Factory Lead Time：	1 week
风险等级：	0.72
Samacsys Confidence：	3
Samacsys Status：	Released
Samacsys PartID：	181629
Samacsys Pin Count：	8
Samacsys Part Category：	Integrated Circuit
Samacsys Package Category：	TO-XXX (Inc. DPAK)
Samacsys Footprint Name：	KTW (R-PSFM-G7)
Samacsys Released Date：	2015-04-13 16:55:53
Is Samacsys：	N
放大器类型：	OPERATIONAL AMPLIFIER
架构：	VOLTAGE-FEEDBACK
最大平均偏置电流 (IIB)：	0.0001 µA
25C 时的最大偏置电流 (IIB)：	0.0001 µA
最小共模抑制比：	92 dB
标称共模抑制比：	102 dB
频率补偿：	YES
最大输入失调电流 (IIO)：	0.0001 µA
最大输入失调电压：	3000 µV
JESD-30 代码：	R-PSSO-G7
JESD-609代码：	e3
长度：	10.1 mm
低-偏置：	YES
低-失调：	NO
微功率：	NO
湿度敏感等级：	2
负供电电压上限：	-30 V
标称负供电电压 (Vsup)：	-30 V
功能数量：	1
端子数量：	7
最高工作温度：	125 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP
封装等效代码：	SMSIP7H,.55,50TB
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
包装方法：	TR
峰值回流温度（摄氏度）：	260
功率：	YES
电源：	+-4/+-30/8/60 V
可编程功率：	NO
认证状态：	Not Qualified
座面最大高度：	4.65 mm
标称压摆率：	15 V/us
子类别：	Operational Amplifier
最大压摆率：	8.5 mA
供电电压上限：	30 V
标称供电电压 (Vsup)：	30 V
表面贴装：	YES
温度等级：	AUTOMOTIVE
端子面层：	Matte Tin (Sn)
端子形式：	GULL WING
端子节距：	1.27 mm
端子位置：	SINGLE
处于峰值回流温度下的最长时间：	NOT SPECIFIED
标称均一增益带宽：	3000 kHz
最小电压增益：	100000
宽带：	NO
宽度：	8.89 mm
Base Number Matches：	1

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