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产品型号PCD5095H的Datasheet PDF文件预览

INTEGRATED CIRCUITS  
DATA SHEET  
PCD5095  
DECT baseband controller  
1997 Nov 19  
Objective specification  
File under Integrated Circuits, IC17  
Philips Semiconductors  
Objective specification  
DECT baseband controller  
PCD5095  
CONTENTS  
1
FEATURES  
1.1  
2
DSP software features  
GENERAL DESCRIPTION  
ORDERING INFORMATION  
BLOCK DIAGRAM  
3
4
5
PINNING INFORMATION  
5.1  
5.2  
Pinning  
Pin description  
6
7
8
FUNCTIONAL DESCRIPTION  
PACKAGE OUTLINE  
SOLDERING  
8.1  
8.2  
8.3  
8.4  
Introduction  
Reflow soldering  
Wave soldering  
Repairing soldered joints  
9
DEFINITIONS  
10  
11  
LIFE SUPPORT APPLICATIONS  
PURCHASE OF PHILIPS I2C COMPONENTS  
1997 Nov 19  
2
Philips Semiconductors  
Objective specification  
DECT baseband controller  
PCD5095  
Easy interfacing with radio circuits, operating at other  
supply voltage (RF supply pin with level shifter for RF  
signals)  
1
FEATURES  
80C51 ports P0, P1, P2 and P3 available for interfacing  
to display, keyboard, I2C-bus, interrupt sources and/or  
external memory. Integrated 64 kbyte ROM, 3 kbytes of  
data memory and 1kbyte System Data RAM. External  
program memory is addressable up to 128 kbytes  
Low-power oscillator with integrated frequency  
adjustment  
QFP100 package  
+2.7 to 5 V port (P0 to P3) interface  
Power-on-reset  
TDMA frame (de)multiplexing, transmission or reception  
can be programmed for any slot  
Programmable power-down modes  
Low supply voltage (2.7 to 3.6 V)  
CMOS technology.  
Ciphering, scrambling, CRC checking/generation and  
protected B-fields  
Speech and data buffering space for six handsets  
Local call and B-field loop-back  
1.1  
DSP software features  
3x ADPCM transcoding complying with G.726  
Two interrupt lines for BML and DSP to interrupt 80C51  
A-Law encoding and decoding complying with G.711  
On-chip, three channel time-multiplexed 8-bit  
Analog-to-Digital Converter (ADC) for RSSI  
measurement, one for battery voltage measurement  
and one channel available for other purposes  
4 Channel bidirectional ADPCM interface to the IOM -2  
and radio interface  
Programmable channel switching and buffers  
Channel mute.  
On-chip 8-bit Digital-to-Analog Converter (DAC) for  
electronic potentiometer function  
For each DSP software version a separate manual is  
available in which detailed information is provided on how  
parameters must be set. For further information please  
contact Philips Semiconductors.  
Phase error measurement and phase error correction by  
hardware  
DACs and ADCs for dynamic earpiece and dynamic or  
electret microphone  
2
GENERAL DESCRIPTION  
On-chip reference voltage  
The PCD5095 is designed for GAP-compliant business  
systems, PABX and WLL. Two modes can be selected:  
three channel ADPCM CODEC with conversion of  
ADPCM samples to linear PCM format and vice versa, the  
second mode copies four ADPCM samples into two IOM  
data buffers and vice versa. In both modes the DSP  
controls the bidirectional data flow from the radio interface  
and the IOM -2 interface. The 80C51 controls the DECT  
protocol and the IOM -2 interface. The performance of the  
embedded 80C51 microcontroller is twice the performance  
of the classic architecture. The PCD5095 has 64 kbytes of  
PROM program memory and 3 kbytes of data memory  
on-chip. In addition there is 1 kbyte of on-chip data  
memory that is shared with the Burst Mode Logic (BML),  
the DSP and the System Data RAM (SDR).  
On-chip supply for electret microphone  
Very low ohmic buzzer output  
Serial interface to external ADPCM CODEC (PCD5032)  
or 8 kHz u-law samples  
Speech switch for Digital Telephone Answering  
Machine (DTAM) connected to SPI interface  
IOM -2 interface (Siemens registered trademark)  
Serial interface to synthesizer for frequency  
programming  
Programmable polarity and timing of radio-control  
signals  
GMSK pulse shaper  
On-chip comparator for use as data-slicer  
3
ORDERING INFORMATION  
TYPE  
PACKAGE  
NUMBER  
NAME  
DESCRIPTION  
VERSION  
PCD5095H  
QFP100  
plastic quad flat package; 100 leads (lead length 1.95 mm);  
SOT317-2  
body 14 × 20 × 2.8 mm  
1997 Nov 19  
3
Philips Semiconductors  
Objective specification  
DECT baseband controller  
PCD5095  
4
BLOCK DIAGRAM  
GM1L8  
a n d b o o k , f u l l p a g e w i d t h  
1997 Nov 19  
4
Philips Semiconductors  
Objective specification  
DECT baseband controller  
PCD5095  
5
PINNING INFORMATION  
Pinning  
5.1  
1
2
3
4
5
6
7
8
9
ANT_SW1  
80 TST2  
79 TST1  
ANT_SW0  
CLK100  
78  
77  
V
V
SS4  
T_ENABLE  
T_PWR_RMP  
T_DATA  
DD5V_2  
76 A16  
75 P2.2  
T_GMSK  
P2.1  
P2.0  
74  
73  
VCO_BND_SW  
SYNTH_LOCK  
72 P3.7  
71 P3.6  
S_ENABLE 10  
11  
12  
13  
S_DATA  
S_CLK  
P3.5  
P3.4  
70  
69  
S_PWR  
68 P3.3  
67 P3.2  
REF_CLK 14  
V
15  
16  
17  
P3.1  
P3.0  
V
66  
65  
64  
63  
62  
61  
60  
SS1  
DD_RF  
PCD5095  
V
V
DD3V_1  
SS3  
V
SLICE_CTR 18  
R_PWR 19  
SS2  
BZP  
BZM  
V
20  
R_DATAP  
R_DATAM 21  
R_ENABLE 22  
RSSI_AN 23  
VANLI 24  
VBAT 25  
DD3V_2  
59 P1.7  
P1.6  
P1.5  
58  
57  
56 P1.4  
55 P1.3  
CLK3 26  
DCK 27  
V
DD5V_1  
54  
53  
52  
DI 28  
R_SLICED  
FS1  
DPLL_DATA  
29  
DO 30  
51 GP_CLK7  
MGL187  
Fig.2 Pin configuration (QFP100).  
5
1997 Nov 19  
Philips Semiconductors  
Objective specification  
DECT baseband controller  
PCD5095  
5.2  
Pin description  
Table 1 QFP100 package  
STATE  
AFTER  
RESET  
SYMBOL  
ANT_SW1  
PIN  
I/O  
PIN TYPE  
PIN DESCRIPTION  
1
O
O
O
O
O
O
O
O
I
H
ISP2DRF3 antenna switch 1 output  
ISP2DRF3 antenna switch 0 output  
ANT_SW0  
CLK100  
2
H
3
H
ISP2DPES 100 Hz signal related to DECT frame timing output  
ISP2DRF3 enable transmitter output  
T_ENABLE  
T_PWR_RMP  
T_DATA  
4
H
5
L
ISP2DRF3 switch transmitter power output  
6
off  
ISF2DRF3  
ANAIOD1  
unmodulated transmitter data output  
T_GMSK  
VCO_BND_SW  
SYNTH_LOCK  
S_ENABLE  
S_DATA  
7
L
GMSK modulated transmitter data output  
8
L
ISP2DRF3 VCO band switch output  
9
DIPP0RF3 synthesizer lock input  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
O
O
O
O
O
L
ISP2DRF3 synthesizer enable output  
L
ISP2DRF3 serial synthesizer data output  
ISP2DRF3 clock for serial synthesizer interface output  
ISP2DRF3 switch synthesizer power output  
ISP4DRF3 13.824 MHz reference clock for synthesizer output  
S_CLK  
L
S_PWR  
H
REF_CLK  
VSS1  
running  
supply  
supply  
supply  
negative supply voltage 1  
VDD_RF  
positive supply voltage for RF interface level shifters  
positive supply voltage 1 (+3 V)  
VDD3V_1  
SLICE_CTR  
R_PWR  
O
O
I
L
ISP2DRF3 switch slicer time constant output  
ISP2DRF3 switch receiver power output  
H
R_DATAP  
R_DATAM  
R_ENABLE  
RSSI_AN  
VANLI  
ANAIOD2  
ANAIOD2  
positive input for receiver data  
negative input for receiver data  
I
O
I
H
ISP2DRF3 enable receiver output  
ANAIOD1  
ANAIOD1  
ANAIOD1  
analog input for RSSI measurement  
I
analog input to ADC  
VBAT  
I
analog input for battery voltage measurement  
CLK3  
O
I/O  
L
ISP2DPES 3.456 MHz clock output for external ADPCM codec  
DCK  
input  
ISF2DPES ADPCM output or IOM -2 data clock input/output  
ISF2UPES (ISF2UPES in PCD5090/xxx, PCA5097/xxx)  
DI  
28  
29  
I
DIPP0PES ADPCM or IOM -2 data input  
FS1  
I/O  
input  
ISF2DPES 8 kHz framing input/output  
ISF2UPES (ISF2UPES in PCD5090/xxx, PCA5097/xxx)  
DO  
30  
31  
32  
33  
34  
35  
O
O
I
off  
ISI8DPES  
ANAIOD1  
ANAIOD1  
ANAIOD1  
supply  
ADPCM or IOM -2 data output  
crystal oscillator output  
XTAL2  
XTAL1  
VANLO  
VSSO  
running  
1.0 V  
crystal oscillator input  
O
analog output from DAC  
negative supply voltage for the oscillator  
positive supply voltage for the oscillator  
VDDO  
supply  
1997 Nov 19  
6
Philips Semiconductors  
Objective specification  
DECT baseband controller  
PCD5095  
STATE  
SYMBOL  
LIFM  
PIN  
I/O  
AFTER  
RESET  
PIN TYPE  
PIN DESCRIPTION  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
69  
70  
71  
72  
73  
74  
I
0.7 V  
ANAIOD1  
ANAIOD1  
supply  
negative input from line interface  
positive input from line interface  
LIFP  
I
0.7 V  
VSSA  
negative supply voltage for analog circuits  
negative input from microphone  
positive input from microphone  
positive microphone supply voltage (+2 V)  
reference voltage (+2 V)  
MICM  
MICP  
VMIC  
Vref  
I
0.7 V  
ANAIOR1  
ANAIOR1  
ANAIOD1  
ANAIOD1  
ANAIOR1  
supply  
I
0.7 V  
O
off  
O
2.0 V  
VBGP  
VDDA  
O
1.25 V  
bandgap output voltage (+1.25 V)  
positive supply voltage for analog circuits  
negative output to earpiece  
EARM  
EARP  
EN_WATCHDOG  
P1.0  
O
1.4 V  
1.4 V  
ANAIOD1  
ANAIOD1  
O
positive output to earpiece  
I
DIUP0PES Watchdog Timer enable input  
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES bidirectional 80C51 port pin  
ISP2DPES general purpose 6.912 MHz output  
ISP2DPES data after clock recovery network  
ISP2DPES R_DATA comparator output  
I/O  
I/O  
I/O  
O
H
P1.1  
H
P1.2  
H
GP_CLK7  
DPLL_DATA  
R_SLICED  
VDD5V_1  
P1.3  
L
O
L
O
L
supply  
positive supply voltage 1 for the +5 V interface  
I/O  
I/O  
I/O  
I/O  
I/O  
H
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES bidirectional 80C51 port pin  
P1.4  
H
P1.5  
H
P1.6  
off  
off  
ISI8DPES  
ISI8DPES  
supply  
bidirectional 80C51 port pin  
bidirectional 80C51 port pin  
positive supply voltage 2 (+3 V)  
negative buzzer output  
P1.7  
VDD3V_2  
BZM  
O
L
ANAIOD2  
ANAIOD2  
supply  
BZP  
O
L
positive buzzer output  
VSS2  
negative supply voltage 2  
negative supply voltage 3  
VSS3  
supply  
P3.0  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
H
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES bidirectional 80C51 port pin  
P3.1  
H
P3.2  
H
P3.3  
H
P3.4  
H
P3.5  
H
P3.6  
H
P3.7  
H
P2.0  
H
P2.1  
H
1997 Nov 19  
7
Philips Semiconductors  
Objective specification  
DECT baseband controller  
PCD5095  
STATE  
SYMBOL  
P2.2  
PIN  
I/O  
AFTER  
RESET  
PIN TYPE  
PIN DESCRIPTION  
75  
76  
77  
78  
79  
80  
81  
82  
83  
84  
85  
86  
87  
88  
89  
90  
91  
I/O  
O
H
L
ISQ2CPES bidirectional 80C51 port pin  
ISP4DPES address bit 16 for 128 kbytes external program memory  
A16  
VDD5V_2  
VSS4  
TST1  
TST2  
P2.3  
P2.4  
P2.5  
P2.6  
P2.7  
PSE  
supply  
supply  
positive supply voltage 2 for the +5 V interface  
negative supply voltage 4  
I
DIDP0PES test input 1  
I
DIDP0PES test input 2  
I/O  
I/O  
I/O  
I/O  
I/O  
O
H
H
H
H
H
H
H
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES bidirectional 80C51 port pin  
ISQ2CPES program store enable (80C51); active LOW  
ISQ4CPES address latch enable (80C51)  
ISF2DPES external access enable (80C51); active LOW  
ALE  
O
EA  
I
VSS5  
VDD5V_3  
P0.7  
supply  
supply  
negative supply voltage 5  
positive supply voltage 3 for the +5 V interface  
I/O  
off  
H
ISP2DPES bidirectional 80C51 port pin  
ISQ2CPES (ISQ2CPES in PCD5090/xxx, PCA5097/xxx)  
P0.6  
P0.5  
P0.4  
P0.3  
P0.2  
P0.1  
P0.0  
92  
93  
94  
95  
96  
97  
98  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
off  
H
ISP2DPES bidirectional 80C51 port pin  
ISQ2CPES (ISQ2CPES in PCD5090/xxx, PCA5097/xxx)  
off  
H
ISP2DPES bidirectional 80C51 port pin  
ISQ2CPES (ISQ2CPES in PCD5090/xxx, PCA5097/xxx)  
off  
H
ISP2DPES bidirectional 80C51 port pin  
ISQ2CPES (ISQ2CPES in PCD5090/xxx, PCA5097/xxx)  
off  
H
ISP2DPES bidirectional 80C51 port pin  
ISQ2CPES (ISQ2CPES in PCD5090/xxx, PCA5097/xxx)  
off  
H
ISP2DPES bidirectional 80C51 port pin  
ISQ2CPES (ISQ2CPES in PCD5090/xxx, PCA5097/xxx)  
off  
H
ISP2DPES bidirectional 80C51 port pin  
ISQ2CPES (ISQ2CPES in PCD5090/xxx, PCA5097/xxx)  
off  
H
ISP2DPES bidirectional 80C51 port pin  
ISQ2CPES (ISQ2CPES in PCD5090/xxx, PCA5097/xxx)  
M_RESET  
99  
I
DIDP0PES master reset input (Schmitt trigger)  
ISF2DPES reset output  
RESET_OUT  
100  
O
H
1997 Nov 19  
8
Philips Semiconductors  
Objective specification  
DECT baseband controller  
PCD5095  
conversion of three ADPCM channels based on linear  
PCM format, the second mode copies four ADPCM  
samples, without data processing, into two IOM -2 data  
buffers and vice versa. In both modes the DSP controls  
the bidirectional data flow from the radio interface and the  
IOM -2 interface. The 80C51 controls the DECT protocol  
and the IOM -2 interface.  
6
FUNCTIONAL DESCRIPTION  
The PCD509x is a family of single-chip controllers,  
designed for use in Digital Enhanced Cordless  
Telecommunications systems (DECT). The family is  
designed for minimum component-count and minimum  
power consumption. All controllers include an embedded  
80C51 microcontroller with on-chip memory and I2C-bus  
interface. The Philips DECT RF interface is implemented.  
The Burst Mode Logic (BML) performs the time-critical  
MAC layer functions for applications in DECT handsets  
and base stations. The ADPCM transcoding is in  
compliance with the CCITT recommendation G.721 and  
includes receive and transmit filters.  
The data flow between radio, DSP and IOM -2 is  
described in the “PCD5095 DSP user manual”. Basically  
the System Data RAM (SDR), the shared memory with  
inbound and outbound speech buffers, is the interface to  
the DSP and to the radio. Depending on the selected  
mode the DSP processes the data stored in the SDR. The  
speech buffers are 40 bytes long and each buffer can  
hold 80 ADPCM-coded speech samples.  
The PCD5095 is designed for business systems, PABX  
and WLL. Two modes can be selected: bidirectional  
DECT CORDLESS PABX  
IOM-2  
INTERFACE  
HANDSET  
RF  
RF PCD5095  
PABX  
(PCD5091)  
MGL189  
HANDSET  
RF  
(PCD5091)  
Fig.3 PCD5095 for PABX.  
1997 Nov 19  
9
Philips Semiconductors  
Objective specification  
DECT baseband controller  
PCD5095  
7
PACKAGE OUTLINE  
QFP100: plastic quad flat package; 100 leads (lead length 1.95 mm); body 14 x 20 x 2.8 mm  
SOT317-2  
y
X
A
80  
51  
81  
50  
Z
E
e
A
2
H
A
E
E
(A )  
3
A
1
θ
w M  
p
pin 1 index  
L
p
b
L
31  
100  
detail X  
1
30  
w M  
Z
v
M
D
A
b
p
e
D
B
H
v
M
B
D
0
5
scale  
10 mm  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.  
7o  
0o  
0.25 2.90  
0.05 2.65  
0.40 0.25 20.1 14.1  
0.25 0.14 19.9 13.9  
24.2 18.2  
23.6 17.6  
1.0  
0.6  
0.8  
0.4  
1.0  
0.6  
mm  
3.20  
0.25  
0.65  
1.95  
0.2 0.15 0.1  
Note  
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
95-02-04  
97-08-01  
SOT317-2  
1997 Nov 19  
10  
Philips Semiconductors  
Objective specification  
DECT baseband controller  
PCD5095  
8
SOLDERING  
Introduction  
8.3  
Wave soldering  
Wave soldering is not recommended for QFP packages.  
This is because of the likelihood of solder bridging due to  
closely-spaced leads and the possibility of incomplete  
solder penetration in multi-lead devices.  
8.1  
There is no soldering method that is ideal for all IC  
packages. Wave soldering is often preferred when  
through-hole and surface mounted components are mixed  
on one printed-circuit board. However, wave soldering is  
not always suitable for surface mounted ICs, or for  
printed-circuits with high population densities. In these  
situations reflow soldering is often used.  
CAUTION  
Wave soldering is NOT applicable for all QFP  
packages with a pitch (e) equal or less than 0.5 mm.  
This text gives a very brief insight to a complex technology.  
A more in-depth account of soldering ICs can be found in  
our “IC Package Databook” (order code 9398 652 90011).  
If wave soldering cannot be avoided, for QFP  
packages with a pitch (e) larger than 0.5 mm, the  
following conditions must be observed:  
8.2  
Reflow soldering  
A double-wave (a turbulent wave with high upward  
pressure followed by a smooth laminar wave)  
soldering technique should be used.  
Reflow soldering techniques are suitable for all QFP  
packages.  
The footprint must be at an angle of 45° to the board  
direction and must incorporate solder thieves  
downstream and at the side corners.  
The choice of heating method may be influenced by larger  
plastic QFP packages (44 leads, or more). If infrared or  
vapour phase heating is used and the large packages are  
not absolutely dry (less than 0.1% moisture content by  
weight), vaporization of the small amount of moisture in  
them can cause cracking of the plastic body. For more  
information, refer to the Drypack chapter in our “Quality  
Reference Handbook” (order code 9397 750 00192).  
During placement and before soldering, the package must  
be fixed with a droplet of adhesive. The adhesive can be  
applied by screen printing, pin transfer or syringe  
dispensing. The package can be soldered after the  
adhesive is cured.  
Reflow soldering requires solder paste (a suspension of  
fine solder particles, flux and binding agent) to be applied  
to the printed-circuit board by screen printing, stencilling or  
pressure-syringe dispensing before package placement.  
Maximum permissible solder temperature is 260 °C, and  
maximum duration of package immersion in solder is  
10 seconds, if cooled to less than 150 °C within  
6 seconds. Typical dwell time is 4 seconds at 250 °C.  
Several methods exist for reflowing; for example,  
infrared/convection heating in a conveyor type oven.  
Throughput times (preheating, soldering and cooling) vary  
between 50 and 300 seconds depending on heating  
method. Typical reflow peak temperatures range from  
215 to 250 °C.  
A mildly-activated flux will eliminate the need for removal  
of corrosive residues in most applications.  
8.4  
Repairing soldered joints  
Fix the component by first soldering two diagonally-  
opposite end leads. Use only a low voltage soldering iron  
(less than 24 V) applied to the flat part of the lead. Contact  
time must be limited to 10 seconds at up to 300 °C. When  
using a dedicated tool, all other leads can be soldered in  
one operation within 2 to 5 seconds between  
270 and 320 °C.  
1997 Nov 19  
11  
Philips Semiconductors  
Objective specification  
DECT baseband controller  
PCD5095  
9
DEFINITIONS  
Data sheet status  
Objective specification  
Preliminary specification  
Product specification  
Short-form specification  
This data sheet contains target or goal specifications for product development.  
This data sheet contains preliminary data; supplementary data may be published later.  
This data sheet contains final product specifications.  
The data in this specification is extracted from a full data sheet with the same type  
number and title. For detailed information see the relevant data sheet or data handbook.  
Limiting values  
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or  
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation  
of the device at these or at any other conditions above those given in the Characteristics sections of the specification  
is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
10 LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices, or systems where malfunction of these  
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for  
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such  
improper use or sale.  
11 PURCHASE OF PHILIPS I2C COMPONENTS  
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the  
components in the I2C system provided the system conforms to the I2C specification defined by  
Philips. This specification can be ordered using the code 9398 393 40011.  
1997 Nov 19  
12  
Philips Semiconductors  
Objective specification  
DECT baseband controller  
PCD5095  
NOTES  
1997 Nov 19  
13  
Philips Semiconductors  
Objective specification  
DECT baseband controller  
PCD5095  
NOTES  
1997 Nov 19  
14  
Philips Semiconductors  
Objective specification  
DECT baseband controller  
PCD5095  
NOTES  
1997 Nov 19  
15  
Philips Semiconductors – a worldwide company  
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For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,  
Internet: http://www.semiconductors.philips.com  
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825  
© Philips Electronics N.V. 1996  
SCA52  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
437027/1200/01/pp16  
Date of release: 1997 Nov 19  
Document order number: 9397 750 02387  
配单直通车
PCD5095H产品参数
型号:PCD5095H
生命周期:Obsolete
IHS 制造商:NXP SEMICONDUCTORS
包装说明:QFP, QFP100,.7X.9
Reach Compliance Code:compliant
HTS代码:8542.39.00.01
风险等级:5.84
Is Samacsys:N
JESD-30 代码:R-PQFP-G100
长度:20 mm
功能数量:1
端子数量:100
封装主体材料:PLASTIC/EPOXY
封装代码:QFP
封装等效代码:QFP100,.7X.9
封装形状:RECTANGULAR
封装形式:FLATPACK
电源:3/3.3,5 V
认证状态:Not Qualified
座面最大高度:3.2 mm
子类别:Other Telecom ICs
标称供电电压:3 V
表面贴装:YES
技术:CMOS
电信集成电路类型:CORDLESS TELEPHONE BASEBAND CIRCUIT
端子形式:GULL WING
端子节距:0.65 mm
端子位置:QUAD
宽度:14 mm
Base Number Matches:1
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