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  • PCM69AP图
  • 深圳市宏世佳电子科技有限公司

     该会员已使用本站13年以上
  • PCM69AP 现货库存
  • 数量3783 
  • 厂家BB 
  • 封装DIP 
  • 批号2023+ 
  • 全新原厂原装产品、公司现货销售
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  • PCM69AU图
  • 深圳市富科达科技有限公司

     该会员已使用本站13年以上
  • PCM69AU 现货库存
  • 数量21688 
  • 厂家BB量大发货 
  • 封装SOP20 
  • 批号2020+ 
  • 全新进口原装
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  • PCM69AP-K图
  • 深圳市凯信扬科技有限公司

     该会员已使用本站7年以上
  • PCM69AP-K
  • 数量69680 
  • 厂家BURR-BROWN 
  • 封装DIP16 
  • 批号21+ 
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  • PCM69AU图
  • 深圳市羿芯诚电子有限公司

     该会员已使用本站7年以上
  • PCM69AU
  • 数量8800 
  • 厂家BURR-BROWN 
  • 封装SOP20 
  • 批号新年份 
  • 羿芯诚只做原装,原厂渠道,价格优势可谈!
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  • 0755-82570683 QQ:2853992132
  • PCM69AU/2K图
  • 深圳市芯福林电子有限公司

     该会员已使用本站15年以上
  • PCM69AU/2K
  • 数量85000 
  • 厂家TI/德州仪器 
  • 封装SSOP20 
  • 批号23+ 
  • 真实库存全新原装正品!代理此型号
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  • 0755-23605827 QQ:2881495753
  • PCM69AU/2K图
  • 深圳市芯福林电子有限公司

     该会员已使用本站15年以上
  • PCM69AU/2K
  • 数量13880 
  • 厂家TI鼎力支持 
  • 封装SSOP20 
  • 批号21+ 
  • 公司只售原装 支持实单
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  • 0755-88917743 QQ:2881495751
  • PCM69AU/2K图
  • 深圳市旺能芯科技有限公司

     该会员已使用本站4年以上
  • PCM69AU/2K
  • 数量15000 
  • 厂家TI/德州仪器 
  • 封装SSOP20 
  • 批号22+ 
  • 深圳全新原装库存现货
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  • 13602549709 QQ:2881495751
  • PCM69AU图
  • 深圳市恒达亿科技有限公司

     该会员已使用本站16年以上
  • PCM69AU
  • 数量3500 
  • 厂家BB 
  • 封装SOP 
  • 批号25+ 
  • 全新原装现货特价销售!
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  • PCM69AU图
  • 深圳市恒达亿科技有限公司

     该会员已使用本站12年以上
  • PCM69AU
  • 数量3200 
  • 厂家BB 
  • 封装SOP 
  • 批号25+ 
  • 全新原装公司现货库存!
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  • PCM69AP图
  • 深圳市赛尔通科技有限公司

     该会员已使用本站12年以上
  • PCM69AP
  • 数量12850 
  • 厂家BB 
  • 封装DIP 
  • 批号NEW 
  • 绝对进口原装现货,市场价格最低!!
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  • 86-0755-83536093 QQ:1134344845QQ:847984313
  • PCM69AU图
  • 深圳市欧立现代科技有限公司

     该会员已使用本站12年以上
  • PCM69AU
  • 数量500 
  • 厂家 
  • 封装SOP 
  • 批号24+ 
  • ★★专业IC现货,诚信经营,市场最优价★★
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  • 0755-83222787 QQ:1950791264QQ:2216987084
  • PCM69AP图
  • 深圳市得捷芯城科技有限公司

     该会员已使用本站11年以上
  • PCM69AP
  • 数量118 
  • 厂家BURR-BROWN 
  • 封装NA/ 
  • 批号23+ 
  • 优势代理渠道,原装正品,可全系列订货开增值税票
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  • 0755-82546830 QQ:3007977934QQ:3007947087
  • PCM69AP图
  • 深圳市晶美隆科技有限公司

     该会员已使用本站15年以上
  • PCM69AP
  • 数量69800 
  • 厂家BB 
  • 封装DIP 
  • 批号24+ 
  • 假一罚十,原装进口正品现货供应,价格优势。
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  • 0755-82865294 QQ:198857245
  • PCM69AP图
  • 集好芯城

     该会员已使用本站13年以上
  • PCM69AP
  • 数量19689 
  • 厂家BB 
  • 封装DIP16 
  • 批号最新批次 
  • 原装原厂 现货现卖
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  • 0755-83239307 QQ:3008092965QQ:3008092965
  • PCM69P图
  • 北京罗彻斯特电子科技有限公司

     该会员已使用本站18年以上
  • PCM69P
  • 数量300 
  • 厂家BB 
  • 封装DIP 
  • 批号2001 
  • ★原装现货,微波军工停产芯片优势,可出售样品研发选型BOM配单服务
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  • 13261827936军工芯片优势 QQ:674627925QQ:372787046
  • PCM69AU图
  • 深圳市浩兴林电子有限公司

     该会员已使用本站16年以上
  • PCM69AU
  • 数量5000 
  • 厂家PCM 
  • 封装SMD 
  • 批号2017+ 
  • 优势库存现货,部分无铅
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    QQ:351622092QQ:351622092 复制
  • 0755-82532799 QQ:382716594QQ:351622092
  • PCM69AP图
  • 深圳市卓越微芯电子有限公司

     该会员已使用本站12年以上
  • PCM69AP
  • 数量6500 
  • 厂家BB 
  • 封装DIP 
  • 批号20+ 
  • 百分百原装正品 真实公司现货库存 本公司只做原装 可开13%增值税发票,支持样品,欢迎来电咨询!
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  • 0755-82343089 QQ:1437347957QQ:1205045963
  • PCM69AP图
  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
  • PCM69AP
  • 数量29530 
  • 厂家BB 
  • 封装DIP16 
  • 批号2023+ 
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  • 0755-83777708“进口原装正品专供” QQ:364510898QQ:515102657
  • PCM69BU1/2K图
  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
  • PCM69BU1/2K
  • 数量32670 
  • 厂家BURRBROWN 
  • 封装New 
  • 批号2023+ 
  • 绝对原装正品现货,全新深圳原装进口现货
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  • 美驻深办0755-83777708“进口原装正品专供” QQ:1002316308QQ:515102657
  • PCM69AP-KG4图
  • 北京首天国际有限公司

     该会员已使用本站16年以上
  • PCM69AP-KG4
  • 数量3500 
  • 厂家TI 
  • 封装 
  • 批号2024+ 
  • 百分百原装正品,现货库存
  • QQ:528164397QQ:528164397 复制
    QQ:1318502189QQ:1318502189 复制
  • 010-62565447 QQ:528164397QQ:1318502189
  • PCM69AU-K/2K图
  • 北京首天国际有限公司

     该会员已使用本站16年以上
  • PCM69AU-K/2K
  • 数量
  • 厂家TI 
  • 封装20-SOIC 
  • 批号2024+ 
  • 百分百原装正品,现货库存
  • QQ:528164397QQ:528164397 复制
    QQ:1318502189QQ:1318502189 复制
  • 010-62565447 QQ:528164397QQ:1318502189
  • PCM69AU-J-T2图
  • 北京齐天芯科技有限公司

     该会员已使用本站15年以上
  • PCM69AU-J-T2
  • 数量6000 
  • 厂家BB 
  • 封装SO20L 
  • 批号2024+ 
  • 原装正品,假一罚十
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    QQ:1344056792QQ:1344056792 复制
  • 010-62104931 QQ:2880824479QQ:1344056792
  • PCM69AP图
  • 北京元坤伟业科技有限公司

     该会员已使用本站17年以上
  • PCM69AP
  • 数量5000 
  • 厂家BB 
  • 封装DIP 
  • 批号2024+ 
  • 百分百原装正品,现货库存
  • QQ:857273081QQ:857273081 复制
    QQ:1594462451QQ:1594462451 复制
  • 010-62104931 QQ:857273081QQ:1594462451
  • PCM69AP图
  • 深圳市晶美隆科技有限公司

     该会员已使用本站14年以上
  • PCM69AP
  • 数量15735 
  • 厂家TI 
  • 封装16-DIP 
  • 批号23+ 
  • 全新原装正品现货热卖
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    QQ:2885348317QQ:2885348317 复制
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  • PCM69AU-1图
  • 深圳市正信鑫科技有限公司

     该会员已使用本站12年以上
  • PCM69AU-1
  • 数量6432 
  • 厂家TI 
  • 封装原厂封装 
  • 批号22+ 
  • 原装正品★真实库存★价格优势★欢迎来电洽谈
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  • 0755-22655674 QQ:1686616797QQ:2440138151
  • PCM69AU图
  • 深圳市毅创腾电子科技有限公司

     该会员已使用本站16年以上
  • PCM69AU
  • 数量385 
  • 厂家BB 
  • 封装SOP20 
  • 批号22+ 
  • ★只做原装★正品现货★原盒原标★
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  • 86-0755-83210909 QQ:2355507165QQ:2355507162
  • PCM69AP图
  • 深圳市恒意法科技有限公司

     该会员已使用本站17年以上
  • PCM69AP
  • 数量28418 
  • 厂家Texas Instruments 
  • 封装16-DIP(0.300,7.62mm) 
  • 批号21+ 
  • 正规渠道/品质保证/原装正品现货
  • QQ:2881514372QQ:2881514372 复制
  • 0755-83247729 QQ:2881514372
  • PCM69AU图
  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
  • PCM69AU
  • 数量13050 
  • 厂家BB 
  • 封装SOP20L 
  • 批号2023+ 
  • 绝对原装正品现货/优势渠道商、原盘原包原盒
  • QQ:1002316308QQ:1002316308 复制
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  • 深圳分公司0755-83777708“进口原装正品专供” QQ:1002316308QQ:515102657
  • PCM69AP-3图
  • 深圳市惊羽科技有限公司

     该会员已使用本站11年以上
  • PCM69AP-3
  • 数量2368 
  • 厂家TI-德州仪器 
  • 封装设备接口IC 
  • 批号▉▉:2年内 
  • ▉▉¥263元一有问必回一有长期订货一备货HK仓库
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  • PCM69AP图
  • 深圳市晶美隆科技有限公司

     该会员已使用本站14年以上
  • PCM69AP
  • 数量13815 
  • 厂家BB 
  • 封装DIP/16 
  • 批号23+ 
  • 全新原装正品现货热卖
  • QQ:2885348317QQ:2885348317 复制
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  • 0755-83209630 QQ:2885348317QQ:2885348339
  • PCM69AP图
  • 上海熠富电子科技有限公司

     该会员已使用本站15年以上
  • PCM69AP
  • 数量7710 
  • 厂家 
  • 封装N/A 
  • 批号2024 
  • 上海原装现货库存,欢迎查询!
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  • 15821228847 QQ:2719079875QQ:2300949663
  • PCM69AU图
  • 上海熠富电子科技有限公司

     该会员已使用本站15年以上
  • PCM69AU
  • 数量7052 
  • 厂家BB 
  • 封装N/A 
  • 批号2024 
  • 上海原装现货库存,欢迎查询!
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    QQ:2300949663QQ:2300949663 复制
  • 15821228847 QQ:2719079875QQ:2300949663
  • PCM69AU/2K图
  • 深圳市华来深电子有限公司

     该会员已使用本站13年以上
  • PCM69AU/2K
  • 数量8560 
  • 厂家TI 
  • 封装SSOP20 
  • 批号17+ 
  • 受权代理!全新原装现货特价热卖!
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  • PCM69AP图
  • 深圳市宇集芯电子有限公司

     该会员已使用本站6年以上
  • PCM69AP
  • 数量99000 
  • 厂家BB 
  • 封装DIP-16 
  • 批号23+ 
  • 一级代理进口原装现货、假一罚十价格合理
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  • PCM69AP图
  • 深圳市硅诺电子科技有限公司

     该会员已使用本站8年以上
  • PCM69AP
  • 数量41537 
  • 厂家BBKOREA 
  • 封装DIP16 
  • 批号17+ 
  • 原厂指定分销商,有意请来电或QQ洽谈
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    QQ:916896414QQ:916896414 复制
  • 0755-82772151 QQ:1091796029QQ:916896414
  • PCM69AU图
  • 北京顺科电子科技有限公司

     该会员已使用本站8年以上
  • PCM69AU
  • 数量5500 
  • 厂家BB/TI 
  • 封装SOP 
  • 批号21+ 
  • 进口品牌//国产品牌代理商18911556207
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  • 18911556207 QQ:729566152QQ:1138731127

产品型号PCM69的Datasheet PDF文件预览

®
PCM67P/U  
PCM69AP/AU  
Advanced 1-Bit BiCMOS Dual 18-Bit  
DIGITAL-TO-ANALOG CONVERTER  
FEATURES  
DESCRIPTION  
18-BIT RESOLUTION DUAL AUDIO DAC  
The PCM67 and PCM69A dual 18-bit DAC are low  
cost, dualoutput18-bitBiCMOSdigital-to-analogcon-  
verters utilizing a novel architecture to achieve excel-  
lent low level performance.  
EXCELLENT THD PERFORMANCE:  
0.0025% (–92dB) at F/S, K Grade  
1.0% (–40dB) at –60dB, K Grade  
By combining a conventional thin-film R-2R ladder  
DAC, a digital offset technique with analog correction  
and an advanced one-bit DAC using first order noise  
shaping technique, the PCM67 and PCM69A achieve  
high resolution, minimal glitch, and low zero-crossing  
distortion.  
HIGH S/N RATIO: 110dB typ (IHF-A)  
DUAL, CO-PHASE  
SINGLE SUPPLY +5V OPERATION  
LOW POWER: 75mW typical  
CAPABLE OF 16X OVERSAMPLING  
PCM67 digital offset occurs at bit 9, making it ideal for  
high-performance CD players. PCM69A digital offset  
occurs at bit 4, making it an excellent choice for digital  
musical instruments and audio DSP.  
AVAILABLE IN SPACE SAVING  
16-PIN DIP OR 20-PIN SOIC  
OPERATING TEMP RANGE:  
–25°C to +85°C  
Both PCM67 and PCM69A operate from a single +5V  
supply. Thelowpowerconsumptionandsmallsize(16-  
pin PDIP or 20-pin SOIC) make these converters ideal  
for a variety of digital audio applications.  
EXTREMELY LOW GLITCH ENERGY  
10-Bit DAC plus  
Analog Correction  
Reference  
Servo  
Analog Output Lch  
Advanced 1-Bit  
VCOM  
Lch  
DAC  
Buffer  
Buffer  
VCOM  
Rch  
10-Bit DAC plus  
Analog Correction  
Input  
Digital Signal In  
Analog Output Rch  
Interface  
Advanced 1-Bit  
DAC  
International Airport Industrial Park  
Mailing Address: PO Box 11400  
Cable: BBRCORP  
Tucson, AZ 85734  
Street Address: 6730 S. Tucson Blvd.  
Tucson, AZ 85706  
Tel: (520) 746-1111 Twx: 910-952-1111  
Telex: 066-6491  
FAX: (520) 889-1510  
Immediate Product Info: (800) 548-6132  
© 1992 Burr-Brown Corporation  
PDS-1168A  
Printed in U.S.A. August, 1993  
SBAS024  
SPECIFICATIONS  
ELECTRICAL  
All specifications at +25°C and +VA, +VD = +5V unless otherwise noted  
PCM67/69A  
PARAMETER  
RESOLUTION  
CONDITIONS  
MIN  
TYP  
18  
MAX  
UNITS  
Bits  
DYNAMIC RANGE, THD+N at –60dB Referred to Full Scale  
106  
dB  
DIGITAL INPUT  
Logic Family  
TTL/CMOS Compatible  
Logic Level: VIH  
VIL  
Data Format  
IIH = ±5µA  
IIL = ±5µA  
+2  
0
+VD  
0.8  
V
V
Serial, MSB First, BTC(1)  
16.9344  
Input System Clock Frequency  
MHz  
TOTAL HARMONIC DISTORTION + N(2,3,4)  
PCM67P/69AP, PCM67U/69AU  
f = 991Hz (0dB)  
f = 991Hz (–20dB)  
f = 991Hz (–60dB)  
fS = 352.8kHz  
fS = 352.8kHz  
fS = 352.8kHz  
–86  
–68  
–40  
–82  
–34  
dB  
dB  
dB  
PCM67P-J/69AP-J, PCM67U-J/69AU-J  
f = 991Hz (0dB)  
f = 991Hz (–20dB)  
fS = 352.8kHz  
fS = 352.8kHz  
fS = 352.8kHz  
–91  
–72  
–46  
–88  
–40  
dB  
dB  
dB  
f = 991Hz (–60dB)  
PCM67P-K/69AP-K, PCM67U-K/69AU-K  
f = 991Hz (0dB)  
f = 991Hz (–20dB)  
fS = 352.8kHz  
fS = 352.8kHz  
fS = 352.8kHz  
–95  
–74  
–46  
–92  
–40  
dB  
dB  
dB  
f = 991Hz (–60dB)  
CHANNEL SEPARATION  
(f = 1kHz)  
106  
dB  
ACCURACY  
Level Linearity  
Gain Error  
Gain Mismatch, Channel-to-Channel  
Gain Drift  
Warm-up Time  
at –90dB Signal Level  
±1  
±3  
±1  
95  
1
dB  
%
%
ppm/°C  
Minute  
±10  
±5  
0°C to +70°C  
IDLE CHANNEL SNR(5)  
20Hz to 40kHz at BPZ(6)  
110  
dB  
ANALOG OUTPUT  
Output Range (±3%)  
Output Impedance (±30%)  
VCOM  
1.2  
1.8  
3.50  
mA  
kΩ  
V
3.35  
3.65  
Glitch Energy  
No Glitch Around Zero  
POWER SUPPLY REQUIREMENTS, System Clock = 16.9344MHz  
+VA, +VD Supply Voltage Range  
+IA, +ID Combined Supply Current  
Power Dissipation  
+VA = +VD  
+VA, +VD = +5V  
+VA, +VD = +5V  
+4.75  
+5.00  
15  
75  
+5.25  
20  
105  
V
mA  
mW  
TEMPERATURE RANGE  
Operating  
Storage  
–25  
–55  
+85  
+100  
°C  
°C  
NOTES: (1) Binary Two’s Complement coding. (2) Ratio of (DistortionRMS + NoiseRMS)/SignalRMS. (3) D/A converter output frequency/signal level (both left and right  
channels are “on”). (4) D/A converter sample frequency (8 x 44.1kHz; 8X oversampling per channel). (5) Ratio of NoiseRMS/SignalRMS. Measured using a 40kHz  
3rd-order GIC (Generalized Immittance Converter) filter and an A-weighted filter. (6) Bipolar Zero.  
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes  
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change  
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant  
any BURR-BROWN product for use in life support devices and/or systems.  
®
PCM67/69A  
2
PIN ASSIGNMENTS  
ABSOLUTE MAXIMUM RATINGS  
PCM67P  
PCM67U  
+VA, +VD to ACOM, DCOM ................................................... 0V to +6.5V  
ACOM to DCOM............................................................................... ±0.5V  
Digital Inputs to DCOM ............................................ –0.3V to +VD + 0.3V  
Power Dissipation ................ 300mW (U Package), 500mW (P Package)  
Lead Temperature, (soldering, 10s) .............................................. +260°C  
Max Junction Temperature ............................................................ +165°C  
PCM69AP PCM69AU DESCRIPTION  
MNEMONIC  
1
2
1
2
3
4
5
+5V Analog Supply Voltage  
Left Voltage Common  
No Connection  
Left Current Output (0 to 1.2mA)  
Servo Decoupling Capacitor  
Reference Decoupling Capacitor  
+VA  
LVCOM  
NC  
LIOUT  
SRVCAP  
REFCAP  
3
4
5
6
NOTE: Stresses above those listed under “Absolute Maximum Ratings”  
may cause permanent damage to the device. Exposure to absolute  
maximum conditions for extended periods may affect device reliability.  
6
7
Right Current Output (0 to 1.2mA) RIOUT  
8
9
No Connection  
Right Voltage Common  
Analog Common  
Digital Common  
Mode Control 2  
Right Data Input  
Bit Clock  
System Clock  
Word Clock  
Left Data Input  
Mode Control 3  
Mode Control 1  
+5V Digital Supply Voltage  
NC  
7
8
9
RVCOM  
ACOM  
DCOM  
MC2  
RDATA  
BTCK  
SYSCK  
WDCK  
LDATA  
MC3  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
ELECTROSTATIC  
10  
11  
12  
13  
14  
DISCHARGE SENSITIVITY  
Electrostatic discharge can cause damage ranging from per-  
formancedegradationtocompletedevicefailure.Burr-Brown  
Corporationrecommendsthatallintegratedcircuitsbehandled  
and stored using appropriate ESD protection methods.  
15  
16  
MC1  
+VD  
PACKAGE INFORMATION  
PACKAGE DRAWING  
NUMBER(1)  
MODEL  
PACKAGE  
PCM67P/69AP  
PCM67U/69AU  
16-Pin Plastic DIP  
20-Pin SOIC  
180  
248  
NOTE: (1) For detailed drawing and dimension table, please see end of data  
sheet, or Appendix D of Burr-Brown IC Data Book.  
®
3
PCM67/69A  
PIN CONFIGURATION — PCM67P/69AP (16-Pin DIP)  
Data-L  
WDCK  
SYS CLOCK  
BCK  
Data-R  
1µF  
16  
15  
14  
13  
12  
11  
10  
9
PCM67P/69AP  
1
2
3
4
5
6
7
8
+VCC  
(+5V)  
10µF  
3.3µF  
3.3µF  
RNF  
RNF  
10µF  
Lch  
OUT  
10µF  
Rch  
OUT  
PIN CONFIGURATION — PCM67U/69AU (20-Pin SOIC)  
Data-L  
WDCK  
SYS CLOCK  
BCK  
Data-R  
1µF  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
PCM67U/69AU  
1
2
3
4
5
6
7
8
9
10  
+VCC  
(+5V)  
10µF  
3.3µF  
3.3µF  
RNF  
RNF  
10µF  
10µF  
Lch  
Rch  
OUT  
OUT  
®
PCM67/69A  
4
TYPICAL PERFORMANCE CURVES  
All specifications at +25°C and VCC = +5.0V unless otherwise noted.  
THD vs POWER SUPPLY VOLTAGE  
GAIN ERROR / VCOM vs POWER SUPPLY  
0.01%  
1.0%  
0.5%  
3
2
3.70  
3.60  
3.50  
3.40  
–60dB  
F/S  
0.005%  
1
Gain Error  
0
–1  
–2  
–3  
0.002%  
0.001%  
0.2%  
0.1%  
VCOM  
4.75  
5.0  
CC (V)  
5.25  
4.75  
5.0  
5.25  
V
V
CC (V)  
GAIN ERROR / VCOM vs TEMPERATURE  
THD vs TEMPERATURE  
–60dB  
3
2
3.70  
3.60  
3.50  
3.40  
0.01%  
1.0%  
0.5%  
0.005%  
1
F/S  
0
–1  
–2  
–3  
0.002%  
0.001%  
0.2%  
0.1%  
–25  
0
25  
50  
75 85  
100  
–25  
0
25  
50  
85  
100  
Temperature (%)  
Temperature (°C)  
THD vs SYSTEM CLOCK FREQUENCY  
CHANNEL SEPARATION vs SIGNAL FREQUENCY  
0.01%  
1.0%  
0.5%  
115  
110  
105  
100  
95  
fs = 44.1kHz  
–60dB  
0.005%  
F/S  
0.002%  
0.001%  
0.2%  
0.1%  
100  
500  
1k  
2k 4k 8k 16k … 128k  
384  
192  
96  
48  
f (Hz)  
fs (Hz)  
®
5
PCM67/69A  
DISCUSSION OF  
SPECIFICATIONS  
VOUT = 1.2mA • RNF  
The PCM67 and PCM69A are specified to provide critical  
performance criteria for a variety of applications. The accu-  
racy of a D/A converter is described by the transfer function  
shown in Figure 1.  
VOUT  
VCOM  
RNF  
1.2mA  
IOUT  
Digital In  
+FSR  
VOUT  
011...11  
VCOM  
Gain Error  
(3.5V)  
FIGURE 2. I/V Amplifier Circuit.  
000...00  
S/N RATIO  
Analog  
Out  
111...11  
S/Nratioisdefinedastheratiooffullscaleoutputandnoinput  
noise level at BPZ point. The PCM67/69A is specified at  
110dB typical with “IHF-A” filter.  
BPZ  
BPZ – 1LSB  
100...00  
–FSR  
LEVEL LINEARITY ERROR  
(VCOM = 3.5V)  
Level linearity error is defined as the deviation of actual  
analog output level from digital input level. PCM67/69A is  
specified at 1dB typical at –90dB output level. The 0.5LSB  
quantization error at –90dB of 16-bit conversion is equal to  
+1.94dB, –2.5dB.  
FIGURE 1. Transfer Performance.  
DIGITAL INPUT CODE  
The PCM67/69A accepts Binary Two’s Complement (BTC)  
digital input code (MSB FIRST).The relationship of digital  
input to analog output is shown in Table 1.  
TOTAL HARMONIC DISTORTION  
THD is a key parameter in audio applications, THD is a  
measure of the magnitude and distribution of the linearity  
error, differential linearity error, and noise, as well as quanti-  
zation error. To be useful, THD should be specified for both  
highlevelandlowlevelinputsignals.Thiserrorisunadjustable  
and is the most meaningful indicator of D/A converter accu-  
racy for audio applications.  
ANALOG OUTPUT  
(VOLTAGE)  
ANALOG OUTPUT  
(CURRENT)  
DIGITAL INPUT  
7FFFFF (HEX)  
00003F (HEX)  
FFFFFF (HEX)  
80003F (HEX)  
+FSR  
BPZ  
BPZ – 1LSB  
–FSR  
–1.2mA  
–0.6mA  
–0.59995mA  
0mA  
THD is defined as the ratio of the square root of the sum of the  
squares of the values of the harmonics to the value of the  
fundamental input frequency and is expressed in percent or  
dB. The rms value of the PCM67/69A error referred to the  
input can be shown to be  
TABLE I. Digital Code and Analog Out.  
GAIN ERROR AND GAIN MISMATCH,  
CHANNEL-TO-CHANNEL  
Gain error is defined as deviation of the output current span  
from the ideal span of 1.2mA (FSR) on each channel. Gain  
error of PCM67/69A is typically ±3% of FSR.  
n
2
1
n
(1)  
ε rms  
=
EL (i) + EQ(i)  
i = 1  
Gain mismatch, channel-to-channel is defined as the differ-  
ence in gain error between the left channel and right channel.  
where n is the number of samples in one cycle of any given  
sine wave, EL(i) is the linearity error of the PCM67 or  
PCM69A at each sampling point. THD can then be expressed  
as  
THE RELATIONSHIP OF VCOM AND I/V OUT  
The output current range of PCM67 and PCM69A is 0mA to  
1.2mA as shown in Table 1.  
n
2
In the typical application, the non-inverting input of the  
external I/V op amp is connected to the VCOM pin of PCM67  
and PCM69A. Accordingly, the output voltage level at FSR  
after I/V conversion is VCOM voltage (+3.5V) as shown in  
Figure 2.  
1
n
EL (i) + EQ (i)  
εrms  
i =1  
THD =  
=
× 100%  
E
Erms  
rms  
(2)  
where Erms is the rms signal-voltage level.  
®
PCM67/69A  
6
Thisexpressionindicatesthat,ingeneral,thereisacorrelation  
betweentheTHDandthesquarerootofthesumofthesquares  
of the linearity errors at each digital word of interest. How-  
ever, this expression does not mean that the worst-case linear-  
ity error of the D/A is directly correlated to THD.  
The PCM67/69A accepts TTL compatible logic input levels.  
The data format of the PCM67/69A is BTC with the most  
significant bit (MSB) being first in the serial input bit stream.  
tSL tSH  
For PCM67 and PCM69A the test period is set at an 8X  
oversampling rate (352.8kHz = 44.1kHz 8), which is the  
typical sample rate for CD player applications.  
SYS Clock  
tDH  
The test signal frequency is 991Hz and the amplitude of the  
signal level is F/S (0dB), and –60dB down from F/S.  
Data  
LSB  
tDSU tDHO  
All THD tests are performed without a deglitcher circuit and  
without a 20kHz low pass filter.  
Bit Clock  
tCH  
tCL  
tCW  
tWC  
SYSTEM CLOCK REQUIREMENTS  
WD Clock  
The PCM67 and PCM69A need a system clock for the one-bit  
noise shaping DAC operation.  
tWH  
tWL  
The PCM67 is capable of only a 384Fs corollary system clock  
frequency such as 192Fs, 96Fs (24 times word rate or integer  
multiple of 24).  
tSH  
tSL  
tDW  
tDSU  
tDHO  
tCH  
:
:
:
:
:
:
:
:
:
:
:
SYS Clock High Pulse Width : 15ns, min  
SYS Clock Low Pulse Width : 15ns, min  
Data Valid Time : 20ns, min  
Data Setup Time : 10ns, min  
Data Hold Time : 5ns, min  
Bit Clock High Pulse Width : 15ns, min  
Bit Clock Low Pulse Width : 15ns, min  
WD Clock Fall Time From Bit Clock Rise : 10ns, min  
Bit Clock Rise Time From WD Clock Fall : 15ns, min  
WD Clock High Pulse Width : 1 SYS Clock Cycle, min  
WD Clock Low Pulse Width : 1 SYS Clock Cycle, min  
The PCM69A is capable of any system clock up from 48Fs to  
384Fs such as 384Fs, 256Fs, 100Fs with condition for timing  
as described in “Timing of PCM69A” in Figure 5.  
The user can choose either model for their application.  
Table II shows the different SYSCLK options.  
tCL  
tCW  
tWC  
tWH  
tWL  
OTHER CAPABLE  
MODEL  
PCM67  
BASIC SYSCLK  
SYSCLK  
FIGURE 4. Timing Specification.  
384Fs  
192Fs, 96Fs  
PCM69A  
Any Clock (with timing condition)  
Examples: 384Fs, 300Fs, 256Fs, 200Fs, 90Fs  
TIMING OF PCM69A  
PCM69A timing is similar to PCM67 except that PCM69A is  
capable of operating from any system clock up to 384Fs. For  
synchronized operation, PCM69A system clock and WDCK  
timing must be as shown in Figure 5.  
TABLE II. System Clock Requirements.  
LOGIC TIMING  
The serial data bit transfers are triggered on positive bit clock  
(BCK) edges. The serial-to-parallel data transfer to the DAC  
occurs on the falling edge of Word Clock (WDCK). The  
change in the output of the DAC coincides with the falling  
edge of WDCK.  
WDCK  
tn1  
SYSCLK  
Refer to Figure 3 for graphical relationships of these signals.  
The setup and hold timing relationships for these signals are  
shown in Figure 4.  
tn2  
SYSCLK  
tn1: WDCK Fall Delay From Rise of SYSCLK : min 10ns  
tn2: SYSCLK Rise Delay From Fall of WDCK : min 20ns  
MSB bit2  
MSB bit2  
bit17 LSB MSB bit2  
bit17 LSB MSB bit2  
bit17 LSB  
bit17 LSB  
R-ch Data  
L-ch Data  
FIGURE 5. Timing of PCM69A for SYSCLK and WDCK.  
Bit Clock  
WD Clock  
SYS Clock  
1 WDCK  
FIGURE 3. Timing Diagram.  
®
7
PCM67/69A  
SHIFT OF I/V OUT VOLTAGE  
INSTALLATION  
POWER SUPPLIES  
If the user requires a bipolar voltage output centered around  
0V or one-half of VCC, the output can be shifted by adding an  
offset current on the inverting point of the I/V op amp as  
shown in Figure 6.  
Refer to “Pin Configuration” diagram for proper connection  
of the PCM67/69A. The PCM67/69A requires only a +5V  
supply. Both analog and digital supplies should be tied to-  
getheratasinglepoint, asnorealadvantageisgainedbyusing  
separate supplies. It is more important that both these supplies  
be as “clean” as possible to reduce coupling of supply noise to  
the output.  
+VCC  
(+5V)  
R1  
820  
FILTER CAPACITOR REQUIREMENTS  
RNF  
5kΩ  
AsshowninthePinConfigurationdiagram,varioussizesof  
decoupling capacitors can be used with no special tolerances  
required. All capacitors should be as close to the appropriate  
pins of the PCM67/69A as possible to reduce noise pickup  
from surrounding circuitry.  
+
R2  
330Ω  
10µF ~ 100µF  
IOUT  
C1  
VOUT  
VCOM  
+
A power supply decoupling capacitor should be used near the  
analog supply pin to maximize power supply rejection, as  
shown in Figure 6, regardless of how good the supplies are.  
Both commons should be connected to an analog ground  
plane as close to the PCM67/69A as possible.  
10µF ~ 100µF  
C2  
6V  
0V  
Note: R1 and C1 are noise de-coupling circuits from noise  
on +VCC power supply line.  
The value of these capacitors is influenced by actual board  
layout design and noise from power supplies and other digital  
input lines.  
FIGURE 7. Useful Application Circuit for Shift of I/V Out  
Voltage.  
The best suitable value for the capacitors should be deter-  
mined by the user’s actual application board.  
INTERFACE CONTROL FUNCTION  
Both the PCM67 and PCM69A (SOIC package type) are  
capable of 16-bit L/R serial input and 20-bit L/R parallel input  
as shown in Table 3.  
VO  
2
VCC  
VCOM  
+
VO  
VO  
2
or 0V  
VCOM  
(+3.5V)  
VS  
VSHT  
MC1  
MC2 MC3 DATA-R INPUT FORMAT  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
1
1
1
1
1
0
1
0
0
1
0
16-Bit L/R Serial(1)  
16-Bit L/R Serial(1)  
18-Bit L/R Serial(1)  
18-Bit L/R Serial(1)  
20-Bit L/R Parallel  
20-Bit L/R Parallel [WDCK Invert]  
18-Bit L/R Parallel  
18-Bit L/R Parallel [WDCK Invert]  
WDCK  
WDCK  
WDCK  
WDCK  
R L R  
R L R  
L
L
+VCC  
RNF  
L R  
L R  
LR  
LR  
1
ROS  
IOS  
X
X
X
X
IOUT  
VOUT  
VCOM  
(3.5V)  
NOTE: (1) Data input to Data-Lch (Pin 17) for L/R serial format.  
TABLE III. Interface Control Function of SOIC.  
In case of shift to ±3V swing, 0V center  
VOUT  
6V  
1.2mA  
RNF  
=
=
= 5kΩ  
1.2mA  
PCM67P and PCM69AP (DIP package) have only 18-bit  
L/R serial input function as shown in Table 4.  
–FSR±(VS) = –3V after offset addition, shift voltage  
VSHT is given by  
VSHT = VCOM + 3V = 3.5 + 3 = 6.5V  
MC1  
DATA-R  
INPUT FORMAT  
Offset Current IOS is given by  
WDCK  
WDCK  
LR L R  
R L R  
0
0
1
0
1
X
18-Bit L/R Serial  
18-Bit L/R Serial  
18-Bit L/R Parallel  
VSHT  
RNF  
6.5V  
5kΩ  
IOS  
=
=
= 1.3mA  
L
Offset Resistor ROS is given by  
V
CC – VCOM  
TABLE IV. Interface Control Function of DIP.  
5 – 3.5V  
1.3mA  
ROS  
=
=
= 1.15kΩ  
IOS  
FIGURE 6. Shift of I/V Out Voltage.  
®
PCM67/69A  
8
DIGITAL FILTER INTERFACE  
16-Bit L/R Serial — 1  
18-Bit L/R Parallel  
+VDD  
SM5840  
PCM67U/69AU  
11 DGND  
PCM67U/69AU  
11 DGND  
12 MC2  
12 MC2  
DOR  
BCK0  
XTi  
13 Data R-ch  
14 BCK  
CXD2551  
13 Data R-ch  
14 BCK  
BCK0  
X0 or X1  
LRCK0  
15 SYSCLK  
16 WDCK  
17 Data L-ch  
18 MC3  
15 SYSCLK  
16 WDCK  
17 Data L-ch  
18 MC3  
WDCK0  
DOL  
Data L-ch  
4FS, 16-Bit Mode  
19 MC1  
19 MC1  
20 +VDD  
20 +VDD  
18-Bit Mode  
–VDD  
FIGURE 8. Using Sony CXD2551.  
FIGURE 10. Using NPC SM5840.  
16-Bit L/R Serial — 2  
20-Bit L/R Parallel  
SM5807  
PCM67U/69AU  
DF1700  
PCM67U/69AU  
11 DGND  
11 DGND  
12 MC2  
12 MC2  
13 Data R-ch  
14 BCK  
DOR  
BCK0  
XTi  
13 Data R-ch  
14 BCK  
BCK0  
XTi  
15 SYSCLK  
16 WDCK  
17 Data L-ch  
18 MC3  
15 SYSCLK  
16 WDCK  
17 Data L-ch  
18 MC3  
LRC0  
DOUT  
WDCK0  
DOL  
19 MC1  
19 MC1  
20 +VDD  
20 +VDD  
+VDD  
SOMD = H  
20-Bit Mode  
+VDD  
FIGURE 11. Using Burr-Brown DF1700.  
FIGURE 9. Using NPC SM5807.  
®
9
PCM67/69A  
THEORY OF OPERATION  
Digital converters in audio systems have traditionally utilized  
a laser-trimmed, current-source DAC architecture. Unfortu-  
nately, this type of technology suffers from the problems  
inherent in switching widely varying current levels. Design  
improvements have helped, but DACs of this type still exhibit  
low-level nonlinearity due to errors at the major carry.  
weightofbitnisswitchedintocompensate. Thisoffsetcomes  
from a one-bit DAC which has also been trimmed to 18-bit  
linearity.Whilethistechniquedoesn’tremovethemajorcarry  
error completely, the “glitch” is only present in higher ampli-  
tude signals where it is much less audible.  
As for the one-bit DAC, a number of problems with this  
architecture are also reduced: the DAC is designed to operate  
fromthesystemclock, thuseliminatingtheneedforaseparate  
clock; the lower quantizing level of the DAC make it less  
sensitive to clock jitter; and output filtering requirements are  
reduced because “out-of-band noise” has smaller amplitude,  
is “farther-out,” and increases much more slowly due to the  
first-order noise shaper. Still, it is important to keep in mind  
that the one-bit DAC imposes some design considerations.  
Figure 2 shows the THD + N of the converter versus “System  
Clockfrequency. Thisistheclockusedtooperatetheone-bit  
DACandnoiseshaper.Generally,thehighertheoversampling  
thebetter.However,nearfull-scale,theconverterislimitedby  
other constraints and higher clock frequencies (past 96fs) tend  
to slightly worsen its performance. At low levels, perfor-  
mance improves almost linearly with increasing clock fre-  
quency. The one-bit DAC was designed to operate between  
96fs (4X oversampling) and 384fs (16X oversampling). But,  
it can be operated at 48fs (2X oversampling) with slightly  
reduced performance.  
Recently, DACsemployingadifferentarchitecturehavebeen  
introduced. Most of these DACs utilize a one-bit DAC with  
“noise shaping” techniques and very high oversampling rate  
to achieve the digital-to-analog conversion. Basically, the  
trade-off is from very accurate but slow current sources to one  
rapidly sampled current source whose average output in the  
audio frequency range is equal to the current desired. Noise  
shaping insures that the “undesirable” frequencies associated  
with one-bit DAC output lie outside the audio range.  
These “Bitstream”, “MASH”, or one-bit DACs overcome the  
low level linearity problems of conventional DACs, since  
there can be no major carry error. However, this architecture  
exhibits problems of its own: signal-to-noise performance is  
usually worse than a similar conventional DAC, “dither  
noise” may be needed in order to get rid of unwanted tones, a  
separatehigh-speedclockmayberequired, thepartmayshow  
sensitivity to clock jitter, and a high-order low-pass filter is  
necessary to filter the DAC output.  
The PCM67/69A is a cross between these two architectures.  
It includes both a conventional laser-trimmed, current-source  
DAC and an advanced one-bit DAC. The conventional DAC  
isa10-bitDACwhereeachbitweighthasbeentrimmedto18-  
bit linearity. The one-bit DAC has a weight equal to bit 10 and  
employsafirst-ordernoiseshapertogeneratethebitstream.”  
TOTAL HARMONIC DISTORTION + NOISE  
A key specification for audio DACs is usually total harmonic  
distortion plus noise (THD + N). For the PCM67/69A, THD  
+ N is tested in production as shown in Figure 12. Digital data  
words are read into the PCM67/69A at eight times the stan-  
dard compact disk audio sampling frequency of 44.1kHz  
(352.8kHz) so that a sine wave output of 991Hz is realized.  
The output of the DAC goes to an I-to-V converter, then to a  
programmable gain amplifier to provide gain at lower signal  
output test levels, and then through a 40kHz low pass filter  
before being fed into an analog type distortion analyzer.  
This approach does not eliminate all the problems associated  
with the two architectures but rather minimizes them as much  
as possible. The conventional DAC still exhibits some major  
carry error which would normally reduce low-level linearity.  
However, to reduce this error even further, the PCM67/69A  
utilizes an offset technique whereby bit n is subtracted from  
the digital input code whenever it is positive (see Figure 1 and  
Table I). When this is done, an offset current equal to the  
®
PCM67/69A  
10  
Use 400Hz High-Pass  
Filter and 30kHz  
Low-Pass Filter  
Low-Pass  
Filter  
40kHz 3rd-Order  
GIC Type  
Programmable  
Gain Amp  
0dB to 60dB  
Distortion  
Analyzer  
Meter Settings  
(Shiba Soku Model  
725 or Equivalent)  
I-to-V  
Converter  
OPA627  
Binary  
Counter  
Digital Code  
(EPROM)  
Parallel-to-Serial  
Conversion  
DUT  
(PCM67/69A)  
System Clock  
Bit Clock  
Word Clock  
Sampling Rate = 44.1kHz x 8 (352.8kHz)  
Output Frequency = 991Hz  
Timing  
Logic  
FIGURE 12. PCM67/69A THD+N Production Test.  
C10  
1000pF  
R5  
2kΩ  
+5V  
R7  
200Ω  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
10  
9
8
7
6
5
4
3
2
1
A2  
OUT R-ch  
2.5V ± 1.2V  
+
C6  
+
C12  
C8  
C9  
+
2200pF  
100µF  
10µF  
R4  
C5  
C4  
PCM67  
or  
PCM69A  
680Ω  
Digital  
In  
1000pF  
R6  
10µF  
10µF  
R3  
680Ω  
2kΩ  
R8  
200Ω  
A1  
OUT L-ch  
2.5V ± 1.2V  
+
C3  
C7  
+
+
C11  
R2  
100µF  
10µF  
680Ω  
2200pF  
R1  
A1, A2; NJM2100 or LM833  
+
C1  
0.1µF  
680Ω  
VCC  
(+5V)  
+
C2  
100µF  
FIGURE 13. Single +5V Power Supply, with LPF, I/V Amp Application Circuit for Portable Digital Audio.  
®
11  
PCM67/69A  
φ
FIGURE 14. HiFi D/A Converter Unit Application with Digital Audio Interface Format.  
®
PCM67/69A  
12  
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
Customers are responsible for their applications using TI components.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 2000, Texas Instruments Incorporated  
配单直通车
PCM69AP产品参数
型号:PCM69AP
是否Rohs认证: 不符合
生命周期:Obsolete
Reach Compliance Code:unknown
风险等级:5.77
转换器类型:D/A CONVERTER
输入位码:2'S COMPLEMENT BINARY
输入格式:SERIAL
JESD-30 代码:R-PDIP-T16
JESD-609代码:e0
位数:18
功能数量:2
端子数量:16
最高工作温度:85 °C
最低工作温度:-25 °C
封装主体材料:PLASTIC/EPOXY
封装代码:DIP
封装等效代码:DIP16,.3
封装形状:RECTANGULAR
封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V
认证状态:Not Qualified
子类别:Other Converters
标称供电电压:5 V
表面贴装:NO
技术:BICMOS
温度等级:OTHER
端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE
端子节距:2.54 mm
端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1
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