MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21767-V
TRANSFER-MOLD TYPE
INSULATED TYPE
Fig. 7 TYPICAL DIP-IPM APPLICATION CIRCUIT EXAMPLE
C1: Tight tolerance temp-compensated electrolytic type C2,C3: 0.22~2µF R-category ceramic capacitor for noise filtering
V
UFB
UFS
C2
C1
DIP-IPM
V
P
U
HVIC1
V
P1
V
CC
V
B
C3
C3
C3
U
P
IN
HO
COM
VS
C2
C1
V
V
VFB
VFS
HVIC2
V
P1
V
CC
VB
V
P
IN
HO
V
COM
VS
M
C2
C1
V
V
WFB
WFS
HVIC3
V
P1
V
CC
VB
W
P
IN
HO
W
COM
V
S
LVIC
U
OUT
NU
V
U
N1
V
CC
C3
5V line
V
OUT
NV
N
U
N
V
N
V
N
W
OUT
C
W
N
W
N
NW
CIN
Fo
F
o
Too long wiring here might
cause short-circuit.
CFO
V
NC
NO
GND
V
NO
V
CIN
CFO
C4(CFO
)
If this wiring is too long, the SC
level fluctuation might be larger
and cause SC malfunction.
15V line
Shunt resistors
A
N1
R1
C5
B
+
-
Vref
Vref
Vref
Long GND wiring here might
generate noise to input and cause
IGBT malfunction.
R1
C5
B
B
+
-
R1
C5
+
-
OR Logic
Comparator
External protection circuit
Note 1
:
Input drive is High-active type. There is a 2.5kΩ(Min.) pull-down resistor integrated in the IC input circuit. To prevent malfunction, the wiring of each in-
put should be as short as possible. When using RC coupling circuit, make sure the input signal level meet the turn-on and turn-off threshold voltage.
2
3
: Thanks to HVIC inside the module, direct coupling to MCU without any opto-coupler or transformer isolation is possible.
: FO output is open drain type. It should be pulled up to the positive side of a 5V power supply by a resistor of about 10kΩ.
FO output pulse width is determined by the external capacitor (CFO) between CFO and VNC terminals (e.g CFO = 22nF → tFO =
1.8ms (typ.))
4
5
: To prevent erroneous protection, the wiring of A, B should be as short as possible.
: The time constant R1C5 of the protection circuit should be selected in the range of 1.5-2µs. SC interrupting time might vary with the
wiring pattern. Tight tolerance, temp-compensated type is recommended for R1, C5.
6
7
: All capacitors should be mounted as close to the terminals of the DIP-IPM as possible. (C1: good temperature, frequency character-
istic electrolytic type, and C2, C3: good temperature, frequency and DC bias characteristic ceramic type are recommended.)
: To prevent surge destruction, the wiring between the smoothing capacitor and the P, N1 terminals should be as short as possible.
Generally a 0.1-0.22µF snubber between the P-N1 terminals is recommended.
: It is recommended to insert a Zener diode (24V/1W) between each pair of control supply terminals to prevent surge destruction.
: If control GND is connected to power GND by broad pattern, it may cause malfunction by power GND fluctuation. It is recommended
to connect control GND and power GND at only a point.
8
9
10 : The reference voltage Vref of comparator should be set up the same rating of short circuit trip level (Vsc(ref): min.0.43V to max.0.53V).
11 : OR logic output high level should exceed the maximum short circuit trip level (Vsc(ref): max.0.53V).
Aug. 2007
8