PTH12030WAST全新原装原理图各脚功能电路原理芯片引脚定义-中国IC网-芯三七

PTH12030W/L

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SLTS211F–MAY 2003–REVISED FEBRUARY 2007

26-A, 12-V INPUT NON-ISOLATED WIDE-OUTPUT

ADJUST POWER MODULE

FEATURES

APPLICATIONS

•

Multi-voltage, multi-processor systems

•

Up to 26 A Output Current

12-V Input Voltage

Wide-Output Voltage Adjust

(1.2 V to 5.5 V) / (0.8 V to 1.8 V)

•

Efficiencies up to 94%

235 W/in³Power Density

On/Off Inhibit

Nominal Size = 1.37 in x 1.12 in

(34,8 mm x 28,5 mm)

Output Voltage Sense

Prebias Startup

Margin Up/Down Controls

Dual-Phase Topology

Auto-Track™ Sequencing

Undervoltage Lockout

Output Overcurrent Protection

(Non-Latching, Auto-Reset)

•

Overtemperature Protection

Operating Temperature: –40°C to 85°C

Safety Agency Approvals:

UL/IEC/CSA-C22.2 60950-1

•

Point of Load Alliance (POLA) Compatible

DESCRIPTION

The PTH12030 is a series of high current, non-isolated power module from Texas Instruments. This product is

characterized by high efficiencies, and up to 26 A of output current, while occupying a small PCB area of

1.64 in². In terms of cost, size, and performance, the series provides OEM’s with a flexible module that meets

the requirements of the most complex and demanding mixed-signal applications. These include the most densly

populated, multiprocessor systems that incorporate the high-speed TMS320™ DSP family, microprocessors,

and ASICs.

The series uses double-sided surface mount construction and provides high-performance step-down power

conversion from a 12-V input bus voltage. The output voltage of the W-suffix parts can be set to any value over

the range, 1.2 V to 5.5 V. The L-suffix parts have an adjustment range of 0.8 V to 1.8 V. The output voltage is

set using a single resistor.

This series includes Auto-Track™. Auto-Track simplifies power-up and power-down supply voltage sequencing

in a system by enabling modules to track each other, or any other external voltage.

Each model also includes an on/off inhibit, output voltage adjust (trim), and margin up/down controls, and the

ability to start up into an existing prebias. An output voltage sense ensures tight load regulation, and an output

overcurrent and thermal shutdown feature provide for protection against external load faults.

Package options inlude both through-hole and surface mount configurations.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Auto-Track, TMS320, POLA are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

PTH12030W/L

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SLTS211F–MAY 2003–REVISED FEBRUARY 2007

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

STANDARD APPLICATION

Margin Down

Margin Up

Track

13 12 11

1

2

3

10

V

I

9

8

PTH12030x

(Top View)

V

O

7

4

5

6

Inhibit

V

Sense

O

L

O

A

D

C

I

C

O

560 mF

Electrolytic

(Required)

330 mF

(Optional)

R

SET

GND

A. R_SET= Required to set the output voltage to a value higher than the minimum value. See the Application Information

section for values.

ORDERING INFORMATION

For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see

the TI website at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

Over operating free-air temperature range, all voltages are with respect to GND (unless otherwise noted)

MIN

–0.3

–40

TYP

MAX

V_I+ 0.3

85

UNIT

V

V_TrackTrack pin voltage

T_AOperating Temperature

Range

Over V_Irange

°C

(1)

T_waveWave solder temperature Surface temperature of module body or pins

PTH12030WAH

260

(5 seconds)

°C

(1)

PTH12030WAS

PTH12030WAZ

235

T_reflowSolder reflow temperature Surface temperature of module body or pins

(1)

260

T_stg

Storage Temperature

Mechanical Shock

Mechanical Vibration

Weight

–55

125

°C

G

Per Mil-STD-883D, Method 2002.3, 1 ms, 1/2 Sine, mounted

500

Mil-STD-883D, Method 2007.2 20-2000 Hz

15

10

G

grams

Flammability

Meets UL 94V-O

(1) During soldering of package version, do not elevate peak temperature of the module, pins, or internal components above the stated

maximum.

2

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ELECTRICAL CHARACTERISTICS

T_A= 25°C, V_I= 12 V, V_O= 3.3 V, C_I= 560 µF, C_O= 0 µF, and I_O= I_Omax (unless otherwise stated)

PTH12030W

CHARACTERISTICS

CONDITIONS

60°C, 200 LFM airflow

MIN

0

TYP

MAX

26⁽¹⁾

13.8

±2⁽²⁾

UNIT

I_O

Output current

A

25°C, natural convection

0

V_I

Input voltage range

Set-point voltage tolerance

Temperature variation

Line regulation

Over l_Orange

10.2

V

V_Otol

%V_O

mV

%V_O

V

∆Reg_temp

∆Reg_line

∆Reg_load

∆Reg_tot

∆V_adj

–40°C < T_A< 85°C

±0.5

±5

Over V_Irange

Load regulation

Over I_Orange

±5

Total qutput variation

V_Oadjust range

Includes set-point, line, load, –40 °C ≤ T_A≤ 85 °C

Over V_Irange

±3⁽²⁾

1.2

5.5

R_SET= 280 Ω

R_SET= 2 kΩ

V_O= 5 V

94.5%

92.7%

91.4%

89.5%

88.2%

86.2%

25

V_O= 3.3 V

V_O= 2.5 V

V_O= 1.8 V

V_O= 1.5 V

R_SET= 4.32 kΩ

R_SET= 11.5 kΩ

R_SET= 24.3 kΩ

η

Efficiency

I_O= 18 A

R_SET= open circuit V_O= 1.2 V

V_Oripple (peak-to-peak)

Overcurrent threshold

20-MHz bandwidth

All Voltages

mV_PP

A

I_Otrip

t_tr

Reset, followed by auto-recovery

50

Recovery Time

50

µS

1 A/µs load step,

50 to 100% I_Omax, C_O= 330 µF

Transient response

∆V_tr

V_Oover/undershoot

150

mV

Margin up/down adjust

±5%

-8⁽³⁾

Margin control (pins 12&13)

Margin input current, Pin to GND

µA

I_ILtrack

Track input current (pin 11) Pin to GND

-0.13⁽⁴⁾

dV_track/dt

Track slew rate capability

C_O≤ C_O(max)

1

8

V/ms

V_Iincreasing

9.5

8.5

UVLO

Undervoltage lockout

V

V_Idecreasing

8.8

2.5

Input high voltage (V_IH)

Input low voltage (V_IL)

Input low current (I_IL)

Input standby current

Switching frequency

Referenced to GND

Pin 4 to GND

Open⁽⁵⁾

0.5

Inhibit

control

(pin 4)

–0.2

0.5

10

µA

mA

kHz

µF

I_Iinh

fs

Inhibit (pin 4) to GND, track (pin 11) V_I

Over V_Iand I_Oranges

475

560⁽⁶⁾

575

675

C_I

External input capacitance

nonceramic

ceramic

0

4⁽⁹⁾

330⁽⁷⁾7,150⁽⁸⁾

300

Capacitance value

µF

C_O

External output capacitance

Reliability

Equiv. series resistance (nonceramic)

mΩ

10⁶Hrs

MTBF

Bellcore TR-332, 50% stress, T_A=40°C, ground benign

3

(1) See SOA curves or consult factory for appropriate derating.

(2) The set-point voltage tolerance is affected by the tolerance and stability of R_SET. The stated limit is unconditionally met if R_SEThas a

tolerance of 1 %, with 100 ppm/°C (or better) temperature stability.

(3) A small, low-leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc.

(4) A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control this pin.

(5) This control pin is pulled up to an internal 5-V source. To avoid risk of damage to the module, do not apply an external voltage greater

than 7 V. If it is left open-circuit, the module operates when input power is applied. A small, low-leakage (<100 nA) MOSFET or

open-drain/collector voltage supervisor IC is recommended for control. For further info, see the related application information section.

(6) A 560 µF electrolytic input capacitor, rated for a minimum of 500 mArms of ripple current is required for proper operation.

(7) An external output capacitor is not required for basic operation. Adding 330 µF of distributed capacitance at the load will improve the

transient response.

(8) This is the calculated maximum. The minimum ESR limitation often results in a lower value. See the application information section.

(9) This is the typical ESR for all the electrolytic (nonceramic) ouput capacitance. Use 7 mΩ as the minimum when using max-ESR values

to calculate.

3

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SLTS211F–MAY 2003–REVISED FEBRUARY 2007

ELECTRICAL CHARACTERISTICS

T_A= 25°C, V_I= 12 V, V_O= 3.3 V, C_I= 560 µF, C_O= 0 µF, and I_O= I_Omax (unless otherwise stated)

PTH12030L

CHARACTERISTICS

CONDITIONS

60°C, 200 LFM airflow

MIN

0

TYP

MAX

26⁽¹⁾

13.8

±2⁽²⁾

UNIT

I_O

Output current

A

25°C, natural convection

0

V_I

Input voltage range

Set-point voltage tolerance

Temperature variation

Line regulation

Over l_Orange

10.2

V

V_Otol

%V_O

mV

%V_O

V

∆Reg_temp

∆Reg_line

∆Reg_load

∆Reg_tot

∆V_adj

–40°C < T_A< 85°C

±0.5

±5

Over V_Irange

Load regulation

Over I_Orange

±5

Total output variation

V_Oadjust range

Includes set-point, line, load, –40°C ≤ T_A≤ 85 °C

Over V_Irange

±3⁽²⁾

0.8

1.8

R_SET= 130 Ω

V_O= 1.8 V

V_O= 1.5 V

V_O= 1.2 V

V_O= 1 V

89%

87%

85%

83%

80%

15

R_SET= 3.57 kΩ

R_SET= 12.1 kΩ

R_SET= 32.4 kΩ

R_SET= open cct

η

Efficiency

I_O= 18 A

V_O= 0.8 V

V_Oripple (peak-to-peak)

Overcurrent threshold

20-MHz bandwidth

mV_PP

A

I_Otrip

t_tr

Reset, followed by auto-recovery

50

Recovery Time

50

µS

1 A/µs load step,

50 to 100% I_omax, C_O= 330 µF

Transient response

∆V_tr

V_Oover/undershoot

150

±5

-8⁽³⁾

mV

%

Margin up/down adjust

Margin control (pins

12&13)

Margin input current, Pin to GND

µA

I_ILtrack

Track input current (pin 11) Pin to GND

–0.13⁽⁴⁾

mA

V/ms

dV_track/dt

Track slew rate capability

C_O≤ C_O(max)

1

V_Iincreasing

9.5

8.5

10

UVLO

Undervoltage lockout

V

V_Idecreasing

8.8

2.5

Input high voltage (V_IH)

Input low voltage (V_IL)

Input low current (I_IL)

Input standby current

Switching frequency

Referenced to GND

Pin 4 to GND

Open⁽⁵⁾

0.5

Inhibit

control

(pin4)

–0.2

0.5

10

mA

kHz

µF

I_Iinh

fs

Inhibit (pin 4) to GND, track (pin 11) V_I

Over V_Iand I_Oranges

475

560⁽⁶⁾

575

675

C_I

External input capacitance

nonceramic

ceramic

0

330⁽⁷⁾7150⁽⁸⁾

300

Capacitance value

µF

External output

capacitance

C_O

0

Equivalent series resistance (nonceramic)

4⁽⁹⁾

3

mΩ

10⁶Hr

MTBF

Reliability

Bellcore TR-332, 50% stress, T_A= 40°C, ground benign

(1) See SOA curves or consult factory for appropriate derating.

(2) The set-point voltage tolerance is affected by the tolerance and stability of R_SET. The stated limit is unconditionally met if R_SEThas a

tolerance of 1%, with 100 ppm/°C (or better) temperature stability.

(3) A small, low-leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc.

(4) A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control this pin.

(5) This control pin is pulled up to an internal 5-V source. To avoid risk of damage to the module, do not apply an external voltage greater

than 7 V. If it is left open-circuit, the module operates when input power is applied. A small, low-leakage (<100 nA) MOSFET or

open-drain/collector voltage supervisor IC is recommended for control. For further information, see the application information section.

(6) A 560 µF electrolytic input capacitor, rated for a minimum of 500 mArms of ripple current is required for proper operation.

(7) An external output capacitor is not required for basic operation. Adding 330 µF of distributed capacitance at the load improves the

transient response.

(8) This is the calculated maximum. The minimum ESR limitation often results in a lower value. See the application information section.

(9) This is the typical ESR for all the electrolytic (non-ceramic) ouput capacitance. Use 7 mΩ as the minimum when using max-ESR values

to calculate.

4

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DEVICE INFORMATION

TERMINAL FUNCTIONS

TERMINAL

DESCRIPTION

NAME

NO.

This is the common ground connection for the V_Iand V_Opower connections. It is also the 0 Vdc

reference for the control inputs.

GND

V_I

1,3,7,10

2

The positive input voltage power node to the module, which is referenced to common GND.

The Inhibit pin is an open-collector/drain negative logic input that is referenced to GND. Applying a

low-level ground signal to this input disables the module’s output and turns off the output voltage.

When the Inhibit control is active, the input current drawn by the regulator is significantly reduced. If

the Inhibit pin is left open-circuit, the module produces an output whenever a valid input source is

applied.

Inhibit⁽¹⁾

4

A 1% resistor must be directly connected between this pin and pin 7 (GND) to set the output voltage to

a value higher than 0.8 V. The temperature stability of the resistor should be 100 ppm/°C (or better).

The set point range for the output voltage is from 1.2 V to 5.5 V for W-suffix devices, and 0.8 V to 1.8

V for L-suffix devices. The resistor value required for a given output voltage may be calculated using a

formula. If left open circuit, the module output voltage defaults to its lowest value. For further

information on output voltage adjustment, see the related application information section. Table 3 gives

the preferred resistor values for a number of standard output voltages.

V_OAdjust

5

The sense input allows the regulation circuit to compensate for voltage drop between the module and

the load. For optimal voltage accuracy, V_OSense should be connected to Vout. It can also be left

disconnected.

V_OSense

V_O

6

8,9

The regulated positive power output with respect to the GND node.

This is an analog control input that enables the output voltage to follow an external voltage. This pin

becomes active typically 20 ms after the input voltage has been applied, and allows direct control of

the output voltage from 0 V up to the nominal set-point voltage. Within this range the output will follow

the voltage at the Track pin on a volt-for-volt basis. When the control voltage is raised above this

range, the module regulates at its set-point voltage. The feature allows the output voltage to rise

simultaneously with other modules powered from the same input bus. If unused, this input should be

connected to V_I. Note: Due to the undervoltage lockout feature, the output of the module cannot follow

its own input voltage during power up. For more information, see the related application information

section.

Track

11

When this input is asserted to GND, the output voltage is decreased by 5% from the nominal. The

input requires an open-collector (open-drain) interface. It is not TTL compatible. A lower percent

change can be accomodated with a series resistor. For further information, see the related application

information section.

Margin Down⁽¹⁾

Margin Up⁽¹⁾

12

13

When this input is asserted to GND, the output voltage is increased by 5%. The input requires an

open-collector (open-drain) interface. It is not TTL compatible. The percent change can be reduced

with a series resistor. For further information, see the related application information section.

(1) Denotes negative logic:

Open = Normal operation

Ground = Function active

13 12 11

1

2

3

10

9

8

PTHXX030

(Top View)

7

4

5

6

5

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(1)(2)

PTH12030W TYPICAL CHARACTERISTICS (V_I= 12 V)

EFFICIENCY

vs

LOAD CURRENT

OUTPUT RIPPLE

vs

LOAD CURRENT

POWER DISSIPATION

vs

LOAD CURRENT

50

40

30

20

10

0

100

90

80

70

60

50

10

8

V

= 3.3 V

O

V = 5 V

O

V

= 2.5 V

O

V

= 5 V

O

V

= 1.8 V

V

= 3.3 V

O

6

V

= 1.2 V

O

V

= 2.5 V

O

V

= 1.8 V

O

V

= 2.5 V

4

O

V

= 3.3 V

O

V

= 1.8 V

O

2

V

= 1.2 V

20

O

V

= 1.2 V

O

V

= 5 V

10

O

0

5

15

25

0

5

10

15

20

25

0

5

10

15

20

25

I

− Output Current − A

I

− Output Current − A

O

I

− Output Current − A

O

Figure 1.

Figure 2.

Figure 3.

TEMPERATURE DERATING

vs

OUTPUT CURRENT

90

80

70

60

50

40

400 LFM

200 LFM

100 LFM

Nat Conv

30

20

5

0

10

25

15

20

I

− Output Current − A

O

Figure 4.

(1) Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the converter.

Applies to Figure 1, Figure 2, and Figure 3.

(2) SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating

temperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 1 oz. copper. For surface mount

products (AS and AZ suffix), multiple vias (plated through holes) are required to add thermal paths around the power pins. Please refer

to the mechanical specification for more information. Applies to Figure 4.

6

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(1)(2)

PTH12030L TYPICAL CHARACTERISTICS (V_I= 12 V)

EFFICIENCY

vs

LOAD CURRENT

OUTPUT RIPPLE

vs

LOAD CURRENT

POWER DISSIPATION

vs

LOAD CURRENT

100

50

40

30

20

8

6

4

V

= 1.5 V

O

V

= 1.8 V

O

V

= 1.2 V

O

90

80

70

60

50

V

= 0.8

V

O

V

= 1 V

O

V

= 1 V

O

V

= 0.8 V

O

V

= 1.5 V

O

V = 1.8 V

O

V

= 1.2

V

O

= 1.5 V

O

V

= 1 V

2

0

O

10

0

V

= 1.8 V

O

V

= 0.8 V

20

O

0

5

10

15

20

25

0

5

10

15

25

0

5

10

15

20

25

I

− Output Current − A

I

− Output Current − A

O

I

− Output Current − A

O

Figure 5.

Figure 6.

Figure 7.

TEMPERATURE DERATING

vs

OUTPUT CURRENT

90

80

70

60

50

40

30

20

Nat Conv

100 LFM

200 LFM

400 LFM

V

=≤ 1.8 V

O

0

5

10

15

20

25

I

− Output Current − A

O

Figure 8.

(1) Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the converter.

Applies to Figure 5, Figure 6, and Figure 7.

(2) SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating

temperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 1 oz. copper. For surface mount

products (AS and AZ suffix), multiple vias (plated through holes) are required to add thermal paths around the power pins. Please refer

to the mechanical specification for more information. Applies to Figure 8.

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APPLICATION INFORMATION

ADJUSTING THE OUTPUT VOLTAGE

The V_OAdjust control (pin 5) sets the output voltage of the PTH12030W/L. The adjustment range is 1.2 V to

5.5 V for the W-suffix modules, and 0.8 V to 1.8 V for L-suffix modules. The adjustment method requires the

addition of a single external resistor, R_SET, that must be connected directly between the V_OAdjust and GND

pins⁽¹⁾. Table 1 gives the standard value of the external resistor for a number of standard voltages, along with

the actual output voltage that this resistance value provides. For other output voltages the required resistor can

either be calculated using Equation 1, or simply selected from the range of values given in Table 3. Figure 9

shows the placement of the required resistor.

Table 1. Standard Values of R_SETfor Standard Output Voltages

PTH12030W

PTH12030L

V_O(Required)

5 V

R_SET

280 Ω

2 kΩ

V_O(Actual)

5.009 V

3.294 V

2.503 V

2.01 V

1.081 V

1.506 V

1.2 V

R_SET

N/A

V_O(Actual)

N/A

3.3 V

2.5 V

2 V

N/A

4.32 kΩ

8.06 kΩ

11.5 kΩ

24.3 kΩ

Open

N/A

1.8 V

1.5 V

1.2 V

1.1 V

1 V

130 Ω

3.57 kΩ

12.1 kΩ

18.7 kΩ

32.4 kΩ

71.5 kΩ

Open

1.8 V

1.499 V

1.201 V

1.101 V

0.999 V

0.901 V

0.8 V

N/A

0.9 V

0.8 V

N/A

V_OSense

13 12 11

6

Sense

V_O

8, 9

V

PTH12030x

O

Adjust

5

GND GND

1, 3, 7 10

C_O

330 mF

(Optional)

R_SET, 1 %

GND

Figure 9. V_oAdjust Resistor Placement

NOTES

1. R_SET: Use a 0.05 W resistor with a tolerance of 1% and temperature stability of 100 ppm/°C (or better).

Connect the resistor directly between pins 5 and 7, as close to the regulator as possible, using dedicated

PCB traces.

2. Never connect capacitors from V_OAdjust to either GND or V_O. Any capacitance added to the V_OAdjust

pin affects the stability of the regulator.

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Use Equation 1 to calculate the adjust resistor value. See Table 2 for parameters, R_Sand V_min

.

Equation 1. Output Voltage Adjust

Table 2. Adjust Equation Parameters

PARAMETERS

PTH12030W

1.2 V

PTH12030L

0.8 V

V_min

V_max

R_s

R_SET= 10 kW x

- R_SkW

V_O- V_min

(1)

5.5 V

1.8 V

1.82 kΩ

7.87 kΩ

Table 3. Output Voltage Set-Point Resistor Values

PTH12030W

V_OUT

PTH12030L

V_OUT

1.2

R_SET

V_OUT

0.8

R_SET

Open

2.7

2.75

2.8

2.85

2.9

2.95

3

3.51 kΩ

3.34 kΩ

3.18 kΩ

3.03 kΩ

2.89 kΩ

2.75 kΩ

2.62 kΩ

2.50 kΩ

2.39 kΩ

2.28 kΩ

2.18 kΩ

2.08 kΩ

1.99 kΩ

1.9 kΩ

1.82 kΩ

1.66 kΩ

1.51 kΩ

1.38 kΩ

1.26 kΩ

1.14 kΩ

1.04 kΩ

939 Ω

1.225

1.25

1.275

1.3

318 kΩ

158 kΩ

105 kΩ

78.2 kΩ

62.2 kΩ

51.5 kΩ

43.9 kΩ

38.2 kΩ

33.7 kΩ

30.2 kΩ

27.3 kΩ

24.8 kΩ

21 kΩ

0.825

0.85

0.875

0.9

312 kΩ

152 kΩ

98.8 kΩ

72.1 kΩ

56.1 kΩ

45.5 kΩ

37.8 kΩ

32.1 kΩ

27.7 kΩ

24.1 kΩ

21.2 kΩ

18.8 kΩ

16.7 kΩ

15 kΩ

1.325

1.35

1.375

1.4

0.925

0.95

0.975

1

3.05

3.1

3.15

3.2

3.25

3.3

3.35

3.4

3.5

3.6

3.7

3.8

3.9

4

1.425

1.45

1.475

1.5

1.025

1.05

1.075

1.1

1.55

1.6

1.125

1.15

1.175

1.2

18.2 kΩ

16 kΩ

1.65

1.7

13.5 kΩ

12.1 kΩ

11 kΩ

14.2 kΩ

12.7 kΩ

11.5 kΩ

10.5 kΩ

9.61 kΩ

8.85 kΩ

8.18 kΩ

7.59 kΩ

7.07 kΩ

6.6 kΩ

1.75

1.8

1.225

1.25

1.275

1.3

9.91 kΩ

8.97 kΩ

8.13 kΩ

7.37 kΩ

6.68 kΩ

6.04 kΩ

5.46 kΩ

4.93 kΩ

4.44 kΩ

3.98 kΩ

3.56 kΩ

2.8 kΩ

1.85

1.9

1.95

2

4.1

4.2

4.3

4.4

4.5

4.6

4.7

4.8

4.9

5

1.325

1.35

1.375

1.4

847 Ω

2.05

2.1

761 Ω

680 Ω

2.15

2.2

604 Ω

1.425

1.45

1.475

1.5

6.18 kΩ

5.8 kΩ

533 Ω

2.25

2.3

466 Ω

5.45 kΩ

5.14 kΩ

4.85 kΩ

4.58 kΩ

4.33 kΩ

4.11 kΩ

3.89 kΩ

3.7 kΩ

402 Ω

2.35

2.4

342 Ω

1.55

1.6

285 Ω

2.13 kΩ

1.54 kΩ

1.02 kΩ

551 Ω

2.45

2.5

5.1

5.2

5.3

5.4

5.5

231 Ω

1.65

1.7

180 Ω

2.55

2.6

131 Ω

1.75

1.8

85 Ω

130 Ω

2.65

41 Ω

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CAPACITOR RECOMMENDATIONS FOR THE PTH12030 SERIES OF POWER MODULES

INPUT CAPACITOR

The recommended input capacitor(s) is determined by the 560 µF minimum capacitance and 500 mArms

minimum ripple current rating.

Ripple current, less than 100 mΩ equivalent series resistance (ESR) and temperature, are the major

considerations when selecting input capacitors. Unlike polymer-tantalum capacitors, regular tantalum capacitors

are not recommended for the input bus. These capacitors require a recommended minimum voltage rating of 2 ×

(max. dc voltage + ac ripple). When the operating temperature is below 0°C, the ESR of aluminum electrolytic

capacitors increases. For these applications, Os-Con, polymer-tantalum, and polymer-aluminum types should be

considered.

Adding one or two ceramic capacitors to the input further reduces high-frequency reflected ripple current.

OUTPUT CAPACITORS (OPTIONAL)

For applications with load transients, regulator response benefits from an external output capacitance. The

recommended output capacitance of 330 µF allows the module to meet its transient response specification. For

most applications, a high quality computer-grade aluminum eletrolytic capacitor is adequate. These capacitors

provide decoupling over the frequency range, 2 kHz to 150 kHz, and are suitable when ambient temperatures

are above 0°C. For operation below 0°C, tantalum, ceramic, or Os-Con type capacitors are recommended.

When using one or more nonceramic capacitors, the calculated equivalent ESR should be no lower than 4 mΩ

(7 mΩ using the manufacturer’s maximum ESR for a single capacitor). A list of preferred low-ESR type

capacitors are identified in Table 4.

CERAMIC CAPACITORS

Above 150 kHz, the performance of aluminum electrolytic capacitors is less effective. Multilayer ceramic

capacitors have low ESR and a resonant frequency higher than the bandwidth of the regulator. They can be

used to reduce the reflected ripple current at the input as well as improve the transient response of the output.

When used on the output their combined ESR is not critical as long as the total value of ceramic capacitance

does not exceed 300 µF. Also, to prevent the formation of local resonances, do not place more than five

identical ceramic capacitors in parallel with values of 10 µF or greater.

TANTALUM CAPACITORS

Tantalum type capacitors can only be used on the output bus, and are recommended for applications where the

ambient operating temperature can be less than 0°C. The AVX TPS, Sprague 593D/594/595, and Kemet

T495/T510 capacitor series are suggested over other tantalum types due to their higher rated surge, power

dissipation, and ripple current capability. As a caution many general-purpose tantalum capacitors have

considerably higher ESR, reduced power dissipation and lower ripple current capability. These capacitors are

also less reliable as they have reduced power dissipation and surge current ratings. Tantalum capacitors that

have no stated ESR or surge current rating are not recommended for power applications.

When specifying Os-con and polymer tantalum capacitors for the output, the minimum ESR limit is encountered

well before the maximum capacitance value is reached.

CAPACITOR TABLE

Table 4 identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple

current (rms) ratings. The recommended number of capacitors required at both the input and output buses is

identified for each capacitor type.

This is not an extensive capacitor list. Capacitors from other vendors are available with comparable

specifications. Those listed are for guidance. The RMS ripple current rating and ESR (at 100 kHz) are critical

parameters necessary to insure both optimum regulator performance and long capacitor life.

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Table 4. Input/Output Capacitors⁽¹⁾

CAPACITOR CHARACTERISTICS

QUANTITY

CAPACITOR VENDOR,

TYPE/SERIES, (STYLE)

WORKING VALUE MAX. ESR

MAX RIPPLE

PHYSICAL

SIZE (mm)

INPUT

BUS

OPTIONAL

OUTPUT

BUS

VENDOR PART

NUMBER

VOLTAGE

(µF)

AT 100 kHz CURRENT AT

85 °C (lrms)

Panasonic

25 V

35 V

330

560

470

680

0.090 Ω

0.065 Ω

0.080 Ω

0.060 Ω

>1100 mA

1205 mA

>1100 mA

1100 mA

10 x 12,5

12,5 x 15

10 x 10,2

12,5 x 13,5

2

1

2

1

EEUFC1E331

FC, Radial

EEUFC1E561S

EEVFK1E471P

EEVFK1V681Q

FK, (SMD)

United Chemi-Con

MVZ, Aluminum (SMD)

LXZ, Aluminium (Radial))

PS, Poly-Aluminum (Radial)

PXA, Poly-Aluminum (SMD)

Nichicon, Aluminum

HD, (Radial)

16 V

25 V

16 V

25 V

16 V

35 V

6.3 V

680

330

560

680

560

180

0.090Ω

0.068 Ω

0.014 Ω

0.060 Ω

0.038 Ω

0.048 Ω

0.005 Ω

670 mA

1050 mA

5060 mA

5050 mA

1060 mA

1440 mA

1360 mA

4000 mA

10 x 10

10 x 16

1

MVZ16VC681MJ10TP

LXZ16VB681M10X16LL

16PS330MJ12

1

10 x 12,5

10 x 12,2

12,5 x 15

10 x 16

2

≤3

1

2

PXA16VCMJ12

1

UPM1E561MHH6

UHD1C681MHR

1

PM, (Radial)

16 x 15

1

UPM1V561MHH6

Panasonic, Poly-Aluminum

SE(SMD)

7,3 x 4,3 x

4,2

N/R⁽²⁾

≤1⁽³⁾

EEFSE0J181R

(V_O≤ 5.1V)

Sanyo, TPE Poscap (SMD)

SEQP, Os-Con (Radial)

SVP, Os-Con (SMD)

10 V

16 V

10 V

330

470

0.025 Ω

0.016Ω

0.016 Ω

0.045 Ω

7,3L x 5,7W

10 x 13

N/R⁽²⁾

≤4

≤3

10TPE330M

16SEQP330M

16SVP330M

4720 mA

>4700 mA

>1723 mA

2

10 x 12,6

7,3L x 5,7W

≤3

AVX, Tantalum, Series III

N/R⁽²⁾

≤5⁽³⁾

TPSE477M010R0045

(V_O≤ 5.1 V)

TPS (SMD)

10 V

330

0.045 Ω

>1723 mA

x 4,1H

N/R⁽²⁾

≤5⁽³⁾

TPSE337M010R0045

(V_O≤ 5.1 V)

Kemet, Poly-Tantalum

T520, (SMD)

10 V

6.3 V

330

470

0.040 Ω

0.010 Ω

1800 mA

>5000 mA

> 5000 mA

4,3 W

x 7,3 L

x 4 H

N/R⁽²⁾

≤5

≤1

T520X337M010AS

T530, (SMD)

T530X337M010ASE010

≤1⁽³⁾

T530X477M006ASE010

(V_O≤ 5.1 V)

Vishay-Sprague

595D, Tantalum (SMD)

595D477X0010R2T

(V_O≤ 5.1 V)

10 V

16 V

6.3 V

470

1,000

330

10

0.100 Ω

0.015 Ω

0.017Ω

0.002 Ω

1440 mA

9740 mA

4580 mA

-

7,2 x 6 x 4,1

16 x 25

N/R⁽²⁾

1

≤5⁽³⁾

≤2

94SA, Os-con (Radial)

94SVP, Os-Con (SMD)

Kemet, Ceramic X5R (SMD)

94SA108X0016HBP

94SVP337X0016F12

C1210C106M4PAC

C1210C476K9PAC

GRM32ER60J107M

10 x12,7

2

≤2

1210 Case

3225 mm

1210 Case

1⁽⁴⁾

≤5

47

N/R⁽²⁾

≤5

Murata, Ceramic X5R

(SMD)

100

-

≤3

16 V

6.3 V

16 V

47

22

3225 mm

1⁽⁴⁾

≤5

≤3

≤5

GRM32ER61J476K

GRM32ER61C226K

GRM32DR61C106K

C3225X5R0J107MT

C322X5R0J476MT

C3225XR1C226MT

C3225X5R1C106MT

10

1⁽⁴⁾

TDK, Ceramic X5R (SMD)

100

47

0.002 Ω

-

1210 Case

3225 mm

N/R⁽²⁾

1⁽⁴⁾

22

10

1⁽⁴⁾

(1) Capacitor Supplier Verification

Please verify availability of capacitors identified in this table. Capacitor suppliers may recommend alternative part numbers because of

limited availability or obsolete products. In some instances, the capacitor product life cycle may be in decline and have short-term

consideration for obsolescence.

RoHS, Lead-free and Material Details

Please consult capacitor suppliers regarding material composition, RoHS status, lead-free status, and manufacturing process

requirements. Component designators or part number deviations can occur when material composition or soldering requirements are

updated.

(2) N/R –Not recommended. The voltage rating does not meet the minimum operating limits.

(3) The voltage rating of this capacitor only allows it to be used for output voltages that are equal to or less than 5.1 V.

(4) Small ceramic capacitors may used to complement electrolytic types at the input to further reduce high-frequency ripple current.

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DESIGNING FOR VERY FAST LOAD TRANSIENTS

The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of

1 A/µs. The typical voltage deviation for this load transient is given in the specification table using the optional

value of output capacitance. As the di/dt of a transient is increased, the response of a converter’s regulation

circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation with any dc/dc

converter once the speed of the transient exceeds its bandwidth capability. If the target application specifies a

higher di/dt or lower voltage deviation, the requirement can only be met with additional output capacitor

decoupling. In these cases special attention must be paid to the type, value, and ESR of the capacitors selected.

If the transient performance requirements exceed that specified in this data sheet, or the total amount of load

capacitance is above 3,000 µF, the selection of output capacitors becomes more important.

FEATURES OF THE PTH FAMILY OF NON-ISOLATED WIDE OUTPUT ADJUST POWER

MODULES

POLA ™COMPATIBILITY

The PTH/PTV family of nonisolated, wide-output adjustable power modules are optimized for applications that

require a flexible, high performance module that is small in size. Each of these products are POLA™ compatible.

POLA compatible products are produced by a number of manufacturers, and offer customers advanced,

nonisolated modules with the same footprint and form factor. POLA parts are also assured to be interoperable,

thereby providing customers with a second-source availability.

From the basic, Just Plug it In functionality of the 6-A modules, to the 30-A rated feature-rich PTHxx030, these

products were designed to be very flexible, yet simple to use. The features vary with each product. Table 5

provides a quick reference to the features by product series and input bus voltage.

Table 5. Operating Features by Series and Input Bus Voltage

Series

Input Bus

I_O

Adjust

(Trim)

On/Off

Inhibit

Over-

Current

Prebias

Startup

Auto-

Track™

Margin

Up/Down

Output

Sense

Thermal

Shutdown

3.3 V

6 A

•

PTHxx050 5 V

12 V

6 A

3.3 V / 5 V

12 V

10 A

8 A

•

PTHxx060

PTHxx010

PTVxx010

PTHxx020

PTHxx030

3.3 V / 5 V

12 V

15 A

12 A

8 A

5 V

12 V

8 A

•

3.3 V / 5 V

12 V

22 A

18 A

16 A

30 A

26 A

•

5 V

12 V

3.3 V/ 5 V

12 V

•

For simple point-of-use applications, the PTH12050 (6 A) provides operating features such as an on/off inhibit,

output voltage trim, prebias start-up and overcurrent protection. The PTH12060 (10 A), and PTH12010 (12 A)

include an output voltage sense, and margin up/down controls. Then the higher output current, PTH12020 (18

A) and PTH12030 (26 A) products incorporate overtemperature shutdown protection.

The PTV12010 and PTV12020 are similar parts offered in a vertical, single in-line pin (SIP) profile, at slightly

lower current ratings.

All of the products referenced in Table 5 include Auto-Track™. This feature was specifically designed to simplify

the task of sequencing the supply voltages in a power system. This and other features are described in the

following sections.

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SOFT-START POWER UP

The Auto-Track feature allows the power-up of multiple PTH modules to be directly controlled from the Track

pin. However, in a stand-alone configuration, or when the Auto-Track feature is not being used, the Track pin

should be directly connected to the input voltage, V_I, see Figure 10.

When the Track pin is connected to the input voltage the Auto-Track function is permanently disengaged. This

allows the module to power up entirely under the control of its internal soft-start circuitry. When power up is

under soft-start control, the output voltage rises to the set-point at a quicker and more linear rate.

10 9

8

5

Up

Dn Track

Sense

V (5 V/div)

I

3.3 V

12 V

2

6

PTH12020W

V_I

V_O

V

O

(1 V/div)

Inhibit GND

3

Adjust

4

1

7

+

R_SET

C_I

1000 mF

C_O

330 mF

2 kW

0.1 W

1%

GND

I (5 V/div)

I

t − Time − 5 ms/div

Figure 11. Power-Up Waveforms

Figure 10. Power-Up Application Circuit

From the moment a valid input voltage is applied, the soft-start control introduces a short time delay (typically

8 ms-15 ms) before allowing the output voltage to rise. The output then progressively rises to the module’s

setpoint voltage. Figure 11 shows the soft-start power-up characteristic of the 18-A output product

(PTH12020W), operating from a 12-V input bus and configured for a 3.3-V output. The waveforms were

measured with a 5-A resistive load and the Auto-Track feature disabled. The initial rise in input current when the

input voltage first starts to rise is the charge current drawn by the input capacitors. Power-up is complete within

25 ms.

OVERCURRENT PROTECTION

For protection against load faults, all modules incorporate output overcurrent protection. Applying a load that

exceeds the regulator’s overcurrent threshold causes the regulated output to shut down. Following shutdown a

module periodically attempts to recover by initiating a soft-start power-up. This is described as a hiccup mode of

operation, whereby the module continues in a cycle of successive shutdown and power up until the load fault is

removed. During this period, the average current flowing into the fault is significantly reduced. Once the fault is

removed, the module automatically recovers and returns to normal operation.

OVERTEMPERATURE PROTECTION (OTP)

The PTH12020W and PTH12030W products have overtemperature protection. These products have an

on-board temperature sensor that protects the module’s internal circuitry against excessively high temperatures.

A rise in the internal temperature may be the result of a drop in airflow, or a high ambient temperature. If the

internal temperature exceeds the OTP threshold, the module’s Inhibit control is internally pulled low. This turns

the output off. The output voltage drops as the external output capacitors are discharged by the load circuit. The

recovery is automatic, and begins with a soft-start power up. It occurs when the the sensed temperature

decreases by about 10°C below the trip point.

Note: The overtemperature protection is a last resort mechanism to prevent thermal stress to the regulator.

Operation at or close to the thermal shutdown temperature is not recommended and reduces the long-term

reliability of the module. Always operate the regulator within the specified safe operating area (SOA) limits

for the worst-case conditions of ambient temperature and airflow.

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OUTPUT ON/OFF INHIBIT

For applications requiring output voltage on/off control, each series of the PTH family incorporates an output

Inhibit control pin. The inhibit feature can be used wherever there is a requirement for the output voltage from

the regulator to be turned off.

The power modules function normally when the Inhibit pin is left open-circuit, providing a regulated output

whenever a valid source voltage is connected to V_Iwith respect to GND.

Figure 12 shows the typical application of the inhibit function. Note the discrete transistor (Q1). The Inhibit input

has its own internal pull-up to a potential of 5 V to 13.2 V (see footnotes to specification table). The input is not

compatible with TTL logic devices. An open-collector (or open-drain) discrete transistor is recommended for

control.

V_OSense

10

9

8

5

Q1V (5 V/div)

DS

V_I

V_O

2

6

PTH12060W

3 1

7

4

+

V (2 V/div)

O

L

C_I

R_SET

C_O

O

A

D

560 mF

1 = Inhibit

GND

Q1

BSS138

2 kW

0.1 W

1 %

330 mF

GND

I (2 V/div)

I

t − Time − 10 ms/div

Figure 13. Power-Up from Inhibit Control

Figure 12. Inhibit Control Circuit

Turning Q1 on applies a low voltage to the Inhibit control pin and disables the output of the module. If Q1 is then

turned off, the module executes a soft-start power-up sequence. A regulated output voltage is produced within

25 ms Figure 13 shows the typical rise in both the output voltage and input current, following the turn-off of Q1.

The turn off of Q1 corresponds to the rise in the waveform, Q1 V_ds. The waveforms were measured with a 5-A

constant current load.

REMOTE SENSE

Products with this feature incorporate an output voltage sense pin, V_OSense. A remote sense improves the load

regulation performance of the module by allowing it to compensate for any IR voltage drop between its output

and the load. An IR drop is caused by the high output current flowing through the small amount of pin and trace

resistance.

To use this feature simply connect the V_OSense pin to the V_Onode, close to the load circuit (see standard

application circuit). If a sense pin is left open-circuit, an internal low-value resistor (15-Ω or less) connected

between the pin and and the output node, ensures the output remains in regulation.

With the sense pin connected, the difference between the voltage measured directly between the V_Oand GND

pins, and that measured from V_OSense to GND, is the amount of IR drop being compensated by the regulator.

This should be limited to a maximum of 0.3 V.

Note: The remote sense feature is not designed to compensate for the forward drop of nonlinear or

frequency dependent components that may be placed in series with the converter output. Examples include

OR-ing diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the

remote sense connection, they are effectively placed inside the regulation control loop, which can adversely

affect the stability of the regulator.

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Auto-Track™ Function

The Auto-Track function is unique to the PTH/PTV family, and is available with all POLA products. Auto-Track

was designed to simplify the amount of circuitry required to make the output voltage from each module power up

and power down in sequence. The sequencing of two or more supply voltages during power up is a common

requirement for complex mixed-signal applications that use dual-voltage VLSI ICs such as the TMS320™ DSP

family, microprocessors, and ASICs.

How Auto-Track™ Works

(1)

Auto-Track works by forcing the module output voltage to follow a voltage presented at the Track control pin

.

This control range is limited to between 0 V and the module set-point voltage. Once the track-pin voltage is

raised above the set-point voltage, the module output remains at its set-point ⁽²⁾. As an example, if the Track pin

of a 2.5-V regulator is at 1 V, the regulated output is 1 V. If the voltage at the Track pin rises to 3 V, the

regulated output does not go higher than 2.5 V.

When under Auto-Track control, the regulated output from the module follows the voltage at its Track pin on a

volt-for-volt basis. By connecting the Track pin of a number of these modules together, the output voltages follow

a common signal during power up and power down. The control signal can be an externally generated master

ramp waveform, or the output voltage from another power supply circuit ⁽³⁾. For convenience, the Track input

incorporates an internal RC-charge circuit. This operates off the module input voltage to produce a suitable

rising waveform at power up.

Typical Application

The basic implementation of Auto-Track allows for simultaneous voltage sequencing of a number of Auto-Track

compliant modules. Connecting the Track inputs of two or more modules forces their track input to follow the

same collective RC-ramp waveform, and allows their power-up sequence to be coordinated from a common

Track control signal. This can be an open-collector (or open-drain) device, such as a power-up reset voltage

supervisor IC. See U3 in Figure 14.

To coordinate a power-up sequence, the Track control must first be pulled to ground potential. This should be

done at or before input power is applied to the modules. The ground signal should be maintained for at least

40 ms after input power has been applied. This brief period gives the modules time to complete their internal

soft-start initialization ⁽⁴⁾, enabling them to produce an output voltage. A low-cost supply voltage supervisor IC,

that includes a built-in time delay, is an ideal component for automatically controlling the Track inputs at power

up.

Figure 14 shows how the TL7712A supply voltage supervisor IC (U3) can be used to coordinate the sequenced

power up of two 12-V input Auto-Track modules. The output of the TL7712A supervisor becomes active above

an input voltage of 3.6 V, enabling it to assert a ground signal to the common track control well before the input

voltage has reached the module's undervoltage lockout threshold. The ground signal is maintained until

approximately 43 ms after the input voltage has risen above U3's voltage threshold, which is 10.95 V. The

43-ms time period is controlled by the capacitor C3. The value of 3.3 µF provides sufficient time delay for the

modules to complete their internal soft-start initialization. The output voltage of each module remains at zero

until the track control voltage is allowed to rise. When U3 removes the ground signal, the track control voltage

automatically rises. This causes the output voltage of each module to rise simultaneously with the other

modules, until each reaches its respective set-point voltage.

Figure 16 shows the output voltage waveforms from the circuit of Figure 14 after input voltage is applied to the

circuit. The waveforms, V_O1 and V_O2, represent the output voltages from the two power modules, U1 (3.3 V) and

U2 (1.8 V), respectively. V_TRK, V_O1, and V_O2 are shown rising together to produce the desired simultaneous

power-up characteristic.

The same circuit also provides a power-down sequence. When the input voltage falls below U3's voltage

threshold, the ground signal is re-applied to the common track control. This pulls the track inputs to zero volts,

forcing the output of each module to follow, as shown in Figure 16. In order for a simultaneous power-down to

occur, the track inputs must be pulled low before the input voltage has fallen below the modules' undervoltage

lockout. This is an important constraint. Once the modules recognize that a valid input voltage is no longer

present, their outputs can no longer follow the voltage applied at their track input. During a power-down

sequence, the fall in the output voltage from the modules is limited by the maximum output capacitance and the

Auto-Track slew rate.

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2

U1

V_I

Track

V_I= 12 V

Vo₁= 3.3 V

3

6

V_O

PTH12050W

Inhibit

GND

1

Adjust

4

5

+

C_I1

C_O1

R_SET1

2.0 kΩ

8

V_CC

U3

7

2

1

3

SENSE

RESIN

5

6

RESET

#

50 Ω

R_TRK

TL7712A

REF

10

9

8

5

U2

V_I

Up Dn

Track

Sense

RESET

CT

Vo₂= 1.8 V

2

6

GND

V_O

PTH12060W

4

C_REF

R_RST

C_T

10 kΩ

0.1 µF

3.3 µF

Inhibit

GND

Adjust

3

1

4

7

+

# R

= 100 Ω / N

C_I2

C_O2

TRK

R_SET2

N = Number of Track pins connected together

11.5 kΩ

Figure 14. Sequenced Power Up and Power Down Using Auto-Track

V

TRK

(1 V/div)

V

TRK

(1 V/div)

V 1 (1 V/div)

0

V 1 (1 V/div)

0

V 2 (1 V/div)

0

V 2 (1 V/div)

0

t − Time − 400 µs/div

t − Time − 20 ms/div

Figure 15. Simultaneous Power Up

with Auto-Track Control

Figure 16. Simultaneous Power Down

with Auto-Track Control

16

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Notes on Use of Auto-Track^TM

1. The Track pin voltage must be allowed to rise above the module set-point voltage before the module

regulates at its adjusted set-point voltage.

2. The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with ramp

speeds of up to 1 V/ms.

3. The absolute maximum voltage that may be applied to the Track pin is the input voltage V_I.

4. The module cannot follow a voltage at its track control input until it has completed its soft-start

initialization. This takes about 40 ms from the time that a valid voltage has been applied to its input.

During this period, it is recommended that the Track pin be held at ground potential.

5. The Auto-Track function is disabled by connecting the Track pin to the input voltage (V_I). When

Auto-Track is disabled, the output voltage rises at a quicker and more linear rate after input power has

been applied.

PREBIAS STARTUP CAPABILITY

The capability to start up into an output prebias condition is now available to all the 12-V input, PTH series of

power modules. (Note that this is a feature enhancement for the many of the W-suffix products).^[1]

A prebias startup condition occurs as a result of an external voltage being present at the output of a power

module prior to its output becoming active. This often occurs in complex digital systems when current from

another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another

path might be via clamp diodes, sometimes used as part of a dual-supply power-up sequencing arrangement. A

prebias can cause problems with power modules that incorporate synchronous rectifiers. This is because under

most operating conditions, such modules can sink as well as source output current. The 12-V input PTH

modules all incorporate synchronous rectifiers, but will not sink current during startup, or whenever the Inhibit pin

is held low. Startup includes an initial delay (approximately 8 ms–15 ms), followed by the rise of the output

voltage under the control of the module’s internal soft-start mechanism; see Figure 17.

UVLO Threshold

V (5 V/div)

I

V

O

(1 V/div)

Startup

Period

t − Time − 5 ms/div

Figure 17. Startup Waveforms

17

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CONDITIONS FOR PREBIAS HOLDOFF

In order for the module to allow an output prebias voltage to exist (and not sink current), certain conditions must

be maintained. The module holds off a prebias voltage when the Inhibit pin is held low, and whenver the output

is allowed to rise under soft-start control. Power up under soft-start control occurs upon the removal of the

ground signal to the Inhibit pin (with input voltage applied), or when input power is applied with Auto-Track

disabled.^[2]To further ensure that the regulator doesn’t sink output current, (even with a ground signal applied to

its Inhibit), the input voltage must always be greater than the applied prebias source. This condition must exist

throughout the power-up sequence.^[3]

The soft-start period is complete when the output begins rising above the prebias voltage. Once it is complete,

the module functions as normal, and sinks current if voltage higher than the nominal regulation value is applied

to its output.

Note:If a prebias condition is not present, the soft-start period is complete when the output voltage has risen

to either the set-point voltage, or the voltage applied at the module’s Track control pin, whichever is lowest.

DEMONSTRATION CIRCUIT

Figure 18 shows the startup waveforms for the demonstration circuit shown in Figure 19. The initial rise in V_O2 is

the prebias voltage, which is passed from the VCCIO to the VCORE voltage rail through the ASIC. Note that the

output current from the PTH12010L module (I_O2) is negligible until its output voltage rises above the applied

prebias.

V 1 (1 V/div)

O

V 2 (1 V/div)

O

I 2 (5 V/div)

O

t − Time − 10 ms/div

Figure 18. Prebias Startup Waveforms

NOTES

1. Output prebias holdoff is an inherent feature to all PTH120x0L and PTV120x0W/L modules. It has now

been incorporated into all modules (including W-suffix modules with part numbers of the form

PTH120x0W), with a production lot date code of 0423 or later.

2. The prebias start-up feature is not compatible with Auto-Track. If the rise in the output is limited by the

voltage applied to the Track control pin, the output sinks current during the period that the track control

voltage is below that of the back-feeding source. For this reason, it is recommended that Auto-Track be

disabled when not being used. This is accomplished by connecting the Track pin to the input voltage, V_I.

This raises the Track pin voltage well above the set-point voltage prior to the module’s start up, thereby

defeating the Auto-Track feature.

3. To further ensure that the regulator’s output does not sink current when power is first applied (even with a

ground signal applied to the Inhibit control pin), the input voltage must always be greater than the applied

prebias source. This condition must exist throughout the power-up sequence of the power system.

18

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SLTS211F–MAY 2003–REVISED FEBRUARY 2007

10

9

8

5

Up Dn Track

Sense

V_I= 12 V

V_O1 = 3.3 V

2

6

V_I

V_O

PTH12020W

Inhibit

3

GND

1

Adjust

+

C2

330 mF

7

4

+

R1

2 kW

C1

330 mF

10

9

8

5

Track

Sense

V_O2 = 1.8 V

+

2

6

V_O

V_I

PTH12010L

GND

R3

11 k0

Inhibit

3

Vadj

4

TL7702B

8

I_O2

1

7

V_CC

7

SENSE

R2

130 W

5

6

VCCIO

VCORE

RESET

2

1

3

RESIN

REF

+

C3

330 mF

C4

330 mF

RESET

ASIC

CT

GND

4

R4

100 kW

R5

10 k0

C5

0.1 mF

C6

0.68 mF

Figure 19. Application Circuit Demonstrating Prebias Startup

MARGIN UP/DOWN CONTROLS

The PTH12060, PTH12010, PTH12020, and PTH12030 products incorporate Margin Up and Margin Down

control inputs. These controls allow the output voltage to be momentarily adjusted^[1], either up or down, by a

nominal 5%. This provides a convenient method for dynamically testing the operation of the load circuit over its

supply margin or range. It can also be used to verify the function of supply voltage supervisors. The ±5% change

is applied to the adjusted output voltage, as set by the external resistor, R_SETat the V_OAdjust pin.

The 5% adjustment is made by pulling the appropriate margin control input directly to the GND terminal.^[2]

A

low-leakage open-drain device, such as an n-channel MOSFET or p-channel JFET is recommended for this

purpose.^[3]Adjustments of less than 5% can also be accommodated by adding series resistors to the control

inputs. The value of the resistor can be selected from Table 6, or calculated using the following formula.

MARGIN UP/DOWN ADJUST RESISTANCE CALCULATION

To reduce the margin adjustment to a value less than 5%, series resistors are required (See R_Dand R_Uin

Figure 20). For the same amount of adjustment, the resistor value calculated for R_Uand R_Dis the same. The

formula is as follows.

499

- 99.8 kW

R_Uor R_D

=

D %

(2)

Where ∆% = The desired amount of margin adjust in percent.

19

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SLTS211F–MAY 2003–REVISED FEBRUARY 2007

Table 6. Margin Up/Down Resistor Values

% ADJUST

R_U/ R_D

0 kΩ

5

4

3

2

1

24.9 kΩ

66.5 kΩ

150 kΩ

397 kΩ

10

9

8

1

2

7

6

+V_O

0 V

PTH12010W

(Top View)

+V_O

V_I

3

4

5

R_D

R_U

+

R_SET

+

C_I

Margin Down

Margin Up

0.1 W, 1 %

L

C_O

Q1

O

A

D

Q2

GND

Figure 20. Margin Up/Down Application Schematic

MARGIN UP/DOWN NOTES

1. The Margin Up and Margin Down controls were not intended to be activated simultaneously. If they are

their affects on the output voltage may not completely cancel, resulting in the possibility of a slightly

higher error in the output voltage set point.

2. The ground reference should be a direct connection to the module GND at pin 7 (pin 1 for the

PTHxx050). This will produce a more accurate adjustment at the load circuit terminals. The transistors Q1

and Q2 should be located close to the regulator.

3. The Margin Up and Margin Down control inputs are not compatible with devices that source voltage. This

includes TTL logic. These are analog inputs and should only be controlled with a true open-drain device

(preferably discrete MOSFET transistor). The device selected should have low off-state leakage current.

Each input sources 8 µA when grounded, and has an open-circuit voltage of 0.8 V.

20

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TAPE AND REEL SPECIFICATIONS

TRAY SPECIFICATIONS

21

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PACKAGE OPTION ADDENDUM

www.ti.com

26-Feb-2007

PACKAGING INFORMATION

Orderable Device

PTH12030LAH

PTH12030LAS

PTH12030LAST

PTH12030LAZ

PTH12030LAZT

PTH12030WAD

PTH12030WAH

PTH12030WAS

PTH12030WAST

PTH12030WAZ

PTH12030WAZT

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

DIP MOD

ULE

EUM

13

16

Pb-Free

(RoHS)

Call TI

N / A for Pkg Type

DIP MOD

ULE

EUN

EUM

EUN

16

TBD

Level-1-235C-UNLIM

Level-3-260C-168 HR

N / A for Pkg Type

DIP MOD

ULE

200

16

TBD

DIP MOD

ULE

Pb-Free

(RoHS)

DIP MOD

ULE

200

16

Pb-Free

(RoHS)

DIP MOD

ULE

Pb-Free

(RoHS)

DIP MOD

ULE

16

Pb-Free

(RoHS)

N / A for Pkg Type

DIP MOD

ULE

16

TBD

Level-1-235C-UNLIM

Level-3-260C-168 HR

DIP MOD

ULE

200

16

TBD

DIP MOD

ULE

Pb-Free

(RoHS)

DIP MOD

ULE

200

Pb-Free

(RoHS)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

26-Feb-2007

to Customer on an annual basis.

Addendum-Page 2

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,

enhancements, improvements, and other changes to its products and services at any time and to

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent

TI deems necessary to support this warranty. Except where mandated by government requirements, testing

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TI assumes no liability for applications assistance or customer product design. Customers are responsible

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Following are URLs where you can obtain information on other Texas Instruments products and application

solutions:

Products

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DSP

Interface

Applications

Audio

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Military

amplifier.ti.com

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dsp.ti.com

interface.ti.com

logic.ti.com

www.ti.com/audio

www.ti.com/automotive

www.ti.com/broadband

www.ti.com/digitalcontrol

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Logic

Power Mgmt

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Low Power Wireless

power.ti.com

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www.ti.com/wireless

Mailing Address:

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Post Office Box 655303 Dallas, Texas 75265

型号:	PTH12030WAST
生命周期：	Contact Manufacturer
IHS 制造商：	VERTIV CO
Reach Compliance Code：	unknown
ECCN代码：	EAR99
风险等级：	5.19
Is Samacsys：	N
其他特性：	REMOTE SHUTDOWN
模拟集成电路 - 其他类型：	DC-DC REGULATED POWER SUPPLY MODULE
认证：	CB, CSA, EN, IEC, TUV, UL
效率（主输出）：	94.5%
高度：	9 mm
最大输入电压：	13.2 V
最小输入电压：	10.8 V
标称输入电压：	12 V
JESD-30 代码：	R-XQMA-X13
JESD-609代码：	e0
长度：	34.8 mm
功能数量：	1
输出次数：	1
端子数量：	13
最高工作温度：	85 °C
最低工作温度：	-40 °C
最大输出电流：	26 A
最大输出电压：	5.5 V
最小输出电压：	1.2 V
封装主体材料：	UNSPECIFIED
封装形状：	RECTANGULAR
封装形式：	MICROELECTRONIC ASSEMBLY
峰值回流温度（摄氏度）：	NOT SPECIFIED
认证状态：	Not Qualified
纹波电压（主输出）：	0.00884 Vrms
子类别：	Power Supply Modules
表面贴装：	NO
技术：	HYBRID
端子面层：	TIN LEAD
端子形式：	UNSPECIFIED
端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED
最大总功率输出：	143 W
微调/可调输出：	YES
宽度：	28.45 mm
Base Number Matches：	1

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