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    产品型号QS5100的Datasheet PDF文件预览

    QS5100  
    Digital FX LSI  
    1. General Description  
    2. Features  
    The QS5100 is a high quality Effect processor LSI that can  
    produce the effects of reverb, chorus, echo, vibrato, tremolo,  
    wahwah, and flanger with a 5 band-equalizer.  
    • High resolution of up to 32k ~ 48kHz sampling rate  
    • Supports 8 bit MCU or Serial EEPROM interface for  
    stand alone mode.  
    • 5 band EQ on digital output  
    All functions can be controlled by an external 8bit MCU, making  
    it possible for the QS5100 to be applied to a wide variety of  
    applications.  
    • Supports 256k words EDO DRAM for delay.  
    • Low power operation 2.7V ~ 3.6V  
    • Support for 16/18/20/22/24 bits Codec I/F  
    • Supports reverb, chorus, echo, wah wah, flanger,  
    tremolo, vibrato  
    Making the QS5100 the best solution for external guitar  
    effectors, car audio, PA and hardware effect modules.  
    • Compact thin package 64 LQFP (10 X 10mm)  
    • f = 8.192 ~ 12.288 MHz  
    • Low power consumption under 10uA  
    in power down mode  
    • IDDOP < 50 mA  
    • Can be assign CODEC I/F (Left or Right Justified)  
    1
    2
    3
    4
    5
    6
    7
    48  
    47  
    46  
    45  
    44  
    43  
    42  
    41  
    40  
    39  
    QS5100  
    Datecode KOREA  
    8
    9
    10  
    11  
    12  
    13  
    14  
    15  
    16  
    38  
    37  
    36  
    35  
    34  
    33  
    64P LQFP  
    10 X 10mm 0.5 pitch  
    QS5100  
    Digital FX LSI  
    3. Pin Description  
    PIN NO  
    P1  
    PAD NAME  
    PAD TYPE  
    PC3B03U  
    I/O  
    DESCRIPTION  
    CPU_DATA[0]  
    I/O CPU Data I/O for Normal Mode.  
    Serial EEPROM Data I/O for Stand Alone Mode.  
    P2  
    P3  
    P4  
    P5  
    P6  
    CPU_DATA[1]  
    CPU_DATA[2]  
    CPU_DATA[3]  
    CPU_DATA[4]  
    CPU_DATA[5]  
    PC3B03U  
    PC3B03U  
    PC3B03U  
    PC3B03U  
    PC3B03U  
    I/O CPU Data I/O for Normal Mode.  
    Serial EEPROM Clock for Stand Alone Mode.  
    I/O CPU Data I/O for Normal Mode.  
    Set[0] for Stand Alone Mode.  
    I/O CPU Data I/O for Normal Mode.  
    Set[1] for Stand Alone Mode.  
    I/O CPU Data I/O for Normal Mode.  
    Set[2] for Stand Alone Mode.  
    I/O CPU Data I/O for Normal Mode.  
    Set[3] for Stand Alone Mode.  
    P7  
    P8  
    P9  
    VDD  
    VSS  
    PVDF  
    PV0F  
    P
    P
    Power  
    Ground  
    CPU_DATA[6]  
    PC3B03U  
    I/O CPU Data I/O for Normal Mode.  
    Set[4] for Stand Alone Mode.  
    P10  
    P11  
    CPU_DATA[7]  
    CPU_REB  
    PC3B03U  
    PC3B03U  
    I/O CPU Data I/O for Normal Mode.  
    Set[5] for Stand Alone Mode.  
    I/O Data Read Enable for Normal Mode.  
    Used for external data read operation,  
    functions on active low.  
    First Serial Peripheral Interface CS for Stand  
    Alone Mode.  
    P12  
    P13  
    CPU_WEB  
    CPU_AB0  
    PC3B03U  
    PC3B03U  
    I/O Data Write Enable for Normal Mode.  
    Used for external data write operation,  
    functions on active low.  
    First Serial Peripheral Interface Clock for Stand  
    Alone Mode.  
    I/O Address Data Select for Normal Mode.  
    Used to distinguish between Address and Data.  
    Low for Address, High for Data.  
    First Serial Peripheral Interface Data for Stand  
    Alone Mode  
    P14  
    P15  
    CSB  
    PC3D21  
    I
    QS5100 Chip Select.  
    Data Read/Write operation possible when ‘0’.  
    Cannot when ‘1’.  
    IRQB  
    PC3B03U  
    I/O CPU Interrrupt for Normal Mode.  
    Second Serial Peripheral Interface CS for Stand  
    Alone Mode.  
    P16  
    P17  
    P18  
    SPI2_CLK  
    SPI2_OUT  
    MODE0  
    PC3B03U  
    PC3B03U  
    PC3D21  
    I/O Second Serial Peripheral Interface Clock for  
    Stand Alone Mode.  
    I/O Second Serial Peripheral Interface Data for  
    Stand Alone Mode.  
    I
    I
    I
    System Clock Mode  
    2X clock is used in System Clock when ‘0’, 1X  
    clock when ‘1’  
    P19  
    P20  
    MODE1  
    MODE2  
    PC3D21  
    PC3D21  
    System Select Mode  
    Normal Mode when ‘0’, Stand Alone Mode when  
    ‘1’  
    Clock 2X Test Mode  
    Normal mode when ‘0’, Clock 2X test mode  
    when ‘1’  
    QS5100  
    Digital FX LSI  
    PIN NO  
    PAD NAME  
    MRSTB  
    PAD TYPE  
    PC3D21U  
    I/O  
    I
    DESCRIPTION  
    P21  
    Master Reset  
    Operates on active low.  
    P22  
    P23  
    P24  
    P25  
    P26  
    P27  
    P28  
    P29  
    P30  
    P31  
    P32  
    P33  
    P34  
    P35  
    P36  
    P37  
    P38  
    P39  
    P40  
    P41  
    P42  
    P43  
    P44  
    P45  
    P46  
    P47  
    P48  
    P49  
    P50  
    P51  
    P52  
    P53  
    P54  
    P55  
    XOUT  
    PC3X11  
    PC3X11  
    PVDF  
    O
    I
    Crystal Output  
    XIN  
    Crystal Input ( f = 8.192 ~ 12.288 Mhz )  
    Power  
    VDD  
    P
    VSS  
    PV0F  
    P
    Ground  
    SIN  
    PC3D21  
    PC3O03  
    PC3O03  
    PC3O03  
    PC3O03  
    PC3O03  
    PC3O03  
    PC3O03  
    PC3O03  
    PC3O03  
    PC3O03  
    PC3O03  
    PC3O03  
    PVDF  
    I
    Serial Data Input  
    MCLK  
    O
    Serial Data System Clock  
    Serial Data Sample Rate Clock  
    Serial Data Bit Clock  
    Serial Data Output  
    WCLK  
    O
    BCLK  
    O
    SOUT  
    O
    DRAM_ADDR[4]  
    DRAM_ADDR[5]  
    DRAM_ADDR[6]  
    DRAM_ADDR[7]  
    DRAM_ADDR[8]  
    DRAM_OEB  
    DRAM_UCASB  
    DRAM_LCASB  
    VDD  
    O
    DRAM Address  
    O
    DRAM Address  
    O
    DRAM Address  
    O
    DRAM Address  
    O
    DRAM Address  
    O
    DRAM Output Enable  
    DRAM Upper Column Address Strobe  
    DRAM Lower Column Address Strobe  
    Power  
    O
    O
    P
    VSS  
    PV0F  
    P
    Ground  
    DRAM_ADDR[3]  
    DRAM_ADDR[2]  
    DRAM_ADDR[1]  
    DRAM_ADDR[0]  
    DRAM_RASB  
    DRAM_WEB  
    DRAM_DATA[3]  
    DRAM_DATA[2]  
    DRAM_DATA[1]  
    DRAM_DATA[0]  
    DRAM_DATA[4]  
    DRAM_DATA[5]  
    DRAM_DATA[6]  
    DRAM_DATA[7]  
    DRAM_DATA[8]  
    PC3O03  
    PC3O03  
    PC3O03  
    PC3O03  
    PC3O03  
    PC3O03  
    PC3B03U  
    PC3B03U  
    PC3B03U  
    PC3B03U  
    PC3B03U  
    PC3B03U  
    PC3B03U  
    PC3B03U  
    PC3B03U  
    O
    DRAM Address  
    O
    DRAM Address  
    O
    DRAM Address  
    O
    DRAM Address  
    O
    DRAM Row Address strobe  
    DRAM Write Enable  
    DRAM Data Inputs/Outputs  
    DRAM Data Inputs/Outputs  
    DRAM Data Inputs/Outputs  
    DRAM Data Inputs/Outputs  
    DRAM Data Inputs/Outputs  
    DRAM Data Inputs/Outputs  
    DRAM Data Inputs/Outputs  
    DRAM Data Inputs/Outputs  
    DRAM Data Inputs/Outputs  
    O
    I/O  
    I/O  
    I/O  
    I/O  
    I/O  
    I/O  
    I/O  
    I/O  
    I/O  
    QS5100  
    Digital FX LSI  
    PIN NO  
    PAD NAME  
    VDD  
    PAD TYPE  
    PVDF  
    I/O  
    P
    DESCRIPTION  
    P56  
    P57  
    P58  
    P59  
    P60  
    P61  
    P62  
    P63  
    P64  
    Power  
    VSS  
    PV0F  
    P
    Ground  
    DRAM_DATA[9]  
    DRAM_DATA[10]  
    DRAM_DATA[11]  
    DRAM_DATA[15]  
    DRAM_DATA[14]  
    DRAM_DATA[13]  
    DRAM_DATA[12]  
    PC3B03U  
    PC3B03U  
    PC3B03U  
    PC3B03U  
    PC3B03U  
    PC3B03U  
    PC3B03U  
    I/O  
    I/O  
    I/O  
    I/O  
    I/O  
    I/O  
    I/O  
    DRAM Data Inputs/Outputs  
    DRAM Data Inputs/Outputs  
    DRAM Data Inputs/Outputs  
    DRAM Data Inputs/Outputs  
    DRAM Data Inputs/Outputs  
    DRAM Data Inputs/Outputs  
    DRAM Data Inputs/Outputs  
    QS5100  
    Digital FX LSI  
    4. Block Diagram  
    DRAM I/F  
    FX DSP  
    CPU_DATA[0~7]  
    CPU_RDB  
    SOUT  
    CPU_WRB  
    CSB  
    SIN  
    MCLK  
    BCLK  
    WCLK  
    CPU_AB0  
    IRQB  
    EIL  
    TIL  
    TIR  
    CIL  
    RIL  
    RIR  
    EIR  
    FIL  
    FIR  
    CIR  
    WIL  
    WIR  
    ROR  
    Lin  
    Rin  
    Flanger  
    Reverb  
    ROL  
    Echo  
    Wah  
    Tremolo  
    Chorus  
    FO  
    TO  
    CO  
    WO  
    EOL  
    /EOR  
    BOR  
    RSOR  
    CSOR  
    WSOR  
    TSOR  
    FSOR  
    BOL  
    WSOL  
    TSOL  
    FSOL  
    CSOL  
    RSOL  
    EQOL  
    Data out  
    EQ  
    EQOR  
    QS5100  
    Digital FX LSI  
    5. Application  
    5-1. Typical Hardware Configuration  
    5-1-1. Using with CODEC Interface  
    C_DATA[0..7]  
    BCLK  
    SIN  
    ROUT  
    LOUT  
    16/18/  
    20/22/  
    24 bits  
    8bit  
    MICOM  
    AUDIO OUT  
    Pre-  
    AMP  
    WCLK  
    SOUT  
    MCLK  
    QS5100  
    CODEC  
    ATMEGA-8L  
    or  
    LINE_IN  
    Serial ROM  
    &
    Select S/W  
    11.2896 MHz  
    5-2. Recommended System Reset Circuit and Clock circuit  
    3.3V  
    20pF  
    XIN  
    KIA7027  
    10K  
    MRSTB  
    1
    2
    VCC  
    GND  
    1M  
    11.2896 MHz  
    20pF  
    3
    OUT  
    XOUT  
    +
    47  
    1uF  
    * KIA7027 is Voltage Detector made by KEC  
    QS5100  
    Digital FX LSI  
    6. Electrical Characteristics  
    6-1. DC Characteristics  
    Absolute Maximum range  
    ITEMS  
    Symbol  
    Min  
    2.7  
    Max  
    3.6  
    Unit  
    V
    Note  
    VDD terminal power supply  
    voltage  
    VDD  
    Operating ambient temperature  
    Carrier temperature  
    TAOP  
    TCA  
    -20  
    -40  
    85  
    °C  
    °C  
    Industrial  
    125  
    Recommended operating condition  
    ITEMS  
    Symbol  
    Min  
    2.7  
    Max  
    3.6  
    Unit  
    V
    VDD terminal power supply voltage  
    Digital input voltage  
    VDD  
    VIND  
    TAOP  
    TACA  
    -0.3  
    0
    VDD+0.3  
    70  
    V
    Operating ambient temperature  
    Carrier temperature  
    °C  
    °C  
    -20  
    125  
    DC Characteristics  
    ITEMS  
    Symbol  
    Min  
    Typ  
    Max  
    Unit  
    INPUT Voltage “H” Level  
    VIH  
    VDD*0.7  
    VDD + 0.5V  
    VDD*0.3  
    V
    INPUT Voltage “L” Level  
    OUTPUT Voltage “H” Level  
    OUTPUT Voltage “L” Level  
    Input Leakage current  
    Input capacity  
    VIL  
    VOH  
    VOL  
    IL  
    -0.5V  
    V
    V
    VDD - 0.1V  
    VSS + 0.1V  
    1000  
    V
    1
    uA  
    pF  
    CI  
    10  
    QS5100  
    Digital FX LSI  
    6-2. AC Characteristics  
    모든 Timing Condition은 내부 System Clock이 24MHz (출력 Sample Frequency는 48 KHz)로 동작한  
    다고 가정하였다.  
    6-2-1. External CPU Interface Timing  
    6-2-1-1. READ Operation  
    tRC  
    CSB  
    tACC  
    tCS  
    CPU AB0  
    tAS  
    tCH  
    CPU WEB  
    CPU REB  
    tWP  
    tWR  
    tDS  
    tDH  
    tOH  
    tRE  
    Valid Address  
    Valid Data  
    CPU DATA  
    ITEM  
    SYMBOL  
    MIN  
    136  
    TYP  
    MAX  
    UNIT  
    Read Cycle Time  
    tRC  
    tACC  
    tCS  
    tCH  
    tAS  
    ns  
    ns  
    ns  
    ns  
    ns  
    ns  
    ns  
    ns  
    Access Time from AB0  
    113  
    Chip Enable Setup Time  
    Chip Enable Hold Time  
    AB0 Setup Time  
    0
    0
    0
    Write Pulse Width  
    tWP  
    tWR  
    tDS  
    42  
    85  
    5
    Write Enable to Read Enable Delay  
    Data Setup Time  
    Data Hold Time  
    tDH  
    tRE  
    tOH  
    0
    5
    5
    ns  
    ns  
    ns  
    Read Enable to Data setup time  
    Hold Time from rising edge of CPU_RDB  
    QS5100  
    Digital FX LSI  
    6-2-1-2. WRITE Operation  
    tWC  
    CSB  
    tCH  
    tCS  
    CPU AB0  
    tAS  
    tAH  
    tAW  
    tAP  
    CPU WEB  
    tDS  
    tWP  
    tDH  
    Valid Address  
    Valid Data  
    CPU DATA  
    ITEM  
    SYMBOL  
    MIN  
    TYP  
    MAX  
    UNIT  
    Write Cycle Time  
    tWC  
    tCS  
    tCH  
    tAS  
    tAH  
    tWP  
    tAW  
    tAP  
    tDS  
    tDH  
    173  
    0
    ns  
    ns  
    ns  
    ns  
    ns  
    ns  
    ns  
    Ns  
    ns  
    ns  
    Chip Enable Setup Time  
    Chip Enable Hold Time  
    AB0 Setup Time  
    0
    0
    AB0 Hold Time  
    0
    Write Pulse Width  
    42  
    42  
    42  
    5
    AB0 High to Write Enable Delay  
    AB0 Preset Time  
    Data Setup Time  
    Data Hold Time  
    0
    QS5100  
    Digital FX LSI  
    6-2-2. CODEC Interface Timing  
    6-2-2-1. Clock Characteristics  
    ITEM  
    Left/Right Clock Input  
    Bit Clock Input  
    SYMBOL  
    WCLK  
    BCLK  
    MIN  
    32  
    TYP  
    MAX  
    UNIT  
    KHz  
    48  
    2.048  
    3.072  
    MHz  
    6-2-2-2. CODEC Interface Timing in Mode0 (DAC: MSB-First, Right Justified)  
    Right Channel  
    WCLK  
    BCLK  
    DOUT  
    Left Channel  
    32Bits  
    32Bits  
    MSB  
    Sign  
    LSB  
    Sign  
    MSB  
    LSB  
    Extension  
    Extension  
    6-2-2-3. CODEC Interface Timing in Mode1 (DAC: MSB-First, Left Justified)  
    Right Channel  
    WCLK  
    Left Channel  
    BCLK  
    DOUT  
    32Bits  
    LSB  
    32Bits  
    LSB  
    MSB  
    Zero  
    MSB  
    Zero  
    QS5100  
    Digital FX LSI  
    6-2-2-3. CODEC Interface Timing in Mode0/1 (ADC: MSB-First, Left Justified)  
    Right Channel  
    WCLK  
    Left Channel  
    BCLK  
    DIN  
    32Bits  
    LSB  
    32Bits  
    LSB  
    MSB  
    Zero  
    MSB  
    Zero  
    6-2-2-4. CODEC Interface Timing in Mode2 (DAC/ADC: MSB-First, I2S)  
    Right Channel  
    WCLK  
    Left Channel  
    BCLK  
    32Bits  
    32Bits  
    DIN/DOUT  
    1bit Zero MSB  
    LSB Zero 1bit Zero MSB  
    LSB Zero  
    QS5100  
    Digital FX LSI  
    6-3. Power Consumption  
    Xin = 11.2896 MHz  
    Items  
    Symbol  
    ICCST/ ICCOP  
    ICCPD  
    3.0V  
    45  
    3.3V  
    50  
    Unit  
    mA  
    uA  
    Standby IDD & Operating  
    Power Down Mode  
    Max 10  
    7. Pa
    QS5100  
    Digital FX LSI  
    A. APPENDIX  
    A-1. DFX Module Solution  
    A-1-1. DFX Module Overview  
    DFX-MA4  
    DFX-MA16  
    Digital FX Presets  
    4 Presets  
    16 Presets  
    Rotary Encoder, Gray Encoder  
    ADJUST Control  
    Rotary Linear Volume  
    Level Control  
    DSP arithmetic  
    Ext.DRAM  
    FX Level, Reverb Level  
    24bit  
    MAX 256KWORD  
    AD Converter  
    AK4554VT(AK)  
    DA Converter  
    S/N(A-weight)  
    90dB  
    90dB  
    Dynamic range  
    Frequency passband  
    Sampling Frequency  
    Max.Input voltage  
    Max.Output voltage  
    Input Impedance  
    Analog Input  
    20Hz ~ 20KHz  
    32 ~ 48KHz  
    1 Vrms (Normal 300mVrms)  
    1 Vrms  
    12KOhm  
    Mono/Stereo  
    Stereo  
    Analog Output  
    Power Supply  
    DC 5V  
    Power Consumption  
    160mA ( DC IN = 9V,VDD =3.6V Fs = 48Khz )  
    1. Delay; Delay Time  
    1 Vibratone  
    9 Fast Chorus  
    1
    0
    2. Chorus: Speed  
    3. Flange: Speed  
    4. Reverb; Volume  
    2 Delay - 150ms  
    Deep Chorus  
    1
    1
    3 Delay - 300ms  
    4 Delay - 500ms  
    5 Reverb – Room  
    6 Reverb – Hall  
    Chorus + Delay  
    Chorus + Reverb  
    Flange 1 (Fast)  
    Flange 2 (Slow)  
    Flange + Reverb  
    1
    2
    1
    3
    1
    4
    1
    5
    7 Reverb – Spring  
    1 Flange + Chorus +  
    6 Delay + Reverb  
    8 Reverb + Delay2  
    50 x 45mm  
    Dimensions  
    *A-1 preliminary rev 1.1 – module specs may change without notice!  
    QS5100  
    Digital FX LSI  
    A-1-2. Pin Descriptions  
    MA4  
    MA16  
    Part_Name/ Pin_No  
    PIN NAME  
    VCC + 5V  
    FUNCTION  
    FUNCTION  
    PIN1  
    PIN2  
    PIN3  
    +5V POWER SUPPLY  
    AGND  
    ANALOG GROUND  
    AUX IN1  
    AUDIO INPUT,SINGLE ENDED MODE  
    PIN4  
    PIN5  
    PIN6  
    AUX IN2  
    AGND  
    AUDIO INPUT,SINGLE ENDED MODE  
    ANALOG GROUND  
    AUX OUT1  
    AUDIO OUTPUT,SINGLE ENDED MODE  
    J2  
    PIN7  
    AUX OUT1  
    3.6VREF  
    AUDIO OUTPUT,SINGLE ENDED MODE  
    CONTROL PORT REFERENCE  
    VOLTAGE OUT, 3.6V  
    PIN8  
    PIN9  
    FX MODE  
    FX LEVEL  
    REV LEVEL  
    N.C  
    FX MODE CONTROL  
    FX VOLUME  
    PIN10  
    PIN11  
    PIN12  
    N.C ( Control Port /ADC IN )  
    REVERB LEVEL  
    PIN1  
    PIN2  
    SCK  
    SPI BUS MASTER CLOCK INPUT  
    MISO  
    SPI BUS MASTER INPUT  
    SPI BUS MASTER OUTPUT  
    PIN3  
    J1  
    MOSI  
    PIN4  
    NC  
    PIN5  
    PIN6  
    PIN1  
    PIN2  
    RESETB  
    GND  
    SPI RESET  
    Ground  
    GPIO5/RXD  
    GPIO6/TXD  
    Reserve Control Port/USART INPUT  
    Reserve Control Port/USART OUTPUT  
    PIN3  
    GPIO7/ADC_IN6  
    Reserve Control Port/ADC IN  
    J3  
    PIN4  
    PIN5  
    PIN6  
    GPIO8/ADC_IN7  
    GPIO9/ADC_IN8  
    GND  
    Reserve Control Port/ADC IN  
    Reserve Control Port/ADC IN  
    Ground  
    *A-1-2 preliminary rev 1.1 – module specs may change without notice!  
    QS5100  
    Digital FX LSI  
    A-1-3 DFX Module Application Schematic (DFX MA4 Type)  
    *A-1-3 preliminary rev 1.1 – module specs may change without notice!  
    QS5100  
    Digital FX LSI  
    A-1-4 DFX Module Application Schematic (DFX MA16 Type)  
    *A-1-4 preliminary rev 1.1 – module specs may change without notice!  
    QS5100  
    Digital FX LSI  
    A-1-5 MA16 Module Dimension  
    A-2. Revision History  
    Date  
    Description  
    2005/8/15  
    First edition  
    2006/3/6  
    Rev 1.1: Appendix A-1  
    2006/4/13  
    Changed 6-3 and Added to A-1-5 MA16 module dimension (Ver 1.2)  
    配单直通车
    QS51AC11-85.000MHZ产品参数
    型号:QS51AC11-85.000MHZ
    是否Rohs认证： 符合
    生命周期：Active
    包装说明：GWDIP4/8,.5
    Reach Compliance Code：compliant
    风险等级：5.71
    其他特性：FOAM PACK; TUBE
    最长下降时间：3 ns
    频率调整-机械：NO
    频率稳定性：50%
    JESD-609代码：e0
    安装特点：SURFACE MOUNT
    端子数量：4
    最大工作频率：85 MHz
    最小工作频率：1e-8 MHz
    标称工作频率：85 MHz
    最高工作温度：85 °C
    最低工作温度：-40 °C
    振荡器类型：ACMOS
    输出负载：10 KOHM, 15 pF
    封装主体材料：METAL
    封装等效代码：GWDIP4/8,.5
    物理尺寸：12.83mm x 12.83mm x 7.366mm
    电源：5 V
    认证状态：Not Qualified
    最长上升时间：3 ns
    子类别：Other Oscillators
    最大压摆率：55 mA
    最大供电电压：5.5 V
    最小供电电压：4.5 V
    标称供电电压：5 V
    表面贴装：YES
    最大对称度：40/60 %
    技术：CMOS
    端子面层：Tin/Lead (Sn60Pb40)
    Base Number Matches：1
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