REF5025SKGD1全新原装原理图各脚功能电路原理芯片引脚定义-中国IC网-芯三七

产品型号REF5025SKGD1的Datasheet PDF文件预览

REF5025-HT

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SBOS502D –SEPTEMBER 2009–REVISED APRIL 2012

LOW NOISE, VERY LOW DRIFT, PRECISION VOLTAGE REFERENCE

Check for Samples: REF5025-HT

FEATURES

HKJ PACKAGE

(TOP VIEW)

•

Low Temperature Drift: 40 ppm/°C

Low Noise: 3 μV_PP/V

DNC

V_IN

DNC

High Output Current: ±7 mA

V_OUT

TEMP

GND

APPLICATIONS

TRIM/NR

•

Down-Hole Drilling

DNC = Do not connect

NC = No internal connection

High Temperature Environments

SUPPORTS EXTREME TEMPERATURE

APPLICATIONS

HKQ PACKAGE

(TOP VIEW)

•

Controlled Baseline

One Assembly/Test Site

One Fabrication Site

DNC

V_IN

Available in Extreme (–55°C/210°C)

Temperature Range⁽¹⁾

V_OUT

TEMP

GND

TRIM/NR

•

Extended Product Life Cycle

Extended Product-Change Notification

Product Traceability

HKQ as formed or HKJ mounted dead bug

Texas Instruments high temperature products

utilize highly optimized silicon (die) solutions

with design and process enhancements to

maximize performance over extended

temperatures.

(1) Custom temperature ranges available

DESCRIPTION

The REF5025 is a low-noise, low-drift, very high precision voltage reference. This reference is capable of both

sinking and sourcing, and is very robust with regard to line and load changes.

Temperature drift (40 ppm/°C) from –55°C to 210°C is achieved using proprietary design techniques. These

features combined with very low noise make the REF5025 ideal for use in down-hole drilling applications.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

REF5025-HT

SBOS502D –SEPTEMBER 2009–REVISED APRIL 2012

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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

BARE DIE INFORMATION

BACKSIDE

POTENTIAL

BOND PAD

METALLIZATION COMPOSITION

BOND PAD

THICKNESS

DIE THICKNESS

BACKSIDE FINISH

15 mils.

Silicon with backgrind

GND

Al-Cu (0.5%)

598 nm

2040 mm

38 mm

0.0

38 mm

0.0

Table 1. Bond Pad Coordinates in Microns

DISCRIPTION

PAD NUMBER

X min

35.45

Y min

46.55

X max

111.45

572.75

683.45

1013.9

1736.1

1847.05

2016.8

1980.65

1858.15

1219.9

956.25

111.45

Y max

122.55

132.55

115.4

496.75

607.45

937.9

56.55

VIN

56.55

39.4

TEMP

GND

TRIM/NR

1660.1

1770.9

1877.1

1904.65

1782.15

1080.2

880.25

35.45

47.2

123.2

38.85

115

59.6

135.6

1553.4

1559.85

1543.55

1553.45

1629.4

1636

VOUT

1619.55

1629.45

ORDERING INFORMATION⁽¹⁾

ORDERABLE PART NUMBER

REF5025SKGD1

T_A

PACKAGE

KGD (bare die)

HKJ

TOP-SIDE MARKING

–55°C to 210°C

REF5025SHKJ

REF5025SHKQ

HKQ

REF5025SHKQ

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

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REF5025-HT

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SBOS502D –SEPTEMBER 2009–REVISED APRIL 2012

ABSOLUTE MAXIMUM RATINGS⁽¹⁾

UNIT

Input Voltage

°C

Output Short-Circuit

Operating Temperature Range

Storage Temperature Range

Junction Temperature (T_Jmax)

–55 to 210

–65 to 210

210

Human Body Model (HBM)

ESD Rating

3000

Charged Device Model (CDM)

1000

(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may

degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond

those specified is not implied.

THERMAL CHARACTERISTICS FOR HKJ OR HKQ PACKAGE

over operating free-air temperature range (unless otherwise noted)

PARAMETER

to ceramic side of case

to top of case lid (metal side of case)

MIN

TYP

MAX

5.7

UNIT

θ_JC

Junction-to-case thermal resistance

°C/W

13.7

ELECTRICAL CHARACTERISTICS

T_A= 25°C, I_LOAD= 0, C_L= 1 μF, V_IN= 3.25 V to 18 V (unless otherwise noted).

T_A= –55 to 125°C

T_A= 210°C

TYP MAX

PARAMETER

CONDITIONS

UNIT

MIN

TYP

MAX

MIN

OUTPUT VOLTAGE (2.5 V)

Output voltage

Initial accuracy⁽¹⁾

NOISE

V_OUT

2.5

V_IN= 3.25 V

0.9

0.14

Output voltage noise

OUTPUT VOLTAGE

f = 0.1 Hz to 10 Hz

7.5

μV_PP

TEMPERATURE DRIFT

Output voltage

Calculated from

–55°C to 210°C

dV_OUT/dT

ppm/°C

temperature drift⁽²⁾

LINE REGULATION

Line regulation

dV_OUT/dV_IN

From V_IN= 3.25 V to V_IN= 18 V

–7 mA < I_LOAD< 10 mA, V_IN= 3.25 V

V_OUT= 0 V

2.2

215

ppm/V

ppm/mA

LOAD REGULATION

Load regulation

dV_OUT/dI_LOAD

SHORT-CIRCUIT CURRENT

Short-circuit current

TEMP PIN

I_SC

Voltage output

At T_A= 25°C

575

Temperature sensitivity⁽³⁾

TURN-ON SETTLING TIME

Turn-on settling time

2.64

mV/°C

To 0.1% with C_L= 1 μF

200

0.8

μs

POWER SUPPLY

Supply voltage

V_S

3.25

Quiescent current

1.2

1.5

TEMPERATURE RANGE

Specified range

–55°C to 210°C

Operating range

(1) Refer to Figure 5 of the TYPICAL CHARACTERISTICS.

(2) Refer to Figure 4 of the TYPICAL CHARACTERISTICS.

(3) Refer to Figure 10 of the TYPICAL CHARACTERISTICS.

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REF5025-HT

SBOS502D –SEPTEMBER 2009–REVISED APRIL 2012

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1000000

100000

10000

1000

Electromigration Fail Mode

110

130

150

170

190

210

230

Continous T_J(°C)

Figure 1. REF5025SKGD1 Operating Life Derating Chart

Notes:

1. See datasheet for Absolute Maximum and minimum Recommended Operating Conditions.

2. Silicon operating life design goal is 10 years at 105°C junction temperature ( does not include package

interconnect life).

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REF5025-HT

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SBOS502D –SEPTEMBER 2009–REVISED APRIL 2012

TYPICAL CHARACTERISTICS

T_A= 25°C, I_LOAD= 0, V_S= 3.25 V (unless otherwise noted).

TEMPERATURE DRIFT

(–40°C to 125°C)

(0°C to 85°C)

Drift (ppm/°C)

Figure 2.

Figure 3.

OUTPUT VOLTAGE

INITIAL ACCURACY

(AT 210°C)

TEMPERATURE DRIFT

(–55°C to 210°C)

OutputInitialAccuracy(%)

Drift (ppm/°C)

Figure 4.

Figure 5.

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REF5025-HT

SBOS502D –SEPTEMBER 2009–REVISED APRIL 2012

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TYPICAL CHARACTERISTICS (continued)

T_A= 25°C, I_LOAD= 0, V_S= 3.25 V (unless otherwise noted).

OUTPUT VOLTAGE ACCURACY

POWER-SUPPLY REJECTION RATIO

TEMPERATURE

FREQUENCY

160

140

120

100

0.5

0.4

0.3

0.2

0.1

-0.1

-0.2

-55

125

180

210

Temperature (°C)

100

10k

100k

Frequency (Hz)

Figure 6.

Figure 7.

OUTPUT VOLTAGE

DROPOUT VOLTAGE

LOAD CURRENT

2.514

2.512

2.51

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

+125°C

55°C

25°C

+25°C

-40°C

2.508

2.506

2.504

2.502

2.5

210°C

2.498

2.496

2.494

-15

-10

-5

-10

-5

Load Current (mA)

Figure 8.

Figure 9.

TEMP PIN OUTPUT VOLTAGE

QUIESCENT CURRENT

TEMPERATURE

1.1

1200

1100

1000

900

0.9

0.8

0.7

0.6

0.5

0.4

0.3

800

700

600

-75 -50 -25

25 50 75 100 125 150 175 200 225

-75 -50 -25

25 50 75 100 125 150 175 200 225

Temperature (°C)

Figure 10.

Figure 11.

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REF5025-HT

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SBOS502D –SEPTEMBER 2009–REVISED APRIL 2012

TYPICAL CHARACTERISTICS (continued)

T_A= 25°C, I_LOAD= 0, V_S= 3.25 V (unless otherwise noted).

QUIESCENT CURRENT

LINE REGULATION

INPUT VOLTAGE

TEMPERATURE

1400

1300

210°C

1200

1100

1000

900

25°C

800

–55°C

700

-10

600

-75 -50 -25

25 50 75 100 125 150 175 200 225

10 11 12 13 14 15 16 17 18

V_IN(V)

Temperature (°C)

Figure 12.

Figure 13.

NOISE

SHORT-CIRCUIT CURRENT

TEMPERATURE

Sourcing

Sinking

-75 -50 -25

75 100 125 150 175 200

1s/div

Temperature (°C)

Figure 14.

Figure 15.

STARTUP

(REF5025, C_L= 1 μF)

(REF5025, C_L= 10 μF)

V_IN

5V/div

V_IN

2V/div

1V/div

V_OUT

1V/div

40ms/div

400ms/div

Figure 16.

Figure 17.

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REF5025-HT

SBOS502D –SEPTEMBER 2009–REVISED APRIL 2012

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TYPICAL CHARACTERISTICS (continued)

T_A= 25°C, I_LOAD= 0, V_S= 3.25 V (unless otherwise noted).

LOAD TRANSIENT

(C_L= 1 μF, I_OUT= 1 mA)

(C_L= 1 μF, I_OUT= 10 mA)

I_LOAD

+1mA

+10mA

I_LOAD

10mA/div

-1mA

1mA/div

5mV/div

-10mA

V_OUT

2mV/div

20ms/div

Figure 18.

Figure 19.

LOAD TRANSIENT

(C_L= 10 μF, I_OUT= 1 mA)

(C_L= 10 μF, I_OUT= 10 mA)

I_LOAD

+1mA

+10mA

I_LOAD

-10mA

10mA/div

2mV/div

-1mA

1mA/div

5mV/div

V_OUT

100ms/div

Figure 20.

Figure 21.

LINE TRANSIENT

(C_L= 1 μF)

(C_L= 10 μF)

V_IN

500mV/div

V_IN

500mV/div

5mV/div

V_OUT

5mV/div

V_OUT

20ms/div

100ms/div

Figure 22.

Figure 23.

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REF5025-HT

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SBOS502D –SEPTEMBER 2009–REVISED APRIL 2012

APPLICATION INFORMATION

The REF5025 is a low-noise, precision bandgap

voltage reference that is specifically designed for

excellent initial voltage accuracy and drift. Figure 24

shows a simplified block diagram of the REF5025.

USING THE TRIM/NR PIN

The REF5025 provides a very accurate voltage

output. However, V_OUTcan be adjusted to reduce

noise and shift the output voltage from the nominal

value by configuring the trim and noise reduction pin

(TRIM/NR, pin 5). The TRIM/NR pin provides a ±15-

mV adjustment of the device bandgap, which

V_IN

REF5025

produces

a ±15-mV change on the V_OUTpin.

Figure 26 shows a typical circuit using the TRIM/NR

pin to adjust V_OUT. When using this technique, the

temperature coefficients of the resistors can degrade

the temperature drift at the output.

(10mA

at +25°C)

V_OUT

TEMP

10kW

1.2V

+V_SUPPLY

TRIM/NR

1kW

REF5025

60kW

DNC

V_IN

DNC

V_OUT

TEMP

GND

GND TRIM/NR

10kW

1kW

470W

Figure 24. REF5025 Simplified Block Diagram

BASIC CONNECTIONS

Figure 25 shows the typical connections for the

Figure 26. V_OUTAdjustment Using TRIM/NR Pin

REF5025.

supply bypass capacitor ranging

between 1 μF to 10 μF is recommended. A 1-μF to

50-μF, low-ESR output capacitor (C_L) must be

connected from V_OUTto GND. The ESR value should

be less than or equal to 1.5 Ω. The ESR minimizes

gain peaking of the internal 1.2-V reference and thus

reduces noise at the V_OUTpin.

The REF5025 allows access to the bandgap through

the TRIM/NR pin. Placing a capacitor from the

TRIM/NR pin to GND (as Figure 27 illustrates) in

combination with the internal 1-kΩ resistor creates a

low-pass filter that lowers the overall noise measured

on the V_OUTpin. A capacitance of 1 μF is suggested

for a low-pass filter with a corner frequency of

14.5 Hz. Higher capacitance results in a lower cutoff

frequency.

+V_SUPPLY

REF5025

DNC

V_IN

DNC

+V_SUPPLY

C_BYPASS

REF5025

V_OUT

TEMP

1mF to 10mF

DNC

V_IN

DNC

C_L

1mF to 50mF

GND TRIM/NR

V_OUT

TEMP

GND TRIM/NR

1mF

Figure 25. Basic Connections

SUPPLY VOLTAGE

Figure 27. Noise Reduction Using TRIM/NR Pin

The REF5025 features extremely low dropout

voltage. For loaded conditions, a typical dropout

voltage versus load plot is shown in Figure 8 of

Typical Characteristics.

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REF5025-HT

SBOS502D –SEPTEMBER 2009–REVISED APRIL 2012

www.ti.com

TEMPERATURE DRIFT

The REF5025 is designed for minimal drift error,

which is defined as the change in output voltage over

temperature. The drift is calculated using the box

method, as described by the following equation:

REF5025

DNC

V_IN

DNC

V_TEMP

OPA⁽¹⁾

V_OUTMAX* V_OUTMIN

2.6mV/°C

V_OUT

TEMP

_{Drift +}ǒ

10 (ppm)

V_OUT Temp Range

GND TRIM/NR

(1)

TEMPERATURE MONITORING

NOTE: (1) Low drift op amp

The temperature output terminal (TEMP, pin 3)

provides a temperature-dependent voltage output

with approximately 60-kΩ source impedance. As

seen in Figure 10, the output voltage follows the

nominal relationship:

Figure 28. Buffering the TEMP Pin Output

POWER DISSIPATION

V_{TEMP PIN}= 509 mV + 2.64 × T(°C)

(2)

The REF5025 is specified to deliver current loads of

±10 mA over the specified input voltage range. The

temperature of the device increases according to the

equation:

(For –55°C to 125°C only. Refer to Figure 10 of the

TYPICAL CHARACTERISTICS for 125°C to 210°C.)

This pin indicates general chip temperature, accurate

to approximately ±15°C. Although it is not generally

suitable for accurate temperature measurements, it

can be used to indicate temperature changes or for

temperature compensation of analog circuitry. A

temperature change of 30°C corresponds to an

approximate 79-mV change in voltage at the TEMP

pin.

T_J= T_A+ P_D× θ_JA

(3)

Where:

T_J= Junction temperature (°C)

T_A= Ambient temperature (°C)

P_D= Power dissipated (W)

θ_JA

= Junction-to-ambient thermal resistance

(°C/W)

The TEMP pin has high output impedance (see

Figure 24). Loading this pin with a low-impedance

circuit induces a measurement error; however, it does

not have any effect on V_OUTaccuracy. To avoid

errors caused by low-impedance loading, buffer the

TEMP pin output with a suitable low-temperature drift

op amp as shown in Figure 28.

The REF5025 junction temperature must not exceed

the absolute maximum rating of 210°C.

NOISE PERFORMANCE

Typical 0.1-Hz to 10-Hz voltage noise for each

member of the REF5025 is specified in the Electrical

Characterisitics table. The noise voltage increases

with output voltage and operating temperature.

Additional filtering can be used to improve output

noise levels, although care should be taken to ensure

the output impedance does not degrade performance.

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REF5025-HT

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SBOS502D –SEPTEMBER 2009–REVISED APRIL 2012

APPLICATION CIRCUITS

DATA ACQUISITION

NEGATIVE REFERENCE VOLTAGE

Data acquisition systems often require stable voltage

references to maintain accuracy. The REF5025

features low noise, very low drift, and high initial

accuracy for high-performance data converters.

Figure 30 shows the REF5025 in a basic data

acquisition system.

For applications requiring a negative and positive

reference voltage, the REF5025 and OPA735 can be

used to provide a dual-supply reference from a 5-V

supply. Figure 29 shows the REF5025 used to

provide a 2.5-V supply reference voltage. The low

drift performance of the REF5025 complements the

low offset voltage and zero drift of the OPA735 to

provide an accurate solution for split-supply

applications. Care must be taken to match the

temperature coefficients of R₁and R₂.

+5V

Input

Signal

0V to 4V

R₁

50W

V_DD

OPA365

+IN

ADS8326

REF

C₁

1.2nF

+5V

-IN

GND

REF5025

DNC

V_IN

DNC

REF5025

V_IN

V_OUT

+5V

C_BYPASS

V_OUT

+2.5V

TEMP

C₂

1mF

22mF

1mF

GND TRIM/NR

GND

R₁

10kW

R₂

10kW

A. OPA365 and ADS8326 have not been

characterized or tested at 210°C.

+5V

Figure 30. Basic Data Acquisition System

-2.5V

OPA735

-5V

NOTE: Bypass capacitors not shown.

A. OPA735 has not been characterized or

tested at 210°C.

Figure 29. The REF5025 and OPA735 Create

Positive and Negative Reference Voltages

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PACKAGE OPTION ADDENDUM

www.ti.com

2-May-2012

PACKAGING INFORMATION

Status ⁽¹⁾

Eco Plan ⁽²⁾

MSL Peak Temp ⁽³⁾

Samples

Orderable Device

Package Type Package

Drawing

Pins

Package Qty

Lead/

Ball Finish

(Requires Login)

REF5025SHKJ

REF5025SHKQ

REF5025SKGD1

ACTIVE

CFP

HKJ

HKQ

KGD

TBD

Call TI

N / A for Pkg Type

XCEPT

195

Call TI

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

⁽³⁾MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF REF5025-HT :

Catalog: REF5025

•

Enhanced Product: REF5025-EP

•

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

2-May-2012

NOTE: Qualified Version Definitions:

Catalog - TI's standard catalog product

•

Enhanced Product - Supports Defense, Aerospace and Medical Applications

Addendum-Page 2

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power.ti.com

Space, Avionics and Defense www.ti.com/space-avionics-defense

microcontroller.ti.com

www.ti-rfid.com

Video and Imaging

www.ti.com/video

OMAP Mobile Processors www.ti.com/omap

Wireless Connectivity www.ti.com/wirelessconnectivity

TI E2E Community Home Page

e2e.ti.com

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

型号:	REF5025SKGD1
Brand Name：	Texas Instruments
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
零件包装代码：	DIE
包装说明：	DIE, DIE OR CHIP
针数：	12
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
风险等级：	5.48
模拟集成电路 - 其他类型：	THREE TERMINAL VOLTAGE REFERENCE
JESD-30 代码：	R-XUUC-N12
功能数量：	1
输出次数：	1
端子数量：	12
最高工作温度：	210 °C
最低工作温度：	-55 °C
标称输出电压：	2.5 V
封装主体材料：	UNSPECIFIED
封装代码：	DIE
封装等效代码：	DIE OR CHIP
封装形状：	RECTANGULAR
封装形式：	UNCASED CHIP
峰值回流温度（摄氏度）：	NOT SPECIFIED
认证状态：	Not Qualified
子类别：	Voltage References
最大供电电压 (Vsup)：	18 V
最小供电电压 (Vsup)：	3.25 V
表面贴装：	YES
最大电压温度系数：	3 ppm/ °C
温度等级：	MILITARY
端子形式：	NO LEAD
端子位置：	UPPER
处于峰值回流温度下的最长时间：	NOT SPECIFIED
微调/可调输出：	YES
最大电压容差：	0.14%
Base Number Matches：	1

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