SC553
POWER MANAGEMENT
Applications Information (Cont.)
Thermal Considerations
Layout Considerations
The worst-case power dissipation for this part is given While layout for linear devices is generally not as critical
by:
as for a switching application, careful attention to detail
will ensure reliable operation.
P
=
V
IN(MAX) − VOUT(MIN)
•IOUT(MAX) + VIN(MAX) •IQ(MAX)
(1)
D(MAX)
1) Attaching the part to a larger copper footprint will
enable better heat transfer from the device, especially
on PCBs where there are internal ground and power
planes.
For all practical purposes, equation (1) can be reduced
to the following expression:
(2)
2) Place the input and output capacitors close to the
device for optimal transient response and device
behaviour.
Looking at a typical application, 3.3V to 2.8V at 150mA:
VIN(MAX) = 3.3 + 5% = 3.465V
VOUT(MIN) = 2.8V - 2% = 2.744V
IOUT = 150mA
3) While the external resistor divider does not need to be
close to the device, care should be taken to avoid routing
the connections next to any lines carrying large amounts
of noise. The simplest solution is to place these resistors
close to the device and routing the top of R1 to the load
if not adjacent to the part.
TA = 85°C
Inserting these values into equation (2) gives us:
4) Connect all ground connections directly to the ground
plane. If there is no ground plane, connect to a common
local ground point before connecting to board ground.
Using this figure, we can calculate the maximum thermal
impedance allowable to maintain TJ ≤ 125°C:
Typical Characteristics
TJ(MAX) − TA(MAX)
=
Dropout Voltage vs. Output Voltage
vs. Output Current
θJA(MAX)
=
= 370°C/ W
PD(MAX)
0.108
250
TA = 25°C
With the standard SOT-23-5 Land Pattern shown at the
end of this datasheet, and minimum trace widths, the
thermal impedance junction to ambient for SC553 is
256°C/W. Thus no additional heatsinking is required for
this example.
225
200
Top to bottom:
175
150
125
100
75
IOUT = 150mA
I
OUT = 100mA
IOUT = 50mA
The junction temperature can be reduced further (or
higher power dissipation can be allowed) by the use of
larger trace widths and connecting PCB copper to the
GND pin (pin 2), which connects directly to the device
substrate. Adding approximately one square inch of PCB
copper to pin 2 will reduce θJA to approximately
130°C/W and TJ(MAX) for the example above to
approximately 100°C. The use of multi layer boards with
internal ground/power planes will lower the junction
temperature and improve overall output voltage
accuracy.
50
25
0
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
VOUT (V)
www.semtech.com
2004 Semtech Corp.
6