SG2524N现货热卖使用介绍供应商报价哪里找芯片批发报价-中国IC网-芯三七

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产品型号SG2524N的概述

芯片SG2524N的概述 SG2524N是一款由SG Micro制造的高性能脉冲宽度调制 (PWM) 控制器，于20世纪80年代在电源管理和变换电路中广泛应用。该芯片主要用于开关电源、变压器驱动和照明应用等领域，因其多路输出能力和良好的稳定性而受到工程师们的青睐。SG2524N具有多种工作模式，能够高效地控制输出电压和电流，满足不同负载条件下的需求。芯片SG2524N的详细参数 SG2524N芯片的主要参数包括： - 工作电源范围：4.5V-40V - 最大工作频率：100kHz - 输出电流：500mA - 温度范围：-40°C至+85°C - 外部频率调节范围：10Hz至100kHz - 控制频率：受控于外部时钟信号，具有较高的调制精度 - 占空比范围：0%至100%，可调 - 线性调节：输入电压变化和温度变化下保持稳定输出芯片SG2524N的厂家、包装与封装 SG2524N...

产品型号SG2524N的Datasheet PDF文件预览

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SLVS077D – APRIL 1977 – REVISED FEBRUARY 2003

SG2524 . . . D OR N PACKAGE

SG3524 . . . D, N, OR NS PACKAGE

(TOP VIEW)

Complete Pulse-Width Modulation (PWM)

Power-Control Circuitry

Uncommitted Outputs for Single-Ended or

Push-Pull Applications

IN–

IN+

OSC OUT

CURR LIM+

CURR LIM–

REF OUT

Low Standby Current . . . 8 mA Typ

EMIT 2

COL 2

COL 1

EMIT 1

SHUTDOWN

COMP

Interchangeable With Industry Standard

SG2524 and SG3524

description/ordering information

GND

The SG2524 and SG3524 incorporate all the

functions required in the construction of a

regulating power supply, inverter, or switching

regulator on a single chip. They also can be used

as the control element for high-power-output

applications. The SG2524 and SG3524 were

designed for switching regulators of either polarity, transformer-coupled dc-to-dc converters, transformerless

voltage doublers, and polarity-converter applications employing fixed-frequency, pulse-width modulation

(PWM) techniques. The complementary output allows either single-ended or push-pull application. Each device

includes an on-chip regulator, error amplifier, programmable oscillator, pulse-steering flip-flop, two uncommitted

pass transistors, a high-gain comparator, and current-limiting and shutdown circuitry.

ORDERING INFORMATION

INPUT

REGULATION

MAX (mV)

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

†

PACKAGE

PDIP (N)

SOIC (D)

Tube of 25

Tube of 40

Reel of 2500

Reel of 2000

Tube of 25

Tube of 40

Reel of 2500

SG3524N

SG3524D

SG3524DR

SG3524NSR

SG2524N

SG2524D

SG2524DR

SG3524N

SG3524

0°C to 70°C

SOP (NS)

PDIP (N)

SG3524

SG2524N

–25°C to 85°C

SOIC (D)

SG2524

†

Package drawings, standard packing quantities, thermal data, symboliztion, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLVS077D – APRIL 1977 – REVISED FEBRUARY 2003

functional block diagram

Reference

Regulator

REF OUT

COL 1

ref

EMIT 1

COL 2

ref

EMIT 2

OSC OUT

Oscillator

ref

–

IN–

Comparator

IN+

Error Amplifier

COMP

ref

CURR LIM+

–

CURR LIM–

SHUTDOWN

GND

1 kΩ

10 kΩ

NOTE A: Resistor values shown are nominal.

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V

Collector output current, I

Reference output current, I

(see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA

O(ref)

Current through CT terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –5 mA

Operating virtual junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

Package thermal impedance, θ (see Notes 3 and 4): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W

N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W

NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C

Storage temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C

stg

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values are with respect to network ground terminal.

2. The reference regulator may be bypassed for operation from a fixed 5-V supply by connecting the V

(REF OUT) pin both to the supply voltage. In this configuration, the maximum supply voltage is 6 V.

and reference output

3. Maximum power dissipation is a function of T

, θ , and T . The maximum allowable power dissipation at any allowable ambient

J(max) JA

temperature is P = (T

J(max)

– T )/θ . Operation at the absolute maximum T of 150°C can impact reliability.

A JA J

4. The package thermal impedance is calculated in accordance with JESD 51-7.

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SLVS077D – APRIL 1977 – REVISED FEBRUARY 2003

recommended operating conditions

MIN

MAX

UNIT

Supply voltage

Reference output current

Current through CT terminal

Timing resistor

kΩ

–0.03

1.8

0.001

–25

–2

100

0.1

Timing capacitor

µF

SG2524

SG3524

Operating free-air temperature

°C

electrical characteristics over recommended operating free-air temperature range, V

f = 20 kHz (unless otherwise noted)

= 20 V,

reference section

SG2524

SG3524

†

PARAMETER

TEST CONDITIONS

UNIT

‡

MIN TYP

MAX

5.2

MIN TYP

MAX

5.4

Output voltage

4.8

4.6

Input regulation

= 8 V to 40 V

f = 120 Hz

Ripple rejection

Output regulation

= 0 mA to 20 mA

= MIN to MAX

Output voltage change with temperature

0.3%

100

0.3%

100

Short-circuit output current

ref

= 0

†

‡

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

All typical values, except for temperature coefficients, are at T = 25°C

Standard deviation is a measure of the statistical distribution about the mean, as derived from the formula:

(x_n* X)

n+1

s +

N * 1

oscillator section

‡

†

PARAMETER

MIN TYP

MAX

UNIT

TEST CONDITIONS

Oscillator frequency

= 0.001 µF, = 2 kΩ

450

kHz

osc

All values of voltage, temperature, resistance,

and capacitance constant

Standard deviation of frequency

Frequency change with voltage

= 8 V to 40 V,

= 25°C

∆f

osc

Frequency change with temperature

Output amplitude at OSC OUT

= MIN to MAX

= 25°C

3.5

0.5

Output pulse duration (width) at OSC OUT

= 0.01 µF,

= 25°C

µs

†

‡

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

All typical values, except for temperature coefficients, are at T = 25°C

Standard deviation is a measure of the statistical distribution about the mean, as derived from the formula:

(x_n* X)

n+1

s +

N * 1

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SLVS077D – APRIL 1977 – REVISED FEBRUARY 2003

error amplifier section

SG2524

SG3524

TEST

CONDITIONS

PARAMETER

UNIT

†

‡

MIN TYP

MAX

MIN TYP

MAX

Input offset voltage

= 2.5 V

0.5

µA

Input bias current

Open-loop voltage amplification

1.8 to

3.4

1.8 to

3.4

ICR

Common-mode input voltage range

= 25°C

CMMR Common-mode rejection ratio

MHz

Unity-gain bandwidth

Output swing

= 25°C

0.5

3.8

0.5

3.8

†

‡

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

All typical values, except for temperature coefficients, are at T = 25°C

output section

‡

†

PARAMETER

MIN TYP

MAX

TEST CONDITIONS

UNIT

Collector-emitter breakdown voltage

Collector off-state current

(BR)CE

= 40 V

0.01

µA

I = 50 mA

Collector-emitter saturation voltage

Emitter output voltage

sat

= 20 V,

= 2 kΩ

= –250 µA

Turn-off voltage rise time

0.2

0.1

µs

Turn-on voltage fall time

†

‡

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

All typical values, except for temperature coefficients, are at T = 25°C.

comparator section

‡

†

PARAMETER

MIN TYP

MAX

TEST CONDITIONS

UNIT

Maximum duty cycle, each output

45%

Zero duty cycle

Maximum duty cycle

3.5

–1

Input threshold voltage at COMP

Input bias current

µA

†

‡

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

All typical values, except for temperature coefficients, are at T = 25°C.

current limiting section

‡

†

PARAMETER

MIN TYP

–1 to1

175

MAX

TEST CONDITIONS

UNIT

Input voltage range (either input)

Sense voltage at T = 25°C

200

0.2

225

(SENSE)

(IN+)

– V

(IN–)

≥ 50 mV, V

= 2 V

(COMP)

Temperature coefficient of sense voltage

mV/°C

‡

All typical values, except for temperature coefficients, are at T = 25°C.

total device

‡

PARAMETER

TEST CONDITIONS

= 40 V, IN–, CURR LIM+, C , GND, COMP, EMIT 1, EMIT 2 grounded,

MIN TYP

MAX

UNIT

Standby current

IN+ at 2 V, All other inputs and outputs open

‡

All typical values, except for temperature coefficients, are at T = 25°C.

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SLVS077D – APRIL 1977 – REVISED FEBRUARY 2003

PARAMETER MEASUREMENT INFORMATION

REF

= 8 V to 40 V

SG2524 or SG3524

2 kΩ

10 kΩ

2 kΩ

SHUTDOWN

2 kΩ

1 W

2 kΩ

1 W

(Open)

OSC OUT

REF OUT

IN+

10 kΩ

REF

IN–

0.1 µF

COMP

COL 2

COL 1

CURR LIM+

1 kΩ

Outputs

CURR LIM–

EMIT 2

EMIT 1

2 kΩ

GND

Figure 1. General Test Circuit

2 kΩ

Output

Circuit Under Test

≈V

90%

Output

10%

≈0 V

TEST CIRCUIT

VOLTAGE WAVEFORMS

Figure 2. Switching Times

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SLVS077D – APRIL 1977 – REVISED FEBRUARY 2003

TYPICAL CHARACTERISTICS

OPEN-LOOP VOLTAGE AMPLIFICATION

OF ERROR AMPLIFIER

OSCILLATOR FREQUENCY

FREQUENCY

TIMING RESISTANCE

= ∞

= 20 V

= 25°C

= 0

= 0.001 µF

400 k

= 0.003 µF

100 k

40 k

= 0.01 µF

= 1 MΩ

= 300 kΩ

= 100 kΩ

= 30 kΩ

10 k

4 k

= 0.03 µF

= 0.1 µF

1 k

400

= 20 V

= 25°C

is resistance from COMP to ground

–10

100

1 k

10 k

100 k

1 M

10 M

70 100

Frequency – Hz

– Timing Resistance – kΩ

Figure 3

Figure 4

OUTPUT DEAD TIME

TIMING CAPACITANCE

0.4

0.1

0.001

0.004

0.01

0.04

0.1

– Timing Capacitance – µF

Figure 5

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SLVS077D – APRIL 1977 – REVISED FEBRUARY 2003

†

PRINCIPLES OF OPERATION

The SG2524 is a fixed-frequency pulse-width-modulation (PWM) voltage-regulator control circuit. The regulator

operates at a fixed frequency that is programmed by one timing resistor, R , and one timing capacitor, C . R

establishes a constant charging current for C . This results in a linear voltage ramp at C , which is fed to the

comparator, providing linear control of the output pulse duration (width) by the error amplifier. The SG2524 contains

an onboard 5-V regulator that serves as a reference, as well as supplying the SG2524 internal regulator control

circuitry. The internal reference voltage is divided externally by a resistor ladder network to provide a reference within

the common-mode range of the error amplifier as shown in Figure 6, or an external reference can be used. The output

is sensed by a second resistor divider network and the error signal is amplified. This voltage is then compared to the

linear voltage ramp at C . The resulting modulated pulse out of the high-gain comparator then is steered to the

appropriate output pass transistor (Q1 or Q2) by the pulse-steering flip-flop, which is synchronously toggled by the

oscillator output. The oscillator output pulse also serves as a blanking pulse to ensure both outputs are never on

simultaneously during the transition times. The duration of the blanking pulse is controlled by the value of C . The

outputs may be applied in a push-pull configuration in which their frequency is one-half that of the base oscillator, or

paralleled for single-ended applications in which the frequency is equal to that of the oscillator. The output of the error

amplifier shares a common input to the comparator with the current-limiting and shut-down circuitry and can be

overridden by signals from either of these inputs. This common point is pinned out externally via the COMP pin, which

can be employed to either control the gain of the error amplifier or to compensate it. In addition, the COMP pin can

be used to provide additional control to the regulator.

†

APPLICATION INFORMATION

oscillator

The oscillator controls the frequency of the SG2524 and is programmed by R and C as shown in Figure 4.

1.30

f [

R C

where: R is in kΩ

C is in µF

f is in kHz

Practical values of C fall between 0.001 µF and 0.1 µF. Practical values of R fall between 1.8 kΩ and 100 kΩ.

This results in a frequency range typically from 130 Hz to 722 kHz.

blanking

The output pulse of the oscillator is used as a blanking pulse at the output. This pulse duration is controlled by

the value of C as shown in Figure 5. If small values of C are required, the oscillator output pulse duration can

be maintained by applying a shunt capacitance from OSC OUT to ground.

synchronous operation

When an external clock is desired, a clock pulse of approximately 3 V can be applied directly to the oscillator

output terminal. The impedance to ground at this point is approximately 2 kΩ. In this configuration, R C must

T T

be selected for a clock period slightly greater than that of the external clock.

†

Throughout these discussions, references to the SG2524 apply also to the SG3524.

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SLVS077D – APRIL 1977 – REVISED FEBRUARY 2003

†

APPLICATION INFORMATION

synchronous operation (continued)

If two or more SG2524 regulators are operated synchronously, all oscillator output terminals must be tied

together. The oscillator programmed for the minimum clock period is the master from which all the other

SG2524s operate. In this application, the C R values of the slaved regulators must be set for a period

T T

approximately 10% longer than that of the master regulator. In addition, C (master) = 2 C (slave) to ensure

that the master output pulse, which occurs first, has a longer pulse duration and, subsequently, resets the slave

regulators.

voltage reference

The 5-V internal reference can be employed by use of an external resistor divider network to establish a

reference common-mode voltage range (1.8 V to 3.4 V) within the error amplifiers (see Figure 6), or an external

reference can be applied directly to the error amplifier. For operation from a fixed 5-V supply, the internal

reference can be bypassed by applying the input voltage to both the V

configuration, however, the input voltage is limited to a maximum of 6 V.

and V

terminals. In this

REF

To Positive

Output Voltage

REF OUT

5 kΩ

2.5 V

5 kΩ

2.5 V

–

To Negative

Output Voltage

R1 ) R2

_{+ 2.5 V}ǒ_{1 *}

+ 2.5 V

Figure 6. Error-Amplifier Bias Circuits

error amplifier

The error amplifier is a differential-input transconductance amplifier. The output is available for dc gain control

or ac phase compensation. The compensation node (COMP) is a high-impedance node (R = 5 MΩ). The gain

–1

of the amplifier is A = (0.002 Ω )R and easily can be reduced from a nominal 10,000 by an external shunt

resistance from COMP to ground. Refer to Figure 3 for data.

compensation

COMP, as previously discussed, is made available for compensation. Since most output filters introduce one

or more additional poles at frequencies below 200 Hz, which is the pole of the uncompensated amplifier,

introduction of a zero to cancel one of the output filter poles is desirable. This can be accomplished best with

a series RC circuit from COMP to ground in the range of 50 kΩ and 0.001 µF. Other frequencies can be canceled

by use of the formula f ≈ 1/RC.

†

Throughout these discussions, references to the SG2524 apply also to the SG3524.

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SLVS077D – APRIL 1977 – REVISED FEBRUARY 2003

†

APPLICATION INFORMATION

shutdown circuitry

COMP also can be employed to introduce external control of the SG2524. Any circuit that can sink 200 µA can

pull the compensation terminal to ground and, thus, disable the SG2524.

In addition to constant-current limiting, CURR LIM+ and CURR LIM– also can be used in transformer-coupled

circuits to sense primary current and shorten an output pulse should transformer saturation occur. CURR LIM–

also can be grounded to convert CURR LIM+ into an additional shutdown terminal.

current limiting

A current-limiting sense amplifier is provided in the SG2524. The current-limiting sense amplifier exhibits a

threshold of 200 mV ±25 mV and must be applied in the ground line since the voltage range of the inputs is limited

to 1 V to –1 V. Caution should be taken to ensure the –1-V limit is not exceeded by either input, otherwise,

damage to the device may result.

Foldback current limiting can be provided with the network shown in Figure 7. The current-limit schematic is

shown in Figure 8.

EMIT 1

EMIT 2

ǒ_{200 mV )}

O(max)

R1 ) R2

SG2524

200 mV

CURR LIM–

CURR LIM+

Figure 7. Foldback Current Limiting for Shorted Output Conditions

COMP

Comparator

Constant-Current Source

Error Amplifier

CURR LIM+

CURR LIM–

Figure 8. Current-Limit Schematic

†

Throughout these discussions, references to the SG2524 apply also to the SG3524.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂꢃ ꢂꢄ ꢅ ꢀꢁꢆ ꢃ ꢂꢄ

ꢇ ꢈꢁꢉ ꢊ ꢋꢌ ꢍ ꢎ ꢁ ꢏꢉ ꢊꢀ ꢈꢐꢑ ꢍ ꢒꢌ ꢓ ꢔꢕ ꢒꢉ ꢊꢋꢌꢕ ꢇꢀ

SLVS077D – APRIL 1977 – REVISED FEBRUARY 2003

†

APPLICATION INFORMATION

output circuitry

The SG2524 contains two identical npn transistors, the collectors and emitters of which are uncommitted. Each

transistor has antisaturation circuitry that limits the current through that transistor to a maximum of 100 mA for

fast response.

general

There are a wide variety of output configurations possible when considering the application of the SG2524 as

a voltage-regulator control circuit. They can be segregated into three basic categories:

Capacitor-diode-coupled voltage multipliers

Inductor-capacitor-implemented single-ended circuits

Transformer-coupled circuits

Examples of these categories are shown in Figures 9, 10, and 11, respectively. Detailed diagrams of specific

applications are shown in Figures 12–15.

V > V

V < V

–V

| +V | > | – V

Figure 9. Capacitor-Diode-Coupled Voltage-Multiplier Output Stages

†

Throughout these discussions, references to the SG2524 apply also to the SG3524.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂ ꢃ ꢂꢄ ꢅ ꢀ ꢁ ꢆꢃꢂ ꢄ

ꢇꢈꢁ ꢉꢊ ꢋꢌ ꢍꢎꢁ ꢏꢉ ꢊꢀ ꢈꢐꢑ ꢍꢒꢌ ꢓ ꢔ ꢕꢒꢉ ꢊꢋꢌꢕ ꢇꢀ

SLVS077D – APRIL 1977 – REVISED FEBRUARY 2003

†

APPLICATION INFORMATION

V > V

V < V

–VO

| +V | < | – V

Figure 10. Single-Ended Inductor Circuit

Push-Pull

Flyback

Figure 11. Transformer-Coupled Outputs

†

Throughout these discussions, references to the SG2524 apply also to the SG3524.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂꢃ ꢂꢄ ꢅ ꢀꢁꢆ ꢃ ꢂꢄ

ꢇ ꢈꢁꢉ ꢊ ꢋꢌ ꢍ ꢎ ꢁ ꢏꢉ ꢊꢀ ꢈꢐꢑ ꢍ ꢒꢌ ꢓ ꢔꢕ ꢒꢉ ꢊꢋꢌꢕ ꢇꢀ

SLVS077D – APRIL 1977 – REVISED FEBRUARY 2003

†

APPLICATION INFORMATION

= 15 V

15 kΩ

1N916

5 kΩ

–5 V

20 mA

IN–

EMIT 1

COL 1

SG2524

5 kΩ

0.1 µF

IN+

20 µF

1N916

REF OUT

COL 2

EMIT 2

2 kΩ

CURR LIM+

0.01 µF

CURR LIM–

SHUTDOWN

50 µF

OSC OUT

COMP

GND

Figure 12. Capacitor-Diode Output Circuit

= 5 V

1N916

50T

15 V

50 µF

100 µF

5 kΩ

300 Ω

200 Ω

20T

25 kΩ

20 mA

IN–

EMIT 1

SG2524

5 kΩ

0.1 µF

IN+

50T

COL 1

1 MΩ

–15 V

5 kΩ

REF OUT

COL 2

EMIT 2

1N916

TIP29A

2 kΩ

CURR LIM+

0.02 µF

620 Ω

SHUTDOWN

OSC OUT

CURR LIM–

1N916

2N2222

COMP

510 Ω

GND

0.001 µF

1 Ω

4.7 µF

Input

Return

Figure 13. Flyback Converter Circuit

†

Throughout these discussions, references to the SG2524 apply also to the SG3524.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂ ꢃ ꢂꢄ ꢅ ꢀ ꢁ ꢆꢃꢂ ꢄ

ꢇꢈꢁ ꢉꢊ ꢋꢌ ꢍꢎꢁ ꢏꢉ ꢊꢀ ꢈꢐꢑ ꢍꢒꢌ ꢓ ꢔ ꢕꢒꢉ ꢊꢋꢌꢕ ꢇꢀ

SLVS077D – APRIL 1977 – REVISED FEBRUARY 2003

†

APPLICATION INFORMATION

= 28 V

TIP115

0.9 mH

5 kΩ

5 V

1 A

5 kΩ

IN–

EMIT 1

COL 1

5 kΩ

3 kΩ

SG2524

IN+

500 µF

0.1 µF

5 kΩ

REF OUT

COL 2

1N3880

3 kΩ

EMIT 2

CURR LIM+

CURR LIM–

0.02 µF

SHUT

DOWN

OSC OUT

COMP

GND

0.001 µF

50 kΩ

0.1 Ω

Input Return

Figure 14. Single-Ended LC Circuit

= 28 V

1 kΩ

5 kΩ

TIP31A

TIR101A

5 kΩ

1 mH

1500 µF

EMIT 1

IN–

5 kΩ

SG2524

COL 1

IN+

20T

5 V

5 A

–

100 Ω

0.1 µF

5 kΩ

COL 2

EMIT 2

100 Ω

REF OUT

2 kΩ

CURR LIM+

TIP31A

0.01 µF

SHUT

DOWN

OSC OUT

CURR LIM–

COMP

0.1 Ω

0.001 µF

20 kΩ

GND

100 µF

Figure 15. Push-Pull Transformer-Coupled Circuit

†

Throughout these discussions, references to the SG2524 apply also to the SG3524.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

17-Oct-2005

PACKAGING INFORMATION

Orderable Device

SG2524D

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

SOIC

40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SG2524DE4

SG2524DR

SOIC

40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SG2524DRE4

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SG2524J

SG2524N

OBSOLETE

ACTIVE

CDIP

PDIP

TBD

Call TI

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

SG2524NE4

SG3524D

ACTIVE

PDIP

SOIC

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SG3524DE4

SG3524DR

SG3524DRE4

40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SG3524J

SG3524N

OBSOLETE

ACTIVE

CDIP

PDIP

TBD

Call TI

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

SG3524NE4

SG3524NSR

ACTIVE

PDIP

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SG3524NSRE4

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan

The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS

no Sb/Br)

please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

17-Oct-2005

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 2

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,

enhancements, improvements, and other changes to its products and services at any time and to discontinue

any product or service without notice. Customers should obtain the latest relevant information before placing

orders and should verify that such information is current and complete. All products are sold subject to TI’s terms

and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI

deems necessary to support this warranty. Except where mandated by government requirements, testing of all

parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for

their products and applications using TI components. To minimize the risks associated with customer products

and applications, customers should provide adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,

in which TI products or services are used. Information published by TI regarding third-party products or services

does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.

Use of such information may require a license from a third party under the patents or other intellectual property

of the third party, or a license from TI under the patents or other intellectual property of TI.

Reproduction of information in TI data books or data sheets is permissible only if reproduction is without

alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction

of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for

such altered documentation.

Resale of TI products or services with statements different from or beyond the parameters stated by TI for that

product or service voids all express and any implied warranties for the associated TI product or service and

is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.

Following are URLs where you can obtain information on other Texas Instruments products and application

solutions:

Products

Applications

Audio

Amplifiers

amplifier.ti.com

www.ti.com/audio

Data Converters

dataconverter.ti.com

Automotive

www.ti.com/automotive

DSP

dsp.ti.com

Broadband

Digital Control

Military

www.ti.com/broadband

www.ti.com/digitalcontrol

www.ti.com/military

Interface

Logic

interface.ti.com

logic.ti.com

Power Mgmt

Microcontrollers

power.ti.com

Optical Networking

Security

www.ti.com/opticalnetwork

www.ti.com/security

www.ti.com/telephony

www.ti.com/video

microcontroller.ti.com

Telephony

Video & Imaging

Wireless

www.ti.com/wireless

Mailing Address:

Texas Instruments

Post Office Box 655303 Dallas, Texas 75265

SG2524N相关文章

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SG2524N产品参数

型号:	SG2524N
是否无铅：	含铅
是否Rohs认证：	不符合
生命周期：	Obsolete
IHS 制造商：	STMICROELECTRONICS
零件包装代码：	DIP
包装说明：	DIP-16
针数：	16
Reach Compliance Code：	not_compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
风险等级：	5.13
Is Samacsys：	N
模拟集成电路 - 其他类型：	SWITCHING CONTROLLER
控制模式：	VOLTAGE-MODE
控制技术：	PULSE WIDTH MODULATION
JESD-30 代码：	R-PDIP-T16
JESD-609代码：	e0
功能数量：	1
端子数量：	16
最高工作温度：	85 °C
最低工作温度：	-25 °C
最大输出电流：	0.1 A
封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP
封装等效代码：	DIP16,.3
封装形状：	RECTANGULAR
封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT SPECIFIED
认证状态：	Not Qualified
座面最大高度：	5.1 mm
子类别：	Switching Regulator or Controllers
表面贴装：	NO
切换器配置：	PUSH-PULL
最大切换频率：	300 kHz
技术：	BIPOLAR
温度等级：	OTHER
端子面层：	Tin/Lead (Sn/Pb)
端子形式：	THROUGH-HOLE
端子节距：	2.54 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	7.62 mm
Base Number Matches：	1

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