SMP100LC-120全新原装原理图各脚功能电路原理芯片引脚定义-中国IC网-芯三七

SMP100LC

®

TRISIL™ FOR TELECOM EQUIPMENT PROTECTION

FEATURES

■

Bidirectional crowbar protection

Voltage range from 8V to 400V

Low capacitance from 20pF to 45pF @ 50V

Low leakage current : I_R= 2µA max

Holding current: I_H= 150 mA min

Repetitive peak pulse current:

SMB

I_PP= 100 A (10/1000µs)

(JEDEC DO-214AA)

MAIN APPLICATIONS

Table 1: Order Codes

Any sensitive equipment requiring protection

against lightning strikes and power crossing.

These devices are dedicated to central office pro-

tection as they comply with the most stressfull

standards.

Part Number

SMP100LC-8

Marking

PL8

L25

L35

L06

L09

L12

L14

L16

L20

L23

L27

L32

L36

L40

SMP100LC-25

SMP100LC-35

SMP100LC-65

SMP100LC-90

SMP100LC-120

SMP100LC-140

SMP100LC-160

SMP100LC-200

SMP100LC-230

SMP100LC-270

SMP100LC-320

SMP100LC-360

SMP100LC-400

Their Low Capacitances make them suitable for

ADSL.

DESCRIPTION

The SMP100LC is a series of low capacitance

transient surge arrestors designed for the protec-

tion of high debit rate communication equipment.

Its low capacitance avoids any distortion of the sig-

nal and is compatible with digital transmission line

cards (xDSL, ISDN...).

SMP100LC series tested and confirmed compati-

ble with Cooper Bussmann Telecom Circuit Pro-

tector TCP 1.25A.

BENEFITS

Trisils are not subject to ageing and provide a fail

safe mode in short circuit for a better protection.

They are used to help equipment to meet main

standards such as UL60950, IEC950 / CSA C22.2

and UL1459. They have UL94 V0 approved resin.

SMB package is JEDEC registered (DO-214AA).

Trisils comply with the following standards GR-

1089 Core, ITU-T-K20/K21, VDE0433, VDE0878,

IEC61000-4-5 and FCC part 68.

Figure 1: Schematic Diagram

June 2005

REV. 11

1/10

SMP100LC

Table 2: In compliance with the following standards

Peak Surge

Waveform

Required

peak current

(A)

Minimum serial

resistor to meet

standard (Ω)

Current

waveform

STANDARD

Voltage

(V)

Voltage

GR-1089 Core

First level

2500

1000

2/10 µs

10/1000 µs

500

100

2/10 µs

10/1000 µs

0

GR-1089 Core

Second level

5000

1500

2/10 µs

500

100

2/10 µs

5/310 µs

0

GR-1089 Core

Intra-building

2/10 µs

10/700 µs

1/60 ns

6000

1500

150

37.5

0

ITU-T-K20/K21

ITU-T-K20

(IEC61000-4-2)

8000

15000

ESD contact discharge

ESD air discharge

0

4000

2000

100

0

VDE0433

VDE0878

10/700 µs

1.2/50 µs

5/310 µs

50

4000

2000

100

0

1/20 µs

50

4000

10/700 µs

1.2/50 µs

100

5/310 µs

8/20 µs

0

IEC61000-4-5

FCC Part 68, lightning

surge type A

1500

800

10/160 µs

10/560 µs

200

100

10/160 µs

10/560 µs

0

FCC Part 68, lightning

surge type B

1000

9/720 µs

25

5/320 µs

0

Table 3: Absolute Ratings (T_amb= 25°C)

Symbol

Parameter

Value

Unit

I_PP

Repetitive peak pulse current (see figure 2)

10/1000 µs

8/20 µs

100

400

140

150

200

400

500

A

10/560 µs

5/310 µs

10/160 µs

1/20 µs

2/10 µs

I_FS

Fail-safe mode : maximum current (note 1)

kA

A

8/20 µs

5

I_TSM

Non repetitive surge peak on-state current (sinusoidal)

I²t value for fusing

t = 0.2 s

t = 1 s

t = 2 s

t = 15 mn

24

15

12

4

I²t

A²s

°C

t = 16.6 ms

t = 20 ms

20

21

T_stg

T_j

Storage temperature range

Maximum junction temperature

-55 to 150

150

T_L

Maximum lead temperature for soldering during 10 s.

°C

260

Note 1: in fail safe mode, the device acts as a short circuit

2/10

SMP100LC

Table 4: Thermal Resistances

Symbol

R_th(j-a)

R_th(j-l)

Parameter

Junction to ambient (with recommended footprint)

Junction to leads

Value

100

20

Unit

°C/W

Table 5: Electrical Characteristics (T_amb= 25°C)

Symbol

V_RM

V_BR

V_BO

I_RM

I_PP

Parameter

Stand-off voltage

Breakdown voltage

Breakover voltage

Leakage current

Peak pulse current

Breakover current

Holding current

I_BO

I_H

V_R

Continuous reverse voltage

Leakage current at V_R

Capacitance

I_R

C

Dynamic

V_BO

Static

V_BO@ I_BO

I_RM@ V_RM

I_R@ V_R

max.

I_H

C

Types

max.

note 2

V

max. max.

min.

note 4

mA

typ.

note1

note 3

note 5 note 6

µA

V

6

µA

V

mA

pF

75

65

55

90

80

75

65

60

50

45

SMP100LC-8

8

25

40

15

50 (typ.) NA

SMP100LC-25

SMP100LC-35

SMP100LC-65

SMP100LC-90

SMP100LC-120

SMP100LC-140

SMP100LC-160

SMP100LC-200

SMP100LC-230

SMP100LC-270

SMP100LC-320

SMP100LC-360

SMP100LC-400

22

32

55

81

25

35

NA

45

40

35

55

65

85

90

120

155

185

205

255

295

345

400

460

540

125

160

190

200

250

285

335

390

450

530

108

120

144

180

207

243

290

325

360

120

140

160

200

230

270

320

360

400

30

150

30

2

5

800

30

25

20

Note 1: I measured at V guarantee V min ≥ VR

BR

R

Note 2: see functional test circuit 1

Note 3: see test circuit 2

Note 4: see functional holding current test circuit 3

Note 5: V = 50V bias, V =1V, F=1MHz

R

RMS

=1V, F=1MHz

Note 6: V = 2V bias, V

R

RMS

3/10

SMP100LC

Figure 2: Pulse waveform

Figure 3: Non repetitive surge peak on-state

current versus overload duration

I

(A)

TSM

Repetitive peak pulse current

tr = rise time (µs)

%I_PP

100

70

60

50

40

30

20

10

0

F=50Hz

T_jinitial = 25°C

tp = pulse duration time (µs)

50

0

t(s)

t

t_r

t_p

1E-2

1E-1

1E+0

1E+1

1E+2

1E+3

Figure 4: On-state voltage versus on-state

current (typical values)

Figure 5: Relative variation of holding current

versus junction temperature

I (A)

T

I_H[T ] / I_H[T =25°C]

j

100

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

T_jinitial = 25°C

V (V)

T

T (°C)

j

10

0

1

2

3

4

5

6

7

8

-25

0

25

50

75

100

125

Figure 6: Relative variation of breakover

voltage versus junction temperature

Figure 7: Relative variation of leakage current

versus junction temperature (typical values)

V

[T ] / V [T =25°C]

BO BO

j

I [T ] / I [T =25°C]

R

j

1.08

1.06

1.04

1.02

1.00

0.98

0.96

2000

1000

100

10

T (°C)

j

T (°C)

j

1

25

50

75

100

125

-25

0

25

50

75

100

125

4/10

SMP100LC

Figure 8: Variation of thermal impedance

junction to ambient versus pulse duration

(Printed circuit board FR4, SCu=35µm,

recommended pad layout)

Figure 9: Relative variation of junction

capacitance versus reverse voltage applied

(typical values)

C [V ] / C [V =2V]

R

Z

/R

th(j-a) th(j-a)

100

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

F =1MHz

V_RMS= 1V

T_j= 25°C

10

t (s)

p

V (V)

R

1

1E-3

1E-2

1E-1

1E+0

1E+1

1E+2

5E+2

1

2

5

10

20

50

100

300

APPLICATION NOTE

In wireline applications, analog or digital, both central office and subscriber sides have to be protected.

This function is assumed by a combined series / parallel protection stage.

Ring

relay

Line

Ex. Analog line card

Ex. ADSL line card or terminal

In such a stage, parallel function is assumed by one or several Trisil, and is used to protect against short

duration surge (lightning). During this kind of surges the Trisil limits the voltage across the device to be

protected at its break over value and then fires. The fuse assumes the series function, and is used to pro-

tect the module against long duration or very high current mains disturbances (50/60Hz). It acts by safe

circuits opening. Lightning surge and mains disturbance surges are defined by standards like GR1089,

FCC part 68, ITU-T K20.

Fuse TCP 1.25A

Tip L

Gnd

Tip S

Fuse TCP 1.25A

T1

SMP100LC-xxx

Gnd

SMP100LC-xxx

T2

SMP100LC-xxx

Fuse TCP 1.25A

Ring L

Ring S

Typical circuit for subscriber side

Typical circuit for central office side

5/10

SMP100LC

Following figure shows the test method of the Following curve shows the turn on of the Trisil during

board having Fuse and Trisil.

lightning surge.

I surge

Surge

Device to be protected

V

Test board

Generator

Line side

I surge (100A/div)

Oscilloscope

V (50V/div)

Voltage probe

Current probe

These topologies, using SMP100LC from ST and Test conditions:

TCP1.25A from Cooper Bussmann, have been 2/10µs + and -2.5 and 5kV 500A (10 pulses of each

functionally validated with a Trisil glued on the polarity), T_amb= 25°C

PCB. Following example was performed with Test result:

SMP100LC-270 Trisil. For more information, see Fuse and Trisil OK after test in accordance with

Application Note AN2064.

GR1089 requirements

Following curve shows Trisil action while the fuse In case of high current power cross test, the fuse acts

remains operational.

like a switch by opening the circuit.

I surge (10A/div)

I surge (2A/div)

V (100V/div)

Test conditions:

600V 3A 1.1s (first level), T_amb= 25°C

Test result:

277V 25A (second level), T_amb= 25°C

Test result:

Fuse and Trisil OK after test in accordance with Fuse safety opened and Trisil OK after test in

GR1089 requirements accordance with GR1089 requirements

6/10

SMP100LC

Figure 10: Test circuit 1 for Dynamic I_BOand V_BOparameters

100 V / µs, di/dt < 10 A / µs, Ipp = 100 A

2 Ω

45 Ω

83 Ω

46 µH

0.36 nF

10 µF

U

66 Ω

470 Ω

KeyTek 'System 2' generator with PN246I module

1 kV / µs, di/dt < 10 A / µs, Ipp = 10 A

46 µH

26 µH

60 µF

250 Ω

47 Ω

U

12 Ω

KeyTek 'System 2' generator with PN246I module

Figure 11: Test circuit 2 for I_BOand V_BOparameters

K

ton = 20ms

R1 = 140Ω

R2 = 240Ω

220V 50Hz

VBO

measurement

DUT

Vout

1/4

IBO

measurement

TEST PROCEDURE

Pulse test duration (tp = 20ms):

●

for Bidirectional devices = Switch K is closed

for Unidirectional devices = Switch K is open

●

V

●

selection:

OUT

Device with V < 200V ➔ V

= 250 V

= 480 V

, R1 = 140Ω

, R2 = 240Ω

BO

OUT

RMS

Device with V ≥ 200V ➔ V

BO

OUT

RMS

7/10

SMP100LC

Figure 12: Test circuit 3 for dynamic I_Hparameter

R

Surge generator

D.U.T

V

= - 48 V

BAT

This is a GO-NOGO test which allows to confirm the holding current (I ) level in a

H

functional test circuit.

TEST PROCEDURE

1/ Adjust the current level at the I value by short circuiting the AK of the D.U.T.

H

2/ Fire the D.U.T. with a surge current ➔ I

=

PP 10A, 10/1000µs.

3/ The D.U.T. will come back off-state within 50ms maximum.

Figure 13: Ordering Information Scheme

SMP 100 LC - xxx

Trisil Surface Mount

Repetitive Peak Pulse Current

100 = 100A

Capacitance

LC = Low Capacitance

Voltage

65 = 65V

8/10

SMP100LC

Figure 14: SMB Package Mechanical data

E1

DIMENSIONS

Millimeters Inches

REF.

Min.

Max.

2.45

0.20

2.20

0.41

5.60

4.60

3.95

1.60

Min.

0.075

0.002

0.077

0.006

0.201

0.159

0.130

0.030

Max.

0.096

0.008

0.087

0.016

0.220

0.181

0.156

0.063

D

A1

A2

b

c

E

E1

D

L

1.90

0.05

1.95

0.15

5.10

4.05

3.30

0.75

E

A1

A2

C

L

b

Figure 15: Foot Print Dimensions (in millimeters)

2.3

1.52

2.75

1.52

Table 6: Ordering Information

Part Number

SMP100LC-8

Marking

Package

Weight

Base qty

Delivery mode

PL8

L25

L35

L06

L09

L12

L14

L16

L20

L23

L27

L32

L36

L40

SMP100LC-25

SMP100LC-35

SMP100LC-65

SMP100LC-90

SMP100LC-120

SMP100LC-140

SMP100LC-160

SMP100LC-200

SMP100LC-230

SMP100LC-270

SMP100LC-320

SMP100LC-360

SMP100LC-400

SMB

0.11 g

2500

Tape & reel

Table 7: Revision History

Date

Revision

Description of Changes

09-Nov-2004

9

Absolute ratings values, table 3 on page 2, updated.

SMP100LC-320, SMP100LC-360 and SMP100LC-400

addition.

07-Dec-2004

20-Jun-2005

10

11

Telecom Circuit Protector added

9/10

SMP100LC

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences

of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted

by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject

to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not

authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

The ST logo is a registered trademark of STMicroelectronics.

All other names are the property of their respective owners

STMicroelectronics group of compagnies

Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -

Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America

www.st.com

10/10

型号:	SMP100LC-120
是否无铅：	含铅
是否Rohs认证：	不符合
生命周期：	Active
IHS 制造商：	VISHAY SEMICONDUCTORS
零件包装代码：	DO-214AA
包装说明：	SMALL OUTLINE, R-PDSO-C2
针数：	2
Reach Compliance Code：	unknown
ECCN代码：	EAR99
HTS代码：	8541.30.00.80
风险等级：	5.44
Is Samacsys：	N
最大转折电压：	145 V
配置：	SINGLE
最大断态直流电压：	108 V
JEDEC-95代码：	DO-214AA
JESD-30 代码：	R-PDSO-C2
JESD-609代码：	e0
通态非重复峰值电流：	55 A
元件数量：	1
端子数量：	2
最高工作温度：	150 °C
最低工作温度：	-55 °C
封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	NOT SPECIFIED
认证状态：	Not Qualified
重复峰值反向电压：	120 V
子类别：	Silicon Surge Protectors
表面贴装：	YES
端子面层：	TIN LEAD
端子形式：	C BEND
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
触发设备类型：	SILICON SURGE PROTECTOR
Base Number Matches：	1

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